mei: expose hardware power gating state to mei layer

Since the runtime pm and the internal power gating
cannot be in complete sync in regards to I/O
operations, we need to expose the device
hardware internal power gating state to mei layer

2. We add pg_state handler that translate the hw
internal pg state to mei layer

2. We add power gating event variable to keep
power track of power gating transitions

Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Reviewed-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c
index cc604e1d9457..4b1eb37344cb 100644
--- a/drivers/misc/mei/init.c
+++ b/drivers/misc/mei/init.c
@@ -341,6 +341,8 @@ void mei_device_init(struct mei_device *dev)
          * 0: Reserved for MEI Bus Message communications
          */
         bitmap_set(dev->host_clients_map, 0, 1);
+
+        dev->pg_event = MEI_PG_EVENT_IDLE;
 }
 EXPORT_SYMBOL_GPL(mei_device_init);