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authorPhilippe Bergheaud <felix@linux.ibm.com>2018-05-14 04:27:35 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2018-05-15 07:29:53 -0400
commit401dca8cbd14fc4b32d93499dcd12a1711a73ecc (patch)
tree27ccc1a987b4492d50e81b06d12e6de80193421a /drivers/misc/cxl/pci.c
parent6c0a8f6b5a45ac892a763b6299bd3c5324fc5e02 (diff)
cxl: Set the PBCQ Tunnel BAR register when enabling capi mode
Skiboot used to set the default Tunnel BAR register value when capi mode was enabled. This approach was ok for the cxl driver, but prevented other drivers from choosing different values. Skiboot versions > 5.11 will not set the default value any longer. This patch modifies the cxl driver to set/reset the Tunnel BAR register when entering/exiting the cxl mode, with pnv_pci_set_tunnel_bar(). That should work with old skiboot (since we are re-writing the value already set) and new skiboot. mpe: The tunnel support was only merged into Linux recently, in commit d6a90bb83b50 ("powerpc/powernv: Enable tunneled operations") (v4.17-rc1), so with new skiboot kernels between that commit and this will not work correctly. Fixes: d6a90bb83b50 ("powerpc/powernv: Enable tunneled operations") Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc/cxl/pci.c')
-rw-r--r--drivers/misc/cxl/pci.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 83f1d08058fc..4eb893284af2 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1742,6 +1742,10 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
1742 /* Required for devices using CAPP DMA mode, harmless for others */ 1742 /* Required for devices using CAPP DMA mode, harmless for others */
1743 pci_set_master(dev); 1743 pci_set_master(dev);
1744 1744
1745 if (cxl_is_power9())
1746 if (pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1))
1747 dev_info(&dev->dev, "Tunneled operations unsupported\n");
1748
1745 if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode))) 1749 if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
1746 goto err; 1750 goto err;
1747 1751
@@ -1768,6 +1772,9 @@ static void cxl_deconfigure_adapter(struct cxl *adapter)
1768{ 1772{
1769 struct pci_dev *pdev = to_pci_dev(adapter->dev.parent); 1773 struct pci_dev *pdev = to_pci_dev(adapter->dev.parent);
1770 1774
1775 if (cxl_is_power9())
1776 pnv_pci_set_tunnel_bar(pdev, 0x00020000E0000000ull, 0);
1777
1771 cxl_native_release_psl_err_irq(adapter); 1778 cxl_native_release_psl_err_irq(adapter);
1772 cxl_unmap_adapter_regs(adapter); 1779 cxl_unmap_adapter_regs(adapter);
1773 1780