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authorChristophe Lombard <clombard@linux.vnet.ibm.com>2017-09-08 09:52:11 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2017-10-06 05:52:43 -0400
commit5632874311dbf432c698fcbe0cf7a49e01ebf324 (patch)
tree96c7cc161ab97e3c4ffca3ab7df108291ab85487 /drivers/misc/cxl/fault.c
parent4ca360f3dbf2036d964cdf3a6c4a45a81fdf8e18 (diff)
cxl: Add support for POWER9 DD2
The PSL initialization sequence has been updated to DD2. This patch adapts to the changes, retaining compatibility with DD1. The patch includes some changes to DD1 fix-ups as well. Tests performed on some of the old/new hardware. The function is_page_fault(), for POWER9, lists the Translation Checkout Responses where the page fault will be handled by copro_handle_mm_fault(). This list is too restrictive and not necessary. This patches removes this restriction and all page faults, whatever the reason, will be handled. In this case, the interruption is always acknowledged. The following features will be added soon: - phb reset when switching to capi mode. - cxllib update to support new functions. Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc/cxl/fault.c')
-rw-r--r--drivers/misc/cxl/fault.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/drivers/misc/cxl/fault.c b/drivers/misc/cxl/fault.c
index f17f72ea0545..70dbb6de102c 100644
--- a/drivers/misc/cxl/fault.c
+++ b/drivers/misc/cxl/fault.c
@@ -220,22 +220,11 @@ static bool cxl_is_segment_miss(struct cxl_context *ctx, u64 dsisr)
220 220
221static bool cxl_is_page_fault(struct cxl_context *ctx, u64 dsisr) 221static bool cxl_is_page_fault(struct cxl_context *ctx, u64 dsisr)
222{ 222{
223 u64 crs; /* Translation Checkout Response Status */
224
225 if ((cxl_is_power8()) && (dsisr & CXL_PSL_DSISR_An_DM)) 223 if ((cxl_is_power8()) && (dsisr & CXL_PSL_DSISR_An_DM))
226 return true; 224 return true;
227 225
228 if (cxl_is_power9()) { 226 if (cxl_is_power9())
229 crs = (dsisr & CXL_PSL9_DSISR_An_CO_MASK); 227 return true;
230 if ((crs == CXL_PSL9_DSISR_An_PF_SLR) ||
231 (crs == CXL_PSL9_DSISR_An_PF_RGC) ||
232 (crs == CXL_PSL9_DSISR_An_PF_RGP) ||
233 (crs == CXL_PSL9_DSISR_An_PF_HRH) ||
234 (crs == CXL_PSL9_DSISR_An_PF_STEG) ||
235 (crs == CXL_PSL9_DSISR_An_URTCH)) {
236 return true;
237 }
238 }
239 228
240 return false; 229 return false;
241} 230}