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authorAntti Palosaari <crope@iki.fi>2016-06-29 19:39:46 -0400
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2016-07-08 15:56:54 -0400
commit334ef18e879980e92f8add103369b763766c4d9f (patch)
treee48befabc8c4ee5a32eca656e61e384ed0123d55 /drivers/media/dvb-frontends/m88ds3103.c
parent9ef3cdc1efeb4e98bd579a7f3b182d57c241c0d3 (diff)
[media] m88ds3103: improve ts clock setting
Simplify TS clock divider calculation and programming slightly. Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/media/dvb-frontends/m88ds3103.c')
-rw-r--r--drivers/media/dvb-frontends/m88ds3103.c39
1 files changed, 16 insertions, 23 deletions
diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c
index 6f03ca8b25da..fae92515cf51 100644
--- a/drivers/media/dvb-frontends/m88ds3103.c
+++ b/drivers/media/dvb-frontends/m88ds3103.c
@@ -306,7 +306,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
306 const struct m88ds3103_reg_val *init; 306 const struct m88ds3103_reg_val *init;
307 u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */ 307 u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */
308 u8 buf[3]; 308 u8 buf[3];
309 u16 u16tmp, divide_ratio = 0; 309 u16 u16tmp;
310 u32 tuner_frequency, target_mclk; 310 u32 tuner_frequency, target_mclk;
311 s32 s32tmp; 311 s32 s32tmp;
312 312
@@ -522,37 +522,25 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
522 ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1); 522 ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1);
523 if (ret) 523 if (ret)
524 goto err; 524 goto err;
525 u8tmp1 = 0; 525 u16tmp = 0;
526 u8tmp2 = 0; 526 u8tmp1 = 0x3f;
527 u8tmp2 = 0x3f;
527 break; 528 break;
528 default: 529 default:
529 if (dev->cfg->ts_clk) { 530 u16tmp = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk);
530 divide_ratio = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk); 531 u8tmp1 = u16tmp / 2 - 1;
531 u8tmp1 = divide_ratio / 2; 532 u8tmp2 = DIV_ROUND_UP(u16tmp, 2) - 1;
532 u8tmp2 = DIV_ROUND_UP(divide_ratio, 2);
533 }
534 } 533 }
535 534
536 dev_dbg(&client->dev, 535 dev_dbg(&client->dev, "target_mclk=%d ts_clk=%d ts_clk_divide_ratio=%u\n",
537 "target_mclk=%d ts_clk=%d divide_ratio=%d\n", 536 target_mclk, dev->cfg->ts_clk, u16tmp);
538 target_mclk, dev->cfg->ts_clk, divide_ratio);
539 537
540 u8tmp1--;
541 u8tmp2--;
542 /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */ 538 /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */
543 u8tmp1 &= 0x3f;
544 /* u8tmp2[5:0] => ea[5:0] */ 539 /* u8tmp2[5:0] => ea[5:0] */
545 u8tmp2 &= 0x3f; 540 u8tmp = (u8tmp1 >> 2) & 0x0f;
546 541 ret = regmap_update_bits(dev->regmap, 0xfe, 0x0f, u8tmp);
547 ret = regmap_bulk_read(dev->regmap, 0xfe, &u8tmp, 1);
548 if (ret)
549 goto err;
550
551 u8tmp = ((u8tmp & 0xf0) << 0) | u8tmp1 >> 2;
552 ret = regmap_write(dev->regmap, 0xfe, u8tmp);
553 if (ret) 542 if (ret)
554 goto err; 543 goto err;
555
556 u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0; 544 u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;
557 ret = regmap_write(dev->regmap, 0xea, u8tmp); 545 ret = regmap_write(dev->regmap, 0xea, u8tmp);
558 if (ret) 546 if (ret)
@@ -1444,6 +1432,11 @@ static int m88ds3103_probe(struct i2c_client *client,
1444 goto err_kfree; 1432 goto err_kfree;
1445 } 1433 }
1446 1434
1435 if (!pdata->ts_clk) {
1436 ret = -EINVAL;
1437 goto err_kfree;
1438 }
1439
1447 /* 0x29 register is defined differently for m88rs6000. */ 1440 /* 0x29 register is defined differently for m88rs6000. */
1448 /* set internal tuner address to 0x21 */ 1441 /* set internal tuner address to 0x21 */
1449 if (dev->chip_id == M88RS6000_CHIP_ID) 1442 if (dev->chip_id == M88RS6000_CHIP_ID)