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authorBen Dooks <ben.dooks@codethink.co.uk>2016-06-22 05:49:29 -0400
committerJassi Brar <jaswinder.singh@linaro.org>2016-06-24 04:02:31 -0400
commit9ac3e85a5c5c33ac99b6f093e886ecb8849919d2 (patch)
tree6b9e9f44ed956d461fedfd934a1c4cacf18273f1 /drivers/mailbox/pl320-ipc.c
parent9ef3c5112139cc5c5666ee096e05bc1e00e94015 (diff)
mailbox: pl320: remove __raw IO
The use of __raw IO accesors is not endian safe and should be used sparingly. The relaxed variants should be as lightweight and also are endian safe. Note, this has not been run-time tested. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'drivers/mailbox/pl320-ipc.c')
-rw-r--r--drivers/mailbox/pl320-ipc.c46
1 files changed, 23 insertions, 23 deletions
diff --git a/drivers/mailbox/pl320-ipc.c b/drivers/mailbox/pl320-ipc.c
index f80acb36ff07..2dbed87094d7 100644
--- a/drivers/mailbox/pl320-ipc.c
+++ b/drivers/mailbox/pl320-ipc.c
@@ -58,29 +58,29 @@ static ATOMIC_NOTIFIER_HEAD(ipc_notifier);
58 58
59static inline void set_destination(int source, int mbox) 59static inline void set_destination(int source, int mbox)
60{ 60{
61 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxDSET(mbox)); 61 writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDSET(mbox));
62 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxMSET(mbox)); 62 writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMSET(mbox));
63} 63}
64 64
65static inline void clear_destination(int source, int mbox) 65static inline void clear_destination(int source, int mbox)
66{ 66{
67 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxDCLEAR(mbox)); 67 writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDCLEAR(mbox));
68 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxMCLEAR(mbox)); 68 writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMCLEAR(mbox));
69} 69}
70 70
71static void __ipc_send(int mbox, u32 *data) 71static void __ipc_send(int mbox, u32 *data)
72{ 72{
73 int i; 73 int i;
74 for (i = 0; i < 7; i++) 74 for (i = 0; i < 7; i++)
75 __raw_writel(data[i], ipc_base + IPCMxDR(mbox, i)); 75 writel_relaxed(data[i], ipc_base + IPCMxDR(mbox, i));
76 __raw_writel(0x1, ipc_base + IPCMxSEND(mbox)); 76 writel_relaxed(0x1, ipc_base + IPCMxSEND(mbox));
77} 77}
78 78
79static u32 __ipc_rcv(int mbox, u32 *data) 79static u32 __ipc_rcv(int mbox, u32 *data)
80{ 80{
81 int i; 81 int i;
82 for (i = 0; i < 7; i++) 82 for (i = 0; i < 7; i++)
83 data[i] = __raw_readl(ipc_base + IPCMxDR(mbox, i)); 83 data[i] = readl_relaxed(ipc_base + IPCMxDR(mbox, i));
84 return data[1]; 84 return data[1];
85} 85}
86 86
@@ -112,15 +112,15 @@ static irqreturn_t ipc_handler(int irq, void *dev)
112 u32 irq_stat; 112 u32 irq_stat;
113 u32 data[7]; 113 u32 data[7];
114 114
115 irq_stat = __raw_readl(ipc_base + IPCMMIS(1)); 115 irq_stat = readl_relaxed(ipc_base + IPCMMIS(1));
116 if (irq_stat & MBOX_MASK(IPC_TX_MBOX)) { 116 if (irq_stat & MBOX_MASK(IPC_TX_MBOX)) {
117 __raw_writel(0, ipc_base + IPCMxSEND(IPC_TX_MBOX)); 117 writel_relaxed(0, ipc_base + IPCMxSEND(IPC_TX_MBOX));
118 complete(&ipc_completion); 118 complete(&ipc_completion);
119 } 119 }
120 if (irq_stat & MBOX_MASK(IPC_RX_MBOX)) { 120 if (irq_stat & MBOX_MASK(IPC_RX_MBOX)) {
121 __ipc_rcv(IPC_RX_MBOX, data); 121 __ipc_rcv(IPC_RX_MBOX, data);
122 atomic_notifier_call_chain(&ipc_notifier, data[0], data + 1); 122 atomic_notifier_call_chain(&ipc_notifier, data[0], data + 1);
123 __raw_writel(2, ipc_base + IPCMxSEND(IPC_RX_MBOX)); 123 writel_relaxed(2, ipc_base + IPCMxSEND(IPC_RX_MBOX));
124 } 124 }
125 125
126 return IRQ_HANDLED; 126 return IRQ_HANDLED;
@@ -146,7 +146,7 @@ static int pl320_probe(struct amba_device *adev, const struct amba_id *id)
146 if (ipc_base == NULL) 146 if (ipc_base == NULL)
147 return -ENOMEM; 147 return -ENOMEM;
148 148
149 __raw_writel(0, ipc_base + IPCMxSEND(IPC_TX_MBOX)); 149 writel_relaxed(0, ipc_base + IPCMxSEND(IPC_TX_MBOX));
150 150
151 ipc_irq = adev->irq[0]; 151 ipc_irq = adev->irq[0];
152 ret = request_irq(ipc_irq, ipc_handler, 0, dev_name(&adev->dev), NULL); 152 ret = request_irq(ipc_irq, ipc_handler, 0, dev_name(&adev->dev), NULL);
@@ -154,20 +154,20 @@ static int pl320_probe(struct amba_device *adev, const struct amba_id *id)
154 goto err; 154 goto err;
155 155
156 /* Init slow mailbox */ 156 /* Init slow mailbox */
157 __raw_writel(CHAN_MASK(A9_SOURCE), 157 writel_relaxed(CHAN_MASK(A9_SOURCE),
158 ipc_base + IPCMxSOURCE(IPC_TX_MBOX)); 158 ipc_base + IPCMxSOURCE(IPC_TX_MBOX));
159 __raw_writel(CHAN_MASK(M3_SOURCE), 159 writel_relaxed(CHAN_MASK(M3_SOURCE),
160 ipc_base + IPCMxDSET(IPC_TX_MBOX)); 160 ipc_base + IPCMxDSET(IPC_TX_MBOX));
161 __raw_writel(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE), 161 writel_relaxed(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),
162 ipc_base + IPCMxMSET(IPC_TX_MBOX)); 162 ipc_base + IPCMxMSET(IPC_TX_MBOX));
163 163
164 /* Init receive mailbox */ 164 /* Init receive mailbox */
165 __raw_writel(CHAN_MASK(M3_SOURCE), 165 writel_relaxed(CHAN_MASK(M3_SOURCE),
166 ipc_base + IPCMxSOURCE(IPC_RX_MBOX)); 166 ipc_base + IPCMxSOURCE(IPC_RX_MBOX));
167 __raw_writel(CHAN_MASK(A9_SOURCE), 167 writel_relaxed(CHAN_MASK(A9_SOURCE),
168 ipc_base + IPCMxDSET(IPC_RX_MBOX)); 168 ipc_base + IPCMxDSET(IPC_RX_MBOX));
169 __raw_writel(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE), 169 writel_relaxed(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),
170 ipc_base + IPCMxMSET(IPC_RX_MBOX)); 170 ipc_base + IPCMxMSET(IPC_RX_MBOX));
171 171
172 return 0; 172 return 0;
173err: 173err: