aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/irqchip/irq-tegra.c
diff options
context:
space:
mode:
authorThierry Reding <treding@nvidia.com>2015-03-23 06:26:19 -0400
committerJason Cooper <jason@lakedaemon.net>2015-03-29 15:53:00 -0400
commit1eec582158e2d1d1d3978449d2d01da2d1c3feb8 (patch)
treeb9985999a9b66d080a2fd5f915f8ab759a46c2e4 /drivers/irqchip/irq-tegra.c
parent1a703bffd82e04d1c00a0b4373bf4db1e2d25681 (diff)
irqchip: tegra: Add Tegra210 support
Tegra210 uses the same legacy interrupt controller as older generations but it adds a sixth instance. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lkml.kernel.org/r/1427106379-14037-1-git-send-email-thierry.reding@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/irqchip/irq-tegra.c')
-rw-r--r--drivers/irqchip/irq-tegra.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c
index d919ecf29cf4..51c485d9a877 100644
--- a/drivers/irqchip/irq-tegra.c
+++ b/drivers/irqchip/irq-tegra.c
@@ -48,7 +48,7 @@
48#define ICTLR_COP_IER_CLR 0x38 48#define ICTLR_COP_IER_CLR 0x38
49#define ICTLR_COP_IEP_CLASS 0x3c 49#define ICTLR_COP_IEP_CLASS 0x3c
50 50
51#define TEGRA_MAX_NUM_ICTLRS 5 51#define TEGRA_MAX_NUM_ICTLRS 6
52 52
53static unsigned int num_ictlrs; 53static unsigned int num_ictlrs;
54 54
@@ -64,7 +64,12 @@ static const struct tegra_ictlr_soc tegra30_ictlr_soc = {
64 .num_ictlrs = 5, 64 .num_ictlrs = 5,
65}; 65};
66 66
67static const struct tegra_ictlr_soc tegra210_ictlr_soc = {
68 .num_ictlrs = 6,
69};
70
67static const struct of_device_id ictlr_matches[] = { 71static const struct of_device_id ictlr_matches[] = {
72 { .compatible = "nvidia,tegra210-ictlr", .data = &tegra210_ictlr_soc },
68 { .compatible = "nvidia,tegra30-ictlr", .data = &tegra30_ictlr_soc }, 73 { .compatible = "nvidia,tegra30-ictlr", .data = &tegra30_ictlr_soc },
69 { .compatible = "nvidia,tegra20-ictlr", .data = &tegra20_ictlr_soc }, 74 { .compatible = "nvidia,tegra20-ictlr", .data = &tegra20_ictlr_soc },
70 { } 75 { }
@@ -369,3 +374,4 @@ out_free:
369 374
370IRQCHIP_DECLARE(tegra20_ictlr, "nvidia,tegra20-ictlr", tegra_ictlr_init); 375IRQCHIP_DECLARE(tegra20_ictlr, "nvidia,tegra20-ictlr", tegra_ictlr_init);
371IRQCHIP_DECLARE(tegra30_ictlr, "nvidia,tegra30-ictlr", tegra_ictlr_init); 376IRQCHIP_DECLARE(tegra30_ictlr, "nvidia,tegra30-ictlr", tegra_ictlr_init);
377IRQCHIP_DECLARE(tegra210_ictlr, "nvidia,tegra210-ictlr", tegra_ictlr_init);