diff options
author | Jon Hunter <jonathanh@nvidia.com> | 2016-02-09 10:24:56 -0500 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2016-02-11 05:20:02 -0500 |
commit | 7bf29d3af6807d2a97a8b7d4627104a8da9bcdcb (patch) | |
tree | e2a45ec4fad22f3db90f66b906036661ded8f786 /drivers/irqchip/irq-gic.c | |
parent | 1a485f4d2e28efd77075b2952926683d6c245633 (diff) |
irqchip/gic: Only populate set_affinity for the root controller
Setting the affinity of an IRQ, it only applicable for the root
interrupt controller and so only populate this operator for the root
controller.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic.c')
-rw-r--r-- | drivers/irqchip/irq-gic.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 911758c056c1..db7b161b0295 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c | |||
@@ -384,9 +384,6 @@ static struct irq_chip gic_chip = { | |||
384 | .irq_unmask = gic_unmask_irq, | 384 | .irq_unmask = gic_unmask_irq, |
385 | .irq_eoi = gic_eoi_irq, | 385 | .irq_eoi = gic_eoi_irq, |
386 | .irq_set_type = gic_set_type, | 386 | .irq_set_type = gic_set_type, |
387 | #ifdef CONFIG_SMP | ||
388 | .irq_set_affinity = gic_set_affinity, | ||
389 | #endif | ||
390 | .irq_get_irqchip_state = gic_irq_get_irqchip_state, | 387 | .irq_get_irqchip_state = gic_irq_get_irqchip_state, |
391 | .irq_set_irqchip_state = gic_irq_set_irqchip_state, | 388 | .irq_set_irqchip_state = gic_irq_set_irqchip_state, |
392 | .flags = IRQCHIP_SET_TYPE_MASKED | | 389 | .flags = IRQCHIP_SET_TYPE_MASKED | |
@@ -400,9 +397,6 @@ static struct irq_chip gic_eoimode1_chip = { | |||
400 | .irq_unmask = gic_unmask_irq, | 397 | .irq_unmask = gic_unmask_irq, |
401 | .irq_eoi = gic_eoimode1_eoi_irq, | 398 | .irq_eoi = gic_eoimode1_eoi_irq, |
402 | .irq_set_type = gic_set_type, | 399 | .irq_set_type = gic_set_type, |
403 | #ifdef CONFIG_SMP | ||
404 | .irq_set_affinity = gic_set_affinity, | ||
405 | #endif | ||
406 | .irq_get_irqchip_state = gic_irq_get_irqchip_state, | 400 | .irq_get_irqchip_state = gic_irq_get_irqchip_state, |
407 | .irq_set_irqchip_state = gic_irq_set_irqchip_state, | 401 | .irq_set_irqchip_state = gic_irq_set_irqchip_state, |
408 | .irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity, | 402 | .irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity, |
@@ -1039,6 +1033,11 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start, | |||
1039 | gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d", gic_nr); | 1033 | gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d", gic_nr); |
1040 | } | 1034 | } |
1041 | 1035 | ||
1036 | #ifdef CONFIG_SMP | ||
1037 | if (gic_nr == 0) | ||
1038 | gic->chip.irq_set_affinity = gic_set_affinity; | ||
1039 | #endif | ||
1040 | |||
1042 | #ifdef CONFIG_GIC_NON_BANKED | 1041 | #ifdef CONFIG_GIC_NON_BANKED |
1043 | if (percpu_offset) { /* Frankein-GIC without banked registers... */ | 1042 | if (percpu_offset) { /* Frankein-GIC without banked registers... */ |
1044 | unsigned int cpu; | 1043 | unsigned int cpu; |