Merge 4.7-rc4 into staging-next

We want the fixes in here, and we can resolve a merge issue in
drivers/iio/industrialio-trigger.c

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 12 insertions, 5 deletions

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index a644d0cec2d8..10700945994e 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3222,11 +3222,6 @@ static int __init init_dmars(void)
                         }
                 }
 
-                iommu_flush_write_buffer(iommu);
-                iommu_set_root_entry(iommu);
-                iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
-                iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
-
                 if (!ecap_pass_through(iommu->ecap))
                         hw_pass_through = 0;
 #ifdef CONFIG_INTEL_IOMMU_SVM
@@ -3235,6 +3230,18 @@ static int __init init_dmars(void)
 #endif
         }
 
+        /*
+         * Now that qi is enabled on all iommus, set the root entry and flush
+         * caches. This is required on some Intel X58 chipsets, otherwise the
+         * flush_context function will loop forever and the boot hangs.
+         */
+        for_each_active_iommu(iommu, drhd) {
+                iommu_flush_write_buffer(iommu);
+                iommu_set_root_entry(iommu);
+                iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
+                iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
+        }
+
         if (iommu_pass_through)
                 iommu_identity_mapping |= IDENTMAP_ALL;