diff options
| author | Marco Felsch <m.felsch@pengutronix.de> | 2019-01-14 02:10:50 -0500 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-01-14 02:13:28 -0500 |
| commit | b6eba86030bf2fa3abcf9a0e3fb04527330da52e (patch) | |
| tree | debd1fe5cf8c24c02cf2e57cf1d1926eff96ee5c /drivers/input | |
| parent | 2ebc1919e9a9812903ab684cc53862015987e7a0 (diff) | |
Input: edt-ft5x06 - add offset support for ev-ft5726
Unfortunately the evervision focaltech implementation uses two offset
registers, one for the x coordinate and one for y.
This patch extends the driver to handle those offset registers only for
devices that support these.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Diffstat (limited to 'drivers/input')
| -rw-r--r-- | drivers/input/touchscreen/edt-ft5x06.c | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c index a67915535b47..702bfda7ee77 100644 --- a/drivers/input/touchscreen/edt-ft5x06.c +++ b/drivers/input/touchscreen/edt-ft5x06.c | |||
| @@ -56,6 +56,8 @@ | |||
| 56 | 56 | ||
| 57 | #define EV_REGISTER_THRESHOLD 0x40 | 57 | #define EV_REGISTER_THRESHOLD 0x40 |
| 58 | #define EV_REGISTER_GAIN 0x41 | 58 | #define EV_REGISTER_GAIN 0x41 |
| 59 | #define EV_REGISTER_OFFSET_Y 0x45 | ||
| 60 | #define EV_REGISTER_OFFSET_X 0x46 | ||
| 59 | 61 | ||
| 60 | #define NO_REGISTER 0xff | 62 | #define NO_REGISTER 0xff |
| 61 | 63 | ||
| @@ -86,6 +88,8 @@ struct edt_reg_addr { | |||
| 86 | int reg_report_rate; | 88 | int reg_report_rate; |
| 87 | int reg_gain; | 89 | int reg_gain; |
| 88 | int reg_offset; | 90 | int reg_offset; |
| 91 | int reg_offset_x; | ||
| 92 | int reg_offset_y; | ||
| 89 | int reg_num_x; | 93 | int reg_num_x; |
| 90 | int reg_num_y; | 94 | int reg_num_y; |
| 91 | }; | 95 | }; |
| @@ -111,6 +115,8 @@ struct edt_ft5x06_ts_data { | |||
| 111 | int threshold; | 115 | int threshold; |
| 112 | int gain; | 116 | int gain; |
| 113 | int offset; | 117 | int offset; |
| 118 | int offset_x; | ||
| 119 | int offset_y; | ||
| 114 | int report_rate; | 120 | int report_rate; |
| 115 | int max_support_points; | 121 | int max_support_points; |
| 116 | 122 | ||
| @@ -508,6 +514,12 @@ static EDT_ATTR(gain, S_IWUSR | S_IRUGO, WORK_REGISTER_GAIN, | |||
| 508 | /* m06, m09: range 0-31, m12: range 0-16 */ | 514 | /* m06, m09: range 0-31, m12: range 0-16 */ |
| 509 | static EDT_ATTR(offset, S_IWUSR | S_IRUGO, WORK_REGISTER_OFFSET, | 515 | static EDT_ATTR(offset, S_IWUSR | S_IRUGO, WORK_REGISTER_OFFSET, |
| 510 | M09_REGISTER_OFFSET, NO_REGISTER, 0, 31); | 516 | M09_REGISTER_OFFSET, NO_REGISTER, 0, 31); |
| 517 | /* m06, m09, m12: no supported, ev_ft: range 0-80 */ | ||
| 518 | static EDT_ATTR(offset_x, S_IWUSR | S_IRUGO, NO_REGISTER, NO_REGISTER, | ||
| 519 | EV_REGISTER_OFFSET_X, 0, 80); | ||
| 520 | /* m06, m09, m12: no supported, ev_ft: range 0-80 */ | ||
| 521 | static EDT_ATTR(offset_y, S_IWUSR | S_IRUGO, NO_REGISTER, NO_REGISTER, | ||
| 522 | EV_REGISTER_OFFSET_Y, 0, 80); | ||
| 511 | /* m06: range 20 to 80, m09: range 0 to 30, m12: range 1 to 255... */ | 523 | /* m06: range 20 to 80, m09: range 0 to 30, m12: range 1 to 255... */ |
| 512 | static EDT_ATTR(threshold, S_IWUSR | S_IRUGO, WORK_REGISTER_THRESHOLD, | 524 | static EDT_ATTR(threshold, S_IWUSR | S_IRUGO, WORK_REGISTER_THRESHOLD, |
| 513 | M09_REGISTER_THRESHOLD, EV_REGISTER_THRESHOLD, 0, 255); | 525 | M09_REGISTER_THRESHOLD, EV_REGISTER_THRESHOLD, 0, 255); |
| @@ -518,6 +530,8 @@ static EDT_ATTR(report_rate, S_IWUSR | S_IRUGO, WORK_REGISTER_REPORT_RATE, | |||
| 518 | static struct attribute *edt_ft5x06_attrs[] = { | 530 | static struct attribute *edt_ft5x06_attrs[] = { |
| 519 | &edt_ft5x06_attr_gain.dattr.attr, | 531 | &edt_ft5x06_attr_gain.dattr.attr, |
| 520 | &edt_ft5x06_attr_offset.dattr.attr, | 532 | &edt_ft5x06_attr_offset.dattr.attr, |
| 533 | &edt_ft5x06_attr_offset_x.dattr.attr, | ||
| 534 | &edt_ft5x06_attr_offset_y.dattr.attr, | ||
| 521 | &edt_ft5x06_attr_threshold.dattr.attr, | 535 | &edt_ft5x06_attr_threshold.dattr.attr, |
| 522 | &edt_ft5x06_attr_report_rate.dattr.attr, | 536 | &edt_ft5x06_attr_report_rate.dattr.attr, |
| 523 | NULL | 537 | NULL |
| @@ -632,6 +646,12 @@ static int edt_ft5x06_work_mode(struct edt_ft5x06_ts_data *tsdata) | |||
| 632 | if (reg_addr->reg_offset != NO_REGISTER) | 646 | if (reg_addr->reg_offset != NO_REGISTER) |
| 633 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset, | 647 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset, |
| 634 | tsdata->offset); | 648 | tsdata->offset); |
| 649 | if (reg_addr->reg_offset_x != NO_REGISTER) | ||
| 650 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_x, | ||
| 651 | tsdata->offset_x); | ||
| 652 | if (reg_addr->reg_offset_y != NO_REGISTER) | ||
| 653 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_y, | ||
| 654 | tsdata->offset_y); | ||
| 635 | if (reg_addr->reg_report_rate != NO_REGISTER) | 655 | if (reg_addr->reg_report_rate != NO_REGISTER) |
| 636 | edt_ft5x06_register_write(tsdata, reg_addr->reg_report_rate, | 656 | edt_ft5x06_register_write(tsdata, reg_addr->reg_report_rate, |
| 637 | tsdata->report_rate); | 657 | tsdata->report_rate); |
| @@ -937,6 +957,18 @@ static void edt_ft5x06_ts_get_defaults(struct device *dev, | |||
| 937 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset, val); | 957 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset, val); |
| 938 | tsdata->offset = val; | 958 | tsdata->offset = val; |
| 939 | } | 959 | } |
| 960 | |||
| 961 | error = device_property_read_u32(dev, "offset-x", &val); | ||
| 962 | if (!error) { | ||
| 963 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_x, val); | ||
| 964 | tsdata->offset_x = val; | ||
| 965 | } | ||
| 966 | |||
| 967 | error = device_property_read_u32(dev, "offset-y", &val); | ||
| 968 | if (!error) { | ||
| 969 | edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_y, val); | ||
| 970 | tsdata->offset_y = val; | ||
| 971 | } | ||
| 940 | } | 972 | } |
| 941 | 973 | ||
| 942 | static void | 974 | static void |
| @@ -950,6 +982,12 @@ edt_ft5x06_ts_get_parameters(struct edt_ft5x06_ts_data *tsdata) | |||
| 950 | if (reg_addr->reg_offset != NO_REGISTER) | 982 | if (reg_addr->reg_offset != NO_REGISTER) |
| 951 | tsdata->offset = | 983 | tsdata->offset = |
| 952 | edt_ft5x06_register_read(tsdata, reg_addr->reg_offset); | 984 | edt_ft5x06_register_read(tsdata, reg_addr->reg_offset); |
| 985 | if (reg_addr->reg_offset_x != NO_REGISTER) | ||
| 986 | tsdata->offset_x = edt_ft5x06_register_read(tsdata, | ||
| 987 | reg_addr->reg_offset_x); | ||
| 988 | if (reg_addr->reg_offset_y != NO_REGISTER) | ||
| 989 | tsdata->offset_y = edt_ft5x06_register_read(tsdata, | ||
| 990 | reg_addr->reg_offset_y); | ||
| 953 | if (reg_addr->reg_report_rate != NO_REGISTER) | 991 | if (reg_addr->reg_report_rate != NO_REGISTER) |
| 954 | tsdata->report_rate = edt_ft5x06_register_read(tsdata, | 992 | tsdata->report_rate = edt_ft5x06_register_read(tsdata, |
| 955 | reg_addr->reg_report_rate); | 993 | reg_addr->reg_report_rate); |
| @@ -977,6 +1015,8 @@ edt_ft5x06_ts_set_regs(struct edt_ft5x06_ts_data *tsdata) | |||
| 977 | reg_addr->reg_report_rate = WORK_REGISTER_REPORT_RATE; | 1015 | reg_addr->reg_report_rate = WORK_REGISTER_REPORT_RATE; |
| 978 | reg_addr->reg_gain = WORK_REGISTER_GAIN; | 1016 | reg_addr->reg_gain = WORK_REGISTER_GAIN; |
| 979 | reg_addr->reg_offset = WORK_REGISTER_OFFSET; | 1017 | reg_addr->reg_offset = WORK_REGISTER_OFFSET; |
| 1018 | reg_addr->reg_offset_x = NO_REGISTER; | ||
| 1019 | reg_addr->reg_offset_y = NO_REGISTER; | ||
| 980 | reg_addr->reg_num_x = WORK_REGISTER_NUM_X; | 1020 | reg_addr->reg_num_x = WORK_REGISTER_NUM_X; |
| 981 | reg_addr->reg_num_y = WORK_REGISTER_NUM_Y; | 1021 | reg_addr->reg_num_y = WORK_REGISTER_NUM_Y; |
| 982 | break; | 1022 | break; |
| @@ -987,6 +1027,8 @@ edt_ft5x06_ts_set_regs(struct edt_ft5x06_ts_data *tsdata) | |||
| 987 | reg_addr->reg_report_rate = NO_REGISTER; | 1027 | reg_addr->reg_report_rate = NO_REGISTER; |
| 988 | reg_addr->reg_gain = M09_REGISTER_GAIN; | 1028 | reg_addr->reg_gain = M09_REGISTER_GAIN; |
| 989 | reg_addr->reg_offset = M09_REGISTER_OFFSET; | 1029 | reg_addr->reg_offset = M09_REGISTER_OFFSET; |
| 1030 | reg_addr->reg_offset_x = NO_REGISTER; | ||
| 1031 | reg_addr->reg_offset_y = NO_REGISTER; | ||
| 990 | reg_addr->reg_num_x = M09_REGISTER_NUM_X; | 1032 | reg_addr->reg_num_x = M09_REGISTER_NUM_X; |
| 991 | reg_addr->reg_num_y = M09_REGISTER_NUM_Y; | 1033 | reg_addr->reg_num_y = M09_REGISTER_NUM_Y; |
| 992 | break; | 1034 | break; |
| @@ -995,6 +1037,8 @@ edt_ft5x06_ts_set_regs(struct edt_ft5x06_ts_data *tsdata) | |||
| 995 | reg_addr->reg_threshold = EV_REGISTER_THRESHOLD; | 1037 | reg_addr->reg_threshold = EV_REGISTER_THRESHOLD; |
| 996 | reg_addr->reg_gain = EV_REGISTER_GAIN; | 1038 | reg_addr->reg_gain = EV_REGISTER_GAIN; |
| 997 | reg_addr->reg_offset = NO_REGISTER; | 1039 | reg_addr->reg_offset = NO_REGISTER; |
| 1040 | reg_addr->reg_offset_x = EV_REGISTER_OFFSET_X; | ||
| 1041 | reg_addr->reg_offset_y = EV_REGISTER_OFFSET_Y; | ||
| 998 | reg_addr->reg_num_x = NO_REGISTER; | 1042 | reg_addr->reg_num_x = NO_REGISTER; |
| 999 | reg_addr->reg_num_y = NO_REGISTER; | 1043 | reg_addr->reg_num_y = NO_REGISTER; |
| 1000 | reg_addr->reg_report_rate = NO_REGISTER; | 1044 | reg_addr->reg_report_rate = NO_REGISTER; |
| @@ -1005,6 +1049,8 @@ edt_ft5x06_ts_set_regs(struct edt_ft5x06_ts_data *tsdata) | |||
| 1005 | reg_addr->reg_threshold = M09_REGISTER_THRESHOLD; | 1049 | reg_addr->reg_threshold = M09_REGISTER_THRESHOLD; |
| 1006 | reg_addr->reg_gain = M09_REGISTER_GAIN; | 1050 | reg_addr->reg_gain = M09_REGISTER_GAIN; |
| 1007 | reg_addr->reg_offset = M09_REGISTER_OFFSET; | 1051 | reg_addr->reg_offset = M09_REGISTER_OFFSET; |
| 1052 | reg_addr->reg_offset_x = NO_REGISTER; | ||
| 1053 | reg_addr->reg_offset_y = NO_REGISTER; | ||
| 1008 | break; | 1054 | break; |
| 1009 | } | 1055 | } |
| 1010 | } | 1056 | } |
