diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-05-18 16:52:44 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-05-18 16:52:44 -0400 |
commit | 936a0cd52aa5d024c583e36e2f21bf6ec2e527e4 (patch) | |
tree | 01cffc11361be7d671b71ba86463f6649b39d552 /drivers/iio/adc | |
parent | 36bf51acc89d113f101e40f40af4ab53fbf5b60a (diff) | |
parent | e26081808edadfd257c6c9d81014e3b25e9a6118 (diff) |
Merge 4.1-rc4 into staging-next
We want the fixes in here for testing and merge issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/iio/adc')
-rw-r--r-- | drivers/iio/adc/axp288_adc.c | 12 | ||||
-rw-r--r-- | drivers/iio/adc/cc10001_adc.c | 60 | ||||
-rw-r--r-- | drivers/iio/adc/mcp320x.c | 6 | ||||
-rw-r--r-- | drivers/iio/adc/qcom-spmi-vadc.c | 7 | ||||
-rw-r--r-- | drivers/iio/adc/xilinx-xadc-core.c | 5 | ||||
-rw-r--r-- | drivers/iio/adc/xilinx-xadc.h | 6 |
6 files changed, 53 insertions, 43 deletions
diff --git a/drivers/iio/adc/axp288_adc.c b/drivers/iio/adc/axp288_adc.c index 08bcfb061ca5..56008a86b78f 100644 --- a/drivers/iio/adc/axp288_adc.c +++ b/drivers/iio/adc/axp288_adc.c | |||
@@ -53,39 +53,42 @@ static const struct iio_chan_spec const axp288_adc_channels[] = { | |||
53 | .channel = 0, | 53 | .channel = 0, |
54 | .address = AXP288_TS_ADC_H, | 54 | .address = AXP288_TS_ADC_H, |
55 | .datasheet_name = "TS_PIN", | 55 | .datasheet_name = "TS_PIN", |
56 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), | ||
56 | }, { | 57 | }, { |
57 | .indexed = 1, | 58 | .indexed = 1, |
58 | .type = IIO_TEMP, | 59 | .type = IIO_TEMP, |
59 | .channel = 1, | 60 | .channel = 1, |
60 | .address = AXP288_PMIC_ADC_H, | 61 | .address = AXP288_PMIC_ADC_H, |
61 | .datasheet_name = "PMIC_TEMP", | 62 | .datasheet_name = "PMIC_TEMP", |
63 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), | ||
62 | }, { | 64 | }, { |
63 | .indexed = 1, | 65 | .indexed = 1, |
64 | .type = IIO_TEMP, | 66 | .type = IIO_TEMP, |
65 | .channel = 2, | 67 | .channel = 2, |
66 | .address = AXP288_GP_ADC_H, | 68 | .address = AXP288_GP_ADC_H, |
67 | .datasheet_name = "GPADC", | 69 | .datasheet_name = "GPADC", |
70 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), | ||
68 | }, { | 71 | }, { |
69 | .indexed = 1, | 72 | .indexed = 1, |
70 | .type = IIO_CURRENT, | 73 | .type = IIO_CURRENT, |
71 | .channel = 3, | 74 | .channel = 3, |
72 | .address = AXP20X_BATT_CHRG_I_H, | 75 | .address = AXP20X_BATT_CHRG_I_H, |
73 | .datasheet_name = "BATT_CHG_I", | 76 | .datasheet_name = "BATT_CHG_I", |
74 | .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), | 77 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), |
75 | }, { | 78 | }, { |
76 | .indexed = 1, | 79 | .indexed = 1, |
77 | .type = IIO_CURRENT, | 80 | .type = IIO_CURRENT, |
78 | .channel = 4, | 81 | .channel = 4, |
79 | .address = AXP20X_BATT_DISCHRG_I_H, | 82 | .address = AXP20X_BATT_DISCHRG_I_H, |
80 | .datasheet_name = "BATT_DISCHRG_I", | 83 | .datasheet_name = "BATT_DISCHRG_I", |
81 | .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), | 84 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), |
82 | }, { | 85 | }, { |
83 | .indexed = 1, | 86 | .indexed = 1, |
84 | .type = IIO_VOLTAGE, | 87 | .type = IIO_VOLTAGE, |
85 | .channel = 5, | 88 | .channel = 5, |
86 | .address = AXP20X_BATT_V_H, | 89 | .address = AXP20X_BATT_V_H, |
87 | .datasheet_name = "BATT_V", | 90 | .datasheet_name = "BATT_V", |
88 | .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), | 91 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), |
89 | }, | 92 | }, |
90 | }; | 93 | }; |
91 | 94 | ||
@@ -151,9 +154,6 @@ static int axp288_adc_read_raw(struct iio_dev *indio_dev, | |||
151 | chan->address)) | 154 | chan->address)) |
152 | dev_err(&indio_dev->dev, "TS pin restore\n"); | 155 | dev_err(&indio_dev->dev, "TS pin restore\n"); |
153 | break; | 156 | break; |
154 | case IIO_CHAN_INFO_PROCESSED: | ||
155 | ret = axp288_adc_read_channel(val, chan->address, info->regmap); | ||
156 | break; | ||
157 | default: | 157 | default: |
158 | ret = -EINVAL; | 158 | ret = -EINVAL; |
159 | } | 159 | } |
diff --git a/drivers/iio/adc/cc10001_adc.c b/drivers/iio/adc/cc10001_adc.c index 51e2a83c9404..115f6e99a7fa 100644 --- a/drivers/iio/adc/cc10001_adc.c +++ b/drivers/iio/adc/cc10001_adc.c | |||
@@ -35,8 +35,9 @@ | |||
35 | #define CC10001_ADC_EOC_SET BIT(0) | 35 | #define CC10001_ADC_EOC_SET BIT(0) |
36 | 36 | ||
37 | #define CC10001_ADC_CHSEL_SAMPLED 0x0c | 37 | #define CC10001_ADC_CHSEL_SAMPLED 0x0c |
38 | #define CC10001_ADC_POWER_UP 0x10 | 38 | #define CC10001_ADC_POWER_DOWN 0x10 |
39 | #define CC10001_ADC_POWER_UP_SET BIT(0) | 39 | #define CC10001_ADC_POWER_DOWN_SET BIT(0) |
40 | |||
40 | #define CC10001_ADC_DEBUG 0x14 | 41 | #define CC10001_ADC_DEBUG 0x14 |
41 | #define CC10001_ADC_DATA_COUNT 0x20 | 42 | #define CC10001_ADC_DATA_COUNT 0x20 |
42 | 43 | ||
@@ -62,7 +63,6 @@ struct cc10001_adc_device { | |||
62 | u16 *buf; | 63 | u16 *buf; |
63 | 64 | ||
64 | struct mutex lock; | 65 | struct mutex lock; |
65 | unsigned long channel_map; | ||
66 | unsigned int start_delay_ns; | 66 | unsigned int start_delay_ns; |
67 | unsigned int eoc_delay_ns; | 67 | unsigned int eoc_delay_ns; |
68 | }; | 68 | }; |
@@ -79,6 +79,18 @@ static inline u32 cc10001_adc_read_reg(struct cc10001_adc_device *adc_dev, | |||
79 | return readl(adc_dev->reg_base + reg); | 79 | return readl(adc_dev->reg_base + reg); |
80 | } | 80 | } |
81 | 81 | ||
82 | static void cc10001_adc_power_up(struct cc10001_adc_device *adc_dev) | ||
83 | { | ||
84 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_DOWN, 0); | ||
85 | ndelay(adc_dev->start_delay_ns); | ||
86 | } | ||
87 | |||
88 | static void cc10001_adc_power_down(struct cc10001_adc_device *adc_dev) | ||
89 | { | ||
90 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_DOWN, | ||
91 | CC10001_ADC_POWER_DOWN_SET); | ||
92 | } | ||
93 | |||
82 | static void cc10001_adc_start(struct cc10001_adc_device *adc_dev, | 94 | static void cc10001_adc_start(struct cc10001_adc_device *adc_dev, |
83 | unsigned int channel) | 95 | unsigned int channel) |
84 | { | 96 | { |
@@ -88,6 +100,7 @@ static void cc10001_adc_start(struct cc10001_adc_device *adc_dev, | |||
88 | val = (channel & CC10001_ADC_CH_MASK) | CC10001_ADC_MODE_SINGLE_CONV; | 100 | val = (channel & CC10001_ADC_CH_MASK) | CC10001_ADC_MODE_SINGLE_CONV; |
89 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_CONFIG, val); | 101 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_CONFIG, val); |
90 | 102 | ||
103 | udelay(1); | ||
91 | val = cc10001_adc_read_reg(adc_dev, CC10001_ADC_CONFIG); | 104 | val = cc10001_adc_read_reg(adc_dev, CC10001_ADC_CONFIG); |
92 | val = val | CC10001_ADC_START_CONV; | 105 | val = val | CC10001_ADC_START_CONV; |
93 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_CONFIG, val); | 106 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_CONFIG, val); |
@@ -129,6 +142,7 @@ static irqreturn_t cc10001_adc_trigger_h(int irq, void *p) | |||
129 | struct iio_dev *indio_dev; | 142 | struct iio_dev *indio_dev; |
130 | unsigned int delay_ns; | 143 | unsigned int delay_ns; |
131 | unsigned int channel; | 144 | unsigned int channel; |
145 | unsigned int scan_idx; | ||
132 | bool sample_invalid; | 146 | bool sample_invalid; |
133 | u16 *data; | 147 | u16 *data; |
134 | int i; | 148 | int i; |
@@ -139,20 +153,17 @@ static irqreturn_t cc10001_adc_trigger_h(int irq, void *p) | |||
139 | 153 | ||
140 | mutex_lock(&adc_dev->lock); | 154 | mutex_lock(&adc_dev->lock); |
141 | 155 | ||
142 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_UP, | 156 | cc10001_adc_power_up(adc_dev); |
143 | CC10001_ADC_POWER_UP_SET); | ||
144 | |||
145 | /* Wait for 8 (6+2) clock cycles before activating START */ | ||
146 | ndelay(adc_dev->start_delay_ns); | ||
147 | 157 | ||
148 | /* Calculate delay step for eoc and sampled data */ | 158 | /* Calculate delay step for eoc and sampled data */ |
149 | delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT; | 159 | delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT; |
150 | 160 | ||
151 | i = 0; | 161 | i = 0; |
152 | sample_invalid = false; | 162 | sample_invalid = false; |
153 | for_each_set_bit(channel, indio_dev->active_scan_mask, | 163 | for_each_set_bit(scan_idx, indio_dev->active_scan_mask, |
154 | indio_dev->masklength) { | 164 | indio_dev->masklength) { |
155 | 165 | ||
166 | channel = indio_dev->channels[scan_idx].channel; | ||
156 | cc10001_adc_start(adc_dev, channel); | 167 | cc10001_adc_start(adc_dev, channel); |
157 | 168 | ||
158 | data[i] = cc10001_adc_poll_done(indio_dev, channel, delay_ns); | 169 | data[i] = cc10001_adc_poll_done(indio_dev, channel, delay_ns); |
@@ -166,7 +177,7 @@ static irqreturn_t cc10001_adc_trigger_h(int irq, void *p) | |||
166 | } | 177 | } |
167 | 178 | ||
168 | done: | 179 | done: |
169 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_UP, 0); | 180 | cc10001_adc_power_down(adc_dev); |
170 | 181 | ||
171 | mutex_unlock(&adc_dev->lock); | 182 | mutex_unlock(&adc_dev->lock); |
172 | 183 | ||
@@ -185,11 +196,7 @@ static u16 cc10001_adc_read_raw_voltage(struct iio_dev *indio_dev, | |||
185 | unsigned int delay_ns; | 196 | unsigned int delay_ns; |
186 | u16 val; | 197 | u16 val; |
187 | 198 | ||
188 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_UP, | 199 | cc10001_adc_power_up(adc_dev); |
189 | CC10001_ADC_POWER_UP_SET); | ||
190 | |||
191 | /* Wait for 8 (6+2) clock cycles before activating START */ | ||
192 | ndelay(adc_dev->start_delay_ns); | ||
193 | 200 | ||
194 | /* Calculate delay step for eoc and sampled data */ | 201 | /* Calculate delay step for eoc and sampled data */ |
195 | delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT; | 202 | delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT; |
@@ -198,7 +205,7 @@ static u16 cc10001_adc_read_raw_voltage(struct iio_dev *indio_dev, | |||
198 | 205 | ||
199 | val = cc10001_adc_poll_done(indio_dev, chan->channel, delay_ns); | 206 | val = cc10001_adc_poll_done(indio_dev, chan->channel, delay_ns); |
200 | 207 | ||
201 | cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_UP, 0); | 208 | cc10001_adc_power_down(adc_dev); |
202 | 209 | ||
203 | return val; | 210 | return val; |
204 | } | 211 | } |
@@ -224,7 +231,7 @@ static int cc10001_adc_read_raw(struct iio_dev *indio_dev, | |||
224 | 231 | ||
225 | case IIO_CHAN_INFO_SCALE: | 232 | case IIO_CHAN_INFO_SCALE: |
226 | ret = regulator_get_voltage(adc_dev->reg); | 233 | ret = regulator_get_voltage(adc_dev->reg); |
227 | if (ret) | 234 | if (ret < 0) |
228 | return ret; | 235 | return ret; |
229 | 236 | ||
230 | *val = ret / 1000; | 237 | *val = ret / 1000; |
@@ -255,22 +262,22 @@ static const struct iio_info cc10001_adc_info = { | |||
255 | .update_scan_mode = &cc10001_update_scan_mode, | 262 | .update_scan_mode = &cc10001_update_scan_mode, |
256 | }; | 263 | }; |
257 | 264 | ||
258 | static int cc10001_adc_channel_init(struct iio_dev *indio_dev) | 265 | static int cc10001_adc_channel_init(struct iio_dev *indio_dev, |
266 | unsigned long channel_map) | ||
259 | { | 267 | { |
260 | struct cc10001_adc_device *adc_dev = iio_priv(indio_dev); | ||
261 | struct iio_chan_spec *chan_array, *timestamp; | 268 | struct iio_chan_spec *chan_array, *timestamp; |
262 | unsigned int bit, idx = 0; | 269 | unsigned int bit, idx = 0; |
263 | 270 | ||
264 | indio_dev->num_channels = bitmap_weight(&adc_dev->channel_map, | 271 | indio_dev->num_channels = bitmap_weight(&channel_map, |
265 | CC10001_ADC_NUM_CHANNELS); | 272 | CC10001_ADC_NUM_CHANNELS) + 1; |
266 | 273 | ||
267 | chan_array = devm_kcalloc(&indio_dev->dev, indio_dev->num_channels + 1, | 274 | chan_array = devm_kcalloc(&indio_dev->dev, indio_dev->num_channels, |
268 | sizeof(struct iio_chan_spec), | 275 | sizeof(struct iio_chan_spec), |
269 | GFP_KERNEL); | 276 | GFP_KERNEL); |
270 | if (!chan_array) | 277 | if (!chan_array) |
271 | return -ENOMEM; | 278 | return -ENOMEM; |
272 | 279 | ||
273 | for_each_set_bit(bit, &adc_dev->channel_map, CC10001_ADC_NUM_CHANNELS) { | 280 | for_each_set_bit(bit, &channel_map, CC10001_ADC_NUM_CHANNELS) { |
274 | struct iio_chan_spec *chan = &chan_array[idx]; | 281 | struct iio_chan_spec *chan = &chan_array[idx]; |
275 | 282 | ||
276 | chan->type = IIO_VOLTAGE; | 283 | chan->type = IIO_VOLTAGE; |
@@ -305,6 +312,7 @@ static int cc10001_adc_probe(struct platform_device *pdev) | |||
305 | unsigned long adc_clk_rate; | 312 | unsigned long adc_clk_rate; |
306 | struct resource *res; | 313 | struct resource *res; |
307 | struct iio_dev *indio_dev; | 314 | struct iio_dev *indio_dev; |
315 | unsigned long channel_map; | ||
308 | int ret; | 316 | int ret; |
309 | 317 | ||
310 | indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev)); | 318 | indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev)); |
@@ -313,9 +321,9 @@ static int cc10001_adc_probe(struct platform_device *pdev) | |||
313 | 321 | ||
314 | adc_dev = iio_priv(indio_dev); | 322 | adc_dev = iio_priv(indio_dev); |
315 | 323 | ||
316 | adc_dev->channel_map = GENMASK(CC10001_ADC_NUM_CHANNELS - 1, 0); | 324 | channel_map = GENMASK(CC10001_ADC_NUM_CHANNELS - 1, 0); |
317 | if (!of_property_read_u32(node, "adc-reserved-channels", &ret)) | 325 | if (!of_property_read_u32(node, "adc-reserved-channels", &ret)) |
318 | adc_dev->channel_map &= ~ret; | 326 | channel_map &= ~ret; |
319 | 327 | ||
320 | adc_dev->reg = devm_regulator_get(&pdev->dev, "vref"); | 328 | adc_dev->reg = devm_regulator_get(&pdev->dev, "vref"); |
321 | if (IS_ERR(adc_dev->reg)) | 329 | if (IS_ERR(adc_dev->reg)) |
@@ -361,7 +369,7 @@ static int cc10001_adc_probe(struct platform_device *pdev) | |||
361 | adc_dev->start_delay_ns = adc_dev->eoc_delay_ns * CC10001_WAIT_CYCLES; | 369 | adc_dev->start_delay_ns = adc_dev->eoc_delay_ns * CC10001_WAIT_CYCLES; |
362 | 370 | ||
363 | /* Setup the ADC channels available on the device */ | 371 | /* Setup the ADC channels available on the device */ |
364 | ret = cc10001_adc_channel_init(indio_dev); | 372 | ret = cc10001_adc_channel_init(indio_dev, channel_map); |
365 | if (ret < 0) | 373 | if (ret < 0) |
366 | goto err_disable_clk; | 374 | goto err_disable_clk; |
367 | 375 | ||
diff --git a/drivers/iio/adc/mcp320x.c b/drivers/iio/adc/mcp320x.c index efbfd12a4bfd..8d9c9b9215dd 100644 --- a/drivers/iio/adc/mcp320x.c +++ b/drivers/iio/adc/mcp320x.c | |||
@@ -60,12 +60,12 @@ struct mcp320x { | |||
60 | struct spi_message msg; | 60 | struct spi_message msg; |
61 | struct spi_transfer transfer[2]; | 61 | struct spi_transfer transfer[2]; |
62 | 62 | ||
63 | u8 tx_buf; | ||
64 | u8 rx_buf[2]; | ||
65 | |||
66 | struct regulator *reg; | 63 | struct regulator *reg; |
67 | struct mutex lock; | 64 | struct mutex lock; |
68 | const struct mcp320x_chip_info *chip_info; | 65 | const struct mcp320x_chip_info *chip_info; |
66 | |||
67 | u8 tx_buf ____cacheline_aligned; | ||
68 | u8 rx_buf[2]; | ||
69 | }; | 69 | }; |
70 | 70 | ||
71 | static int mcp320x_channel_to_tx_data(int device_index, | 71 | static int mcp320x_channel_to_tx_data(int device_index, |
diff --git a/drivers/iio/adc/qcom-spmi-vadc.c b/drivers/iio/adc/qcom-spmi-vadc.c index 3211729bcb0b..0c4618b4d515 100644 --- a/drivers/iio/adc/qcom-spmi-vadc.c +++ b/drivers/iio/adc/qcom-spmi-vadc.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/iio/iio.h> | 18 | #include <linux/iio/iio.h> |
19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
21 | #include <linux/math64.h> | ||
21 | #include <linux/module.h> | 22 | #include <linux/module.h> |
22 | #include <linux/of.h> | 23 | #include <linux/of.h> |
23 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
@@ -471,11 +472,11 @@ static s32 vadc_calibrate(struct vadc_priv *vadc, | |||
471 | const struct vadc_channel_prop *prop, u16 adc_code) | 472 | const struct vadc_channel_prop *prop, u16 adc_code) |
472 | { | 473 | { |
473 | const struct vadc_prescale_ratio *prescale; | 474 | const struct vadc_prescale_ratio *prescale; |
474 | s32 voltage; | 475 | s64 voltage; |
475 | 476 | ||
476 | voltage = adc_code - vadc->graph[prop->calibration].gnd; | 477 | voltage = adc_code - vadc->graph[prop->calibration].gnd; |
477 | voltage *= vadc->graph[prop->calibration].dx; | 478 | voltage *= vadc->graph[prop->calibration].dx; |
478 | voltage = voltage / vadc->graph[prop->calibration].dy; | 479 | voltage = div64_s64(voltage, vadc->graph[prop->calibration].dy); |
479 | 480 | ||
480 | if (prop->calibration == VADC_CALIB_ABSOLUTE) | 481 | if (prop->calibration == VADC_CALIB_ABSOLUTE) |
481 | voltage += vadc->graph[prop->calibration].dx; | 482 | voltage += vadc->graph[prop->calibration].dx; |
@@ -487,7 +488,7 @@ static s32 vadc_calibrate(struct vadc_priv *vadc, | |||
487 | 488 | ||
488 | voltage = voltage * prescale->den; | 489 | voltage = voltage * prescale->den; |
489 | 490 | ||
490 | return voltage / prescale->num; | 491 | return div64_s64(voltage, prescale->num); |
491 | } | 492 | } |
492 | 493 | ||
493 | static int vadc_decimation_from_dt(u32 value) | 494 | static int vadc_decimation_from_dt(u32 value) |
diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index a221f7329b79..ce93bd8e3f68 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c | |||
@@ -856,6 +856,7 @@ static int xadc_read_raw(struct iio_dev *indio_dev, | |||
856 | switch (chan->address) { | 856 | switch (chan->address) { |
857 | case XADC_REG_VCCINT: | 857 | case XADC_REG_VCCINT: |
858 | case XADC_REG_VCCAUX: | 858 | case XADC_REG_VCCAUX: |
859 | case XADC_REG_VREFP: | ||
859 | case XADC_REG_VCCBRAM: | 860 | case XADC_REG_VCCBRAM: |
860 | case XADC_REG_VCCPINT: | 861 | case XADC_REG_VCCPINT: |
861 | case XADC_REG_VCCPAUX: | 862 | case XADC_REG_VCCPAUX: |
@@ -996,7 +997,7 @@ static const struct iio_event_spec xadc_voltage_events[] = { | |||
996 | .num_event_specs = (_alarm) ? ARRAY_SIZE(xadc_voltage_events) : 0, \ | 997 | .num_event_specs = (_alarm) ? ARRAY_SIZE(xadc_voltage_events) : 0, \ |
997 | .scan_index = (_scan_index), \ | 998 | .scan_index = (_scan_index), \ |
998 | .scan_type = { \ | 999 | .scan_type = { \ |
999 | .sign = 'u', \ | 1000 | .sign = ((_addr) == XADC_REG_VREFN) ? 's' : 'u', \ |
1000 | .realbits = 12, \ | 1001 | .realbits = 12, \ |
1001 | .storagebits = 16, \ | 1002 | .storagebits = 16, \ |
1002 | .shift = 4, \ | 1003 | .shift = 4, \ |
@@ -1008,7 +1009,7 @@ static const struct iio_event_spec xadc_voltage_events[] = { | |||
1008 | static const struct iio_chan_spec xadc_channels[] = { | 1009 | static const struct iio_chan_spec xadc_channels[] = { |
1009 | XADC_CHAN_TEMP(0, 8, XADC_REG_TEMP), | 1010 | XADC_CHAN_TEMP(0, 8, XADC_REG_TEMP), |
1010 | XADC_CHAN_VOLTAGE(0, 9, XADC_REG_VCCINT, "vccint", true), | 1011 | XADC_CHAN_VOLTAGE(0, 9, XADC_REG_VCCINT, "vccint", true), |
1011 | XADC_CHAN_VOLTAGE(1, 10, XADC_REG_VCCINT, "vccaux", true), | 1012 | XADC_CHAN_VOLTAGE(1, 10, XADC_REG_VCCAUX, "vccaux", true), |
1012 | XADC_CHAN_VOLTAGE(2, 14, XADC_REG_VCCBRAM, "vccbram", true), | 1013 | XADC_CHAN_VOLTAGE(2, 14, XADC_REG_VCCBRAM, "vccbram", true), |
1013 | XADC_CHAN_VOLTAGE(3, 5, XADC_REG_VCCPINT, "vccpint", true), | 1014 | XADC_CHAN_VOLTAGE(3, 5, XADC_REG_VCCPINT, "vccpint", true), |
1014 | XADC_CHAN_VOLTAGE(4, 6, XADC_REG_VCCPAUX, "vccpaux", true), | 1015 | XADC_CHAN_VOLTAGE(4, 6, XADC_REG_VCCPAUX, "vccpaux", true), |
diff --git a/drivers/iio/adc/xilinx-xadc.h b/drivers/iio/adc/xilinx-xadc.h index c7487e8d7f80..54adc5087210 100644 --- a/drivers/iio/adc/xilinx-xadc.h +++ b/drivers/iio/adc/xilinx-xadc.h | |||
@@ -145,9 +145,9 @@ static inline int xadc_write_adc_reg(struct xadc *xadc, unsigned int reg, | |||
145 | #define XADC_REG_MAX_VCCPINT 0x28 | 145 | #define XADC_REG_MAX_VCCPINT 0x28 |
146 | #define XADC_REG_MAX_VCCPAUX 0x29 | 146 | #define XADC_REG_MAX_VCCPAUX 0x29 |
147 | #define XADC_REG_MAX_VCCO_DDR 0x2a | 147 | #define XADC_REG_MAX_VCCO_DDR 0x2a |
148 | #define XADC_REG_MIN_VCCPINT 0x2b | 148 | #define XADC_REG_MIN_VCCPINT 0x2c |
149 | #define XADC_REG_MIN_VCCPAUX 0x2c | 149 | #define XADC_REG_MIN_VCCPAUX 0x2d |
150 | #define XADC_REG_MIN_VCCO_DDR 0x2d | 150 | #define XADC_REG_MIN_VCCO_DDR 0x2e |
151 | 151 | ||
152 | #define XADC_REG_CONF0 0x40 | 152 | #define XADC_REG_CONF0 0x40 |
153 | #define XADC_REG_CONF1 0x41 | 153 | #define XADC_REG_CONF1 0x41 |