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authorMathieu Poirier <mathieu.poirier@linaro.org>2016-05-03 13:33:47 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-05-03 17:59:30 -0400
commitebba56e7b2bd2c9c2bbe02fad8808feef18e1519 (patch)
treef43d89b3c62e546154202a48d7485ad89b2b0cc3 /drivers/hwtracing
parentb1789b793eb4627928f55a6acea8da7c25e5c6b4 (diff)
coresight: tmc: clearly define number of transfers per burst
This patch makes the name of the define reflect the amount of data tranfers per burst, in this case 16. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing')
-rw-r--r--drivers/hwtracing/coresight/coresight-tmc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index d211aeec49f8..8751d53fa078 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -67,7 +67,7 @@
67#define TMC_AXICTL_PROT_CTL_B0 BIT(0) 67#define TMC_AXICTL_PROT_CTL_B0 BIT(0)
68#define TMC_AXICTL_PROT_CTL_B1 BIT(1) 68#define TMC_AXICTL_PROT_CTL_B1 BIT(1)
69#define TMC_AXICTL_SCT_GAT_MODE BIT(7) 69#define TMC_AXICTL_SCT_GAT_MODE BIT(7)
70#define TMC_AXICTL_WR_BURST_LEN 0xF00 70#define TMC_AXICTL_WR_BURST_16 0xF00
71/* TMC_FFCR - 0x304 */ 71/* TMC_FFCR - 0x304 */
72#define TMC_FFCR_EN_FMT BIT(0) 72#define TMC_FFCR_EN_FMT BIT(0)
73#define TMC_FFCR_EN_TI BIT(1) 73#define TMC_FFCR_EN_TI BIT(1)
@@ -211,7 +211,7 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
211 writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); 211 writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
212 212
213 axictl = readl_relaxed(drvdata->base + TMC_AXICTL); 213 axictl = readl_relaxed(drvdata->base + TMC_AXICTL);
214 axictl |= TMC_AXICTL_WR_BURST_LEN; 214 axictl |= TMC_AXICTL_WR_BURST_16;
215 writel_relaxed(axictl, drvdata->base + TMC_AXICTL); 215 writel_relaxed(axictl, drvdata->base + TMC_AXICTL);
216 axictl &= ~TMC_AXICTL_SCT_GAT_MODE; 216 axictl &= ~TMC_AXICTL_SCT_GAT_MODE;
217 writel_relaxed(axictl, drvdata->base + TMC_AXICTL); 217 writel_relaxed(axictl, drvdata->base + TMC_AXICTL);