diff options
| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2016-09-22 07:06:47 -0400 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-11-02 04:48:18 -0400 |
| commit | fb7f3c4399ffa75bc31aaaaeab45238ea60c3d1a (patch) | |
| tree | c965aaf38f4b42be24b8e16d8aff7f0184122fb4 /drivers/gpu | |
| parent | 81899060de35d80f17020d322e77311f1b255885 (diff) | |
drm/omap: omap_display_timings: rename y_res to vactive
In preparation to move the stack to use the generic videmode struct for
display timing information rename the y_res member to vactive.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu')
21 files changed, 45 insertions, 43 deletions
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c index 190a03672181..a57e1efb12ac 100644 --- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c +++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c | |||
| @@ -31,7 +31,7 @@ struct panel_drv_data { | |||
| 31 | 31 | ||
| 32 | static const struct omap_video_timings tvc_pal_timings = { | 32 | static const struct omap_video_timings tvc_pal_timings = { |
| 33 | .hactive = 720, | 33 | .hactive = 720, |
| 34 | .y_res = 574, | 34 | .vactive = 574, |
| 35 | .pixelclock = 13500000, | 35 | .pixelclock = 13500000, |
| 36 | .hsw = 64, | 36 | .hsw = 64, |
| 37 | .hfp = 12, | 37 | .hfp = 12, |
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c index c6e02e1a3799..b25c05c27c80 100644 --- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c +++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c | |||
| @@ -21,7 +21,7 @@ | |||
| 21 | 21 | ||
| 22 | static const struct omap_video_timings dvic_default_timings = { | 22 | static const struct omap_video_timings dvic_default_timings = { |
| 23 | .hactive = 640, | 23 | .hactive = 640, |
| 24 | .y_res = 480, | 24 | .vactive = 480, |
| 25 | 25 | ||
| 26 | .pixelclock = 23500000, | 26 | .pixelclock = 23500000, |
| 27 | 27 | ||
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c index ef5ae08b362b..33bc41c5cf71 100644 --- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c +++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c | |||
| @@ -23,7 +23,7 @@ | |||
| 23 | 23 | ||
| 24 | static const struct omap_video_timings hdmic_default_timings = { | 24 | static const struct omap_video_timings hdmic_default_timings = { |
| 25 | .hactive = 640, | 25 | .hactive = 640, |
| 26 | .y_res = 480, | 26 | .vactive = 480, |
| 27 | .pixelclock = 25175000, | 27 | .pixelclock = 25175000, |
| 28 | .hsw = 96, | 28 | .hsw = 96, |
| 29 | .hfp = 16, | 29 | .hfp = 16, |
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c index c34f2aa0118b..c3d2a12358fa 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | |||
| @@ -383,7 +383,7 @@ static void dsicm_get_resolution(struct omap_dss_device *dssdev, | |||
| 383 | u16 *xres, u16 *yres) | 383 | u16 *xres, u16 *yres) |
| 384 | { | 384 | { |
| 385 | *xres = dssdev->panel.timings.hactive; | 385 | *xres = dssdev->panel.timings.hactive; |
| 386 | *yres = dssdev->panel.timings.y_res; | 386 | *yres = dssdev->panel.timings.vactive; |
| 387 | } | 387 | } |
| 388 | 388 | ||
| 389 | static ssize_t dsicm_num_errors_show(struct device *dev, | 389 | static ssize_t dsicm_num_errors_show(struct device *dev, |
| @@ -893,7 +893,7 @@ static int dsicm_update(struct omap_dss_device *dssdev, | |||
| 893 | /* XXX no need to send this every frame, but dsi break if not done */ | 893 | /* XXX no need to send this every frame, but dsi break if not done */ |
| 894 | r = dsicm_set_update_window(ddata, 0, 0, | 894 | r = dsicm_set_update_window(ddata, 0, 0, |
| 895 | dssdev->panel.timings.hactive, | 895 | dssdev->panel.timings.hactive, |
| 896 | dssdev->panel.timings.y_res); | 896 | dssdev->panel.timings.vactive); |
| 897 | if (r) | 897 | if (r) |
| 898 | goto err; | 898 | goto err; |
| 899 | 899 | ||
| @@ -1025,7 +1025,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev, | |||
| 1025 | 1025 | ||
| 1026 | size = min(w * h * 3, | 1026 | size = min(w * h * 3, |
| 1027 | dssdev->panel.timings.hactive * | 1027 | dssdev->panel.timings.hactive * |
| 1028 | dssdev->panel.timings.y_res * 3); | 1028 | dssdev->panel.timings.vactive * 3); |
| 1029 | 1029 | ||
| 1030 | in->ops.dsi->bus_lock(in); | 1030 | in->ops.dsi->bus_lock(in); |
| 1031 | 1031 | ||
| @@ -1187,7 +1187,7 @@ static int dsicm_probe(struct platform_device *pdev) | |||
| 1187 | return r; | 1187 | return r; |
| 1188 | 1188 | ||
| 1189 | ddata->timings.hactive = 864; | 1189 | ddata->timings.hactive = 864; |
| 1190 | ddata->timings.y_res = 480; | 1190 | ddata->timings.vactive = 480; |
| 1191 | ddata->timings.pixelclock = 864 * 480 * 60; | 1191 | ddata->timings.pixelclock = 864 * 480 * 60; |
| 1192 | 1192 | ||
| 1193 | dssdev = &ddata->dssdev; | 1193 | dssdev = &ddata->dssdev; |
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c index c8b5462f462f..dc8d191e3635 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c | |||
| @@ -21,7 +21,7 @@ | |||
| 21 | 21 | ||
| 22 | static struct omap_video_timings lb035q02_timings = { | 22 | static struct omap_video_timings lb035q02_timings = { |
| 23 | .hactive = 320, | 23 | .hactive = 320, |
| 24 | .y_res = 240, | 24 | .vactive = 240, |
| 25 | 25 | ||
| 26 | .pixelclock = 6500000, | 26 | .pixelclock = 6500000, |
| 27 | 27 | ||
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c index f0895c7b6d5c..83658b9077fc 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c | |||
| @@ -67,7 +67,7 @@ static const struct { | |||
| 67 | 67 | ||
| 68 | static const struct omap_video_timings nec_8048_panel_timings = { | 68 | static const struct omap_video_timings nec_8048_panel_timings = { |
| 69 | .hactive = LCD_XRES, | 69 | .hactive = LCD_XRES, |
| 70 | .y_res = LCD_YRES, | 70 | .vactive = LCD_YRES, |
| 71 | .pixelclock = LCD_PIXEL_CLOCK, | 71 | .pixelclock = LCD_PIXEL_CLOCK, |
| 72 | .hfp = 6, | 72 | .hfp = 6, |
| 73 | .hsw = 1, | 73 | .hsw = 1, |
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c index b66ad743c607..c2dda73ac466 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c | |||
| @@ -37,7 +37,7 @@ struct panel_drv_data { | |||
| 37 | 37 | ||
| 38 | static const struct omap_video_timings sharp_ls_timings = { | 38 | static const struct omap_video_timings sharp_ls_timings = { |
| 39 | .hactive = 480, | 39 | .hactive = 480, |
| 40 | .y_res = 640, | 40 | .vactive = 640, |
| 41 | 41 | ||
| 42 | .pixelclock = 19200000, | 42 | .pixelclock = 19200000, |
| 43 | 43 | ||
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c index 2764bc94a205..a7a6d5239f31 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c | |||
| @@ -94,7 +94,7 @@ struct panel_drv_data { | |||
| 94 | 94 | ||
| 95 | static const struct omap_video_timings acx565akm_panel_timings = { | 95 | static const struct omap_video_timings acx565akm_panel_timings = { |
| 96 | .hactive = 800, | 96 | .hactive = 800, |
| 97 | .y_res = 480, | 97 | .vactive = 480, |
| 98 | .pixelclock = 24000000, | 98 | .pixelclock = 24000000, |
| 99 | .hfp = 28, | 99 | .hfp = 28, |
| 100 | .hsw = 4, | 100 | .hsw = 4, |
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c index 935728405cde..013286abbfda 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c | |||
| @@ -44,7 +44,7 @@ struct panel_drv_data { | |||
| 44 | 44 | ||
| 45 | static struct omap_video_timings td028ttec1_panel_timings = { | 45 | static struct omap_video_timings td028ttec1_panel_timings = { |
| 46 | .hactive = 480, | 46 | .hactive = 480, |
| 47 | .y_res = 640, | 47 | .vactive = 640, |
| 48 | .pixelclock = 22153000, | 48 | .pixelclock = 22153000, |
| 49 | .hfp = 24, | 49 | .hfp = 24, |
| 50 | .hsw = 8, | 50 | .hsw = 8, |
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c index fe8166640da8..eedbea62c51d 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c | |||
| @@ -74,7 +74,7 @@ struct panel_drv_data { | |||
| 74 | 74 | ||
| 75 | static const struct omap_video_timings tpo_td043_timings = { | 75 | static const struct omap_video_timings tpo_td043_timings = { |
| 76 | .hactive = 800, | 76 | .hactive = 800, |
| 77 | .y_res = 480, | 77 | .vactive = 480, |
| 78 | 78 | ||
| 79 | .pixelclock = 36000000, | 79 | .pixelclock = 36000000, |
| 80 | 80 | ||
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index b34ac915a761..3d208ce67794 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c | |||
| @@ -2820,7 +2820,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, | |||
| 2820 | const bool replication = false; | 2820 | const bool replication = false; |
| 2821 | bool truncation; | 2821 | bool truncation; |
| 2822 | int in_width = mgr_timings->hactive; | 2822 | int in_width = mgr_timings->hactive; |
| 2823 | int in_height = mgr_timings->y_res; | 2823 | int in_height = mgr_timings->vactive; |
| 2824 | enum omap_overlay_caps caps = | 2824 | enum omap_overlay_caps caps = |
| 2825 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA; | 2825 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA; |
| 2826 | 2826 | ||
| @@ -3118,7 +3118,7 @@ static bool _dispc_mgr_pclk_ok(enum omap_channel channel, | |||
| 3118 | bool dispc_mgr_timings_ok(enum omap_channel channel, | 3118 | bool dispc_mgr_timings_ok(enum omap_channel channel, |
| 3119 | const struct omap_video_timings *timings) | 3119 | const struct omap_video_timings *timings) |
| 3120 | { | 3120 | { |
| 3121 | if (!_dispc_mgr_size_ok(timings->hactive, timings->y_res)) | 3121 | if (!_dispc_mgr_size_ok(timings->hactive, timings->vactive)) |
| 3122 | return false; | 3122 | return false; |
| 3123 | 3123 | ||
| 3124 | if (!_dispc_mgr_pclk_ok(channel, timings->pixelclock)) | 3124 | if (!_dispc_mgr_pclk_ok(channel, timings->pixelclock)) |
| @@ -3259,7 +3259,7 @@ void dispc_mgr_set_timings(enum omap_channel channel, | |||
| 3259 | unsigned long ht, vt; | 3259 | unsigned long ht, vt; |
| 3260 | struct omap_video_timings t = *timings; | 3260 | struct omap_video_timings t = *timings; |
| 3261 | 3261 | ||
| 3262 | DSSDBG("channel %d xres %u yres %u\n", channel, t.hactive, t.y_res); | 3262 | DSSDBG("channel %d xres %u yres %u\n", channel, t.hactive, t.vactive); |
| 3263 | 3263 | ||
| 3264 | if (!dispc_mgr_timings_ok(channel, &t)) { | 3264 | if (!dispc_mgr_timings_ok(channel, &t)) { |
| 3265 | BUG(); | 3265 | BUG(); |
| @@ -3272,7 +3272,7 @@ void dispc_mgr_set_timings(enum omap_channel channel, | |||
| 3272 | t.data_pclk_edge, t.de_level, t.sync_pclk_edge); | 3272 | t.data_pclk_edge, t.de_level, t.sync_pclk_edge); |
| 3273 | 3273 | ||
| 3274 | xtot = t.hactive + t.hfp + t.hsw + t.hbp; | 3274 | xtot = t.hactive + t.hfp + t.hsw + t.hbp; |
| 3275 | ytot = t.y_res + t.vfp + t.vsw + t.vbp; | 3275 | ytot = t.vactive + t.vfp + t.vsw + t.vbp; |
| 3276 | 3276 | ||
| 3277 | ht = timings->pixelclock / xtot; | 3277 | ht = timings->pixelclock / xtot; |
| 3278 | vt = timings->pixelclock / xtot / ytot; | 3278 | vt = timings->pixelclock / xtot / ytot; |
| @@ -3287,14 +3287,14 @@ void dispc_mgr_set_timings(enum omap_channel channel, | |||
| 3287 | DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt); | 3287 | DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt); |
| 3288 | } else { | 3288 | } else { |
| 3289 | if (t.interlace) | 3289 | if (t.interlace) |
| 3290 | t.y_res /= 2; | 3290 | t.vactive /= 2; |
| 3291 | 3291 | ||
| 3292 | if (dispc.feat->supports_double_pixel) | 3292 | if (dispc.feat->supports_double_pixel) |
| 3293 | REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0, | 3293 | REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0, |
| 3294 | 19, 17); | 3294 | 19, 17); |
| 3295 | } | 3295 | } |
| 3296 | 3296 | ||
| 3297 | dispc_mgr_set_size(channel, t.hactive, t.y_res); | 3297 | dispc_mgr_set_size(channel, t.hactive, t.vactive); |
| 3298 | } | 3298 | } |
| 3299 | EXPORT_SYMBOL(dispc_mgr_set_timings); | 3299 | EXPORT_SYMBOL(dispc_mgr_set_timings); |
| 3300 | 3300 | ||
| @@ -4220,7 +4220,7 @@ static const struct dispc_errata_i734_data { | |||
| 4220 | struct dss_lcd_mgr_config lcd_conf; | 4220 | struct dss_lcd_mgr_config lcd_conf; |
| 4221 | } i734 = { | 4221 | } i734 = { |
| 4222 | .timings = { | 4222 | .timings = { |
| 4223 | .hactive = 8, .y_res = 1, | 4223 | .hactive = 8, .vactive = 1, |
| 4224 | .pixelclock = 16000000, | 4224 | .pixelclock = 16000000, |
| 4225 | .hsw = 8, .hfp = 4, .hbp = 4, | 4225 | .hsw = 8, .hfp = 4, .hbp = 4, |
| 4226 | .vsw = 1, .vfp = 1, .vbp = 1, | 4226 | .vsw = 1, .vfp = 1, .vbp = 1, |
diff --git a/drivers/gpu/drm/omapdrm/dss/display.c b/drivers/gpu/drm/omapdrm/dss/display.c index 4808cc8368c5..29ae5d6e1508 100644 --- a/drivers/gpu/drm/omapdrm/dss/display.c +++ b/drivers/gpu/drm/omapdrm/dss/display.c | |||
| @@ -36,7 +36,7 @@ void omapdss_default_get_resolution(struct omap_dss_device *dssdev, | |||
| 36 | u16 *xres, u16 *yres) | 36 | u16 *xres, u16 *yres) |
| 37 | { | 37 | { |
| 38 | *xres = dssdev->panel.timings.hactive; | 38 | *xres = dssdev->panel.timings.hactive; |
| 39 | *yres = dssdev->panel.timings.y_res; | 39 | *yres = dssdev->panel.timings.vactive; |
| 40 | } | 40 | } |
| 41 | EXPORT_SYMBOL(omapdss_default_get_resolution); | 41 | EXPORT_SYMBOL(omapdss_default_get_resolution); |
| 42 | 42 | ||
| @@ -228,7 +228,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, | |||
| 228 | ovt->hbp = vm->hback_porch; | 228 | ovt->hbp = vm->hback_porch; |
| 229 | ovt->hfp = vm->hfront_porch; | 229 | ovt->hfp = vm->hfront_porch; |
| 230 | ovt->hsw = vm->hsync_len; | 230 | ovt->hsw = vm->hsync_len; |
| 231 | ovt->y_res = vm->vactive; | 231 | ovt->vactive = vm->vactive; |
| 232 | ovt->vbp = vm->vback_porch; | 232 | ovt->vbp = vm->vback_porch; |
| 233 | ovt->vfp = vm->vfront_porch; | 233 | ovt->vfp = vm->vfront_porch; |
| 234 | ovt->vsw = vm->vsync_len; | 234 | ovt->vsw = vm->vsync_len; |
| @@ -261,7 +261,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt, | |||
| 261 | vm->hback_porch = ovt->hbp; | 261 | vm->hback_porch = ovt->hbp; |
| 262 | vm->hfront_porch = ovt->hfp; | 262 | vm->hfront_porch = ovt->hfp; |
| 263 | vm->hsync_len = ovt->hsw; | 263 | vm->hsync_len = ovt->hsw; |
| 264 | vm->vactive = ovt->y_res; | 264 | vm->vactive = ovt->vactive; |
| 265 | vm->vback_porch = ovt->vbp; | 265 | vm->vback_porch = ovt->vbp; |
| 266 | vm->vfront_porch = ovt->vfp; | 266 | vm->vfront_porch = ovt->vfp; |
| 267 | vm->vsync_len = ovt->vsw; | 267 | vm->vsync_len = ovt->vsw; |
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 2bd4d0cdd2f2..06b15091d62f 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c | |||
| @@ -3722,7 +3722,7 @@ static void dsi_proto_timings(struct platform_device *dsidev) | |||
| 3722 | DSSDBG("HBP: %d, HFP: %d, HSA: %d, TL: %d TXBYTECLKHS\n", hbp, | 3722 | DSSDBG("HBP: %d, HFP: %d, HSA: %d, TL: %d TXBYTECLKHS\n", hbp, |
| 3723 | hfp, hsync_end ? hsa : 0, tl); | 3723 | hfp, hsync_end ? hsa : 0, tl); |
| 3724 | DSSDBG("VBP: %d, VFP: %d, VSA: %d, VACT: %d lines\n", vbp, vfp, | 3724 | DSSDBG("VBP: %d, VFP: %d, VSA: %d, VACT: %d lines\n", vbp, vfp, |
| 3725 | vsa, timings->y_res); | 3725 | vsa, timings->vactive); |
| 3726 | 3726 | ||
| 3727 | r = dsi_read_reg(dsidev, DSI_VM_TIMING1); | 3727 | r = dsi_read_reg(dsidev, DSI_VM_TIMING1); |
| 3728 | r = FLD_MOD(r, hbp, 11, 0); /* HBP */ | 3728 | r = FLD_MOD(r, hbp, 11, 0); /* HBP */ |
| @@ -3738,7 +3738,7 @@ static void dsi_proto_timings(struct platform_device *dsidev) | |||
| 3738 | dsi_write_reg(dsidev, DSI_VM_TIMING2, r); | 3738 | dsi_write_reg(dsidev, DSI_VM_TIMING2, r); |
| 3739 | 3739 | ||
| 3740 | r = dsi_read_reg(dsidev, DSI_VM_TIMING3); | 3740 | r = dsi_read_reg(dsidev, DSI_VM_TIMING3); |
| 3741 | r = FLD_MOD(r, timings->y_res, 14, 0); /* VACT */ | 3741 | r = FLD_MOD(r, timings->vactive, 14, 0); /* VACT */ |
| 3742 | r = FLD_MOD(r, tl, 31, 16); /* TL */ | 3742 | r = FLD_MOD(r, tl, 31, 16); /* TL */ |
| 3743 | dsi_write_reg(dsidev, DSI_VM_TIMING3, r); | 3743 | dsi_write_reg(dsidev, DSI_VM_TIMING3, r); |
| 3744 | } | 3744 | } |
| @@ -3919,7 +3919,7 @@ static void dsi_update_screen_dispc(struct platform_device *dsidev) | |||
| 3919 | const unsigned channel = dsi->update_channel; | 3919 | const unsigned channel = dsi->update_channel; |
| 3920 | const unsigned line_buf_size = dsi->line_buffer_size; | 3920 | const unsigned line_buf_size = dsi->line_buffer_size; |
| 3921 | u16 w = dsi->timings.hactive; | 3921 | u16 w = dsi->timings.hactive; |
| 3922 | u16 h = dsi->timings.y_res; | 3922 | u16 h = dsi->timings.vactive; |
| 3923 | 3923 | ||
| 3924 | DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h); | 3924 | DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h); |
| 3925 | 3925 | ||
| @@ -4057,7 +4057,7 @@ static int dsi_update(struct omap_dss_device *dssdev, int channel, | |||
| 4057 | dsi->framedone_data = data; | 4057 | dsi->framedone_data = data; |
| 4058 | 4058 | ||
| 4059 | dw = dsi->timings.hactive; | 4059 | dw = dsi->timings.hactive; |
| 4060 | dh = dsi->timings.y_res; | 4060 | dh = dsi->timings.vactive; |
| 4061 | 4061 | ||
| 4062 | #ifdef DSI_PERF_MEASURE | 4062 | #ifdef DSI_PERF_MEASURE |
| 4063 | dsi->update_bytes = dw * dh * | 4063 | dsi->update_bytes = dw * dh * |
| @@ -4422,7 +4422,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck, | |||
| 4422 | *t = *ctx->config->timings; | 4422 | *t = *ctx->config->timings; |
| 4423 | t->pixelclock = pck; | 4423 | t->pixelclock = pck; |
| 4424 | t->hactive = ctx->config->timings->hactive; | 4424 | t->hactive = ctx->config->timings->hactive; |
| 4425 | t->y_res = ctx->config->timings->y_res; | 4425 | t->vactive = ctx->config->timings->vactive; |
| 4426 | t->hsw = t->hfp = t->hbp = t->vsw = 1; | 4426 | t->hsw = t->hfp = t->hbp = t->vsw = 1; |
| 4427 | t->vfp = t->vbp = 0; | 4427 | t->vfp = t->vbp = 0; |
| 4428 | 4428 | ||
| @@ -4635,7 +4635,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx) | |||
| 4635 | 4635 | ||
| 4636 | dsi_vm->vsa = req_vm->vsw; | 4636 | dsi_vm->vsa = req_vm->vsw; |
| 4637 | dsi_vm->vbp = req_vm->vbp; | 4637 | dsi_vm->vbp = req_vm->vbp; |
| 4638 | dsi_vm->vact = req_vm->y_res; | 4638 | dsi_vm->vact = req_vm->vactive; |
| 4639 | dsi_vm->vfp = req_vm->vfp; | 4639 | dsi_vm->vfp = req_vm->vfp; |
| 4640 | 4640 | ||
| 4641 | dsi_vm->trans_mode = cfg->trans_mode; | 4641 | dsi_vm->trans_mode = cfg->trans_mode; |
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c b/drivers/gpu/drm/omapdrm/dss/hdmi4.c index c5e89c887687..2a5a71a25423 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c | |||
| @@ -171,7 +171,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) | |||
| 171 | 171 | ||
| 172 | p = &hdmi.cfg.timings; | 172 | p = &hdmi.cfg.timings; |
| 173 | 173 | ||
| 174 | DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res); | 174 | DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", p->hactive, |
| 175 | p->vactive); | ||
| 175 | 176 | ||
| 176 | pc = p->pixelclock; | 177 | pc = p->pixelclock; |
| 177 | if (p->double_pixel) | 178 | if (p->double_pixel) |
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c b/drivers/gpu/drm/omapdrm/dss/hdmi5.c index 829d22253972..45f445523a4f 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c | |||
| @@ -183,7 +183,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) | |||
| 183 | 183 | ||
| 184 | p = &hdmi.cfg.timings; | 184 | p = &hdmi.cfg.timings; |
| 185 | 185 | ||
| 186 | DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res); | 186 | DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", p->hactive, |
| 187 | p->vactive); | ||
| 187 | 188 | ||
| 188 | pc = p->pixelclock; | 189 | pc = p->pixelclock; |
| 189 | if (p->double_pixel) | 190 | if (p->double_pixel) |
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c index cecc400b08e2..3f76976b0e38 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | |||
| @@ -308,7 +308,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg, | |||
| 308 | if (video_cfg->vblank % 2 != 0) | 308 | if (video_cfg->vblank % 2 != 0) |
| 309 | video_cfg->vblank_osc = 1; | 309 | video_cfg->vblank_osc = 1; |
| 310 | 310 | ||
| 311 | video_cfg->v_fc_config.timings.y_res /= 2; | 311 | video_cfg->v_fc_config.timings.vactive /= 2; |
| 312 | video_cfg->vblank /= 2; | 312 | video_cfg->vblank /= 2; |
| 313 | video_cfg->v_fc_config.timings.vfp /= 2; | 313 | video_cfg->v_fc_config.timings.vfp /= 2; |
| 314 | video_cfg->v_fc_config.timings.vsw /= 2; | 314 | video_cfg->v_fc_config.timings.vsw /= 2; |
| @@ -354,9 +354,9 @@ static void hdmi_core_video_config(struct hdmi_core_data *core, | |||
| 354 | 354 | ||
| 355 | /* set y resolution */ | 355 | /* set y resolution */ |
| 356 | REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1, | 356 | REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1, |
| 357 | cfg->v_fc_config.timings.y_res >> 8, 4, 0); | 357 | cfg->v_fc_config.timings.vactive >> 8, 4, 0); |
| 358 | REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0, | 358 | REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0, |
| 359 | cfg->v_fc_config.timings.y_res & 0xFF, 7, 0); | 359 | cfg->v_fc_config.timings.vactive & 0xFF, 7, 0); |
| 360 | 360 | ||
| 361 | /* set horizontal blanking pixels */ | 361 | /* set horizontal blanking pixels */ |
| 362 | REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK1, cfg->hblank >> 8, 4, 0); | 362 | REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK1, cfg->hblank >> 8, 4, 0); |
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c index 17f0d7afb855..05462cfe5af8 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | |||
| @@ -198,7 +198,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt, | |||
| 198 | DSSDBG("Enter hdmi_wp_video_init_format\n"); | 198 | DSSDBG("Enter hdmi_wp_video_init_format\n"); |
| 199 | 199 | ||
| 200 | video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444; | 200 | video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444; |
| 201 | video_fmt->y_res = param->timings.y_res; | 201 | video_fmt->y_res = param->timings.vactive; |
| 202 | video_fmt->x_res = param->timings.hactive; | 202 | video_fmt->x_res = param->timings.hactive; |
| 203 | 203 | ||
| 204 | timings->hbp = param->timings.hbp; | 204 | timings->hbp = param->timings.hbp; |
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index ddd6d14049d0..0b969f6f5701 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h | |||
| @@ -303,7 +303,7 @@ struct omap_video_timings { | |||
| 303 | /* Unit: pixels */ | 303 | /* Unit: pixels */ |
| 304 | u16 hactive; | 304 | u16 hactive; |
| 305 | /* Unit: pixels */ | 305 | /* Unit: pixels */ |
| 306 | u16 y_res; | 306 | u16 vactive; |
| 307 | /* Unit: Hz */ | 307 | /* Unit: Hz */ |
| 308 | u32 pixelclock; | 308 | u32 pixelclock; |
| 309 | /* Unit: pixel clocks */ | 309 | /* Unit: pixel clocks */ |
diff --git a/drivers/gpu/drm/omapdrm/dss/rfbi.c b/drivers/gpu/drm/omapdrm/dss/rfbi.c index 81d26d1562f6..ef9984c3d906 100644 --- a/drivers/gpu/drm/omapdrm/dss/rfbi.c +++ b/drivers/gpu/drm/omapdrm/dss/rfbi.c | |||
| @@ -309,7 +309,7 @@ static int rfbi_transfer_area(struct omap_dss_device *dssdev, | |||
| 309 | int r; | 309 | int r; |
| 310 | struct omap_overlay_manager *mgr = rfbi.output.manager; | 310 | struct omap_overlay_manager *mgr = rfbi.output.manager; |
| 311 | u16 width = rfbi.timings.hactive; | 311 | u16 width = rfbi.timings.hactive; |
| 312 | u16 height = rfbi.timings.y_res; | 312 | u16 height = rfbi.timings.vactive; |
| 313 | 313 | ||
| 314 | /*BUG_ON(callback == 0);*/ | 314 | /*BUG_ON(callback == 0);*/ |
| 315 | BUG_ON(rfbi.framedone_callback != NULL); | 315 | BUG_ON(rfbi.framedone_callback != NULL); |
| @@ -778,7 +778,7 @@ static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *), | |||
| 778 | static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h) | 778 | static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h) |
| 779 | { | 779 | { |
| 780 | rfbi.timings.hactive = w; | 780 | rfbi.timings.hactive = w; |
| 781 | rfbi.timings.y_res = h; | 781 | rfbi.timings.vactive = h; |
| 782 | } | 782 | } |
| 783 | 783 | ||
| 784 | static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size) | 784 | static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size) |
| @@ -854,7 +854,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev) | |||
| 854 | dss_mgr_set_lcd_config(mgr, &mgr_config); | 854 | dss_mgr_set_lcd_config(mgr, &mgr_config); |
| 855 | 855 | ||
| 856 | /* | 856 | /* |
| 857 | * Set rfbi.timings with default values, the hactive and y_res fields | 857 | * Set rfbi.timings with default values, the hactive and vactive fields |
| 858 | * are expected to be already configured by the panel driver via | 858 | * are expected to be already configured by the panel driver via |
| 859 | * omapdss_rfbi_set_size() | 859 | * omapdss_rfbi_set_size() |
| 860 | */ | 860 | */ |
diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c b/drivers/gpu/drm/omapdrm/dss/venc.c index 970c3cb97a8c..463dc4e27f7a 100644 --- a/drivers/gpu/drm/omapdrm/dss/venc.c +++ b/drivers/gpu/drm/omapdrm/dss/venc.c | |||
| @@ -264,7 +264,7 @@ static const struct venc_config venc_config_pal_bdghi = { | |||
| 264 | 264 | ||
| 265 | const struct omap_video_timings omap_dss_pal_timings = { | 265 | const struct omap_video_timings omap_dss_pal_timings = { |
| 266 | .hactive = 720, | 266 | .hactive = 720, |
| 267 | .y_res = 574, | 267 | .vactive = 574, |
| 268 | .pixelclock = 13500000, | 268 | .pixelclock = 13500000, |
| 269 | .hsw = 64, | 269 | .hsw = 64, |
| 270 | .hfp = 12, | 270 | .hfp = 12, |
| @@ -285,7 +285,7 @@ EXPORT_SYMBOL(omap_dss_pal_timings); | |||
| 285 | 285 | ||
| 286 | const struct omap_video_timings omap_dss_ntsc_timings = { | 286 | const struct omap_video_timings omap_dss_ntsc_timings = { |
| 287 | .hactive = 720, | 287 | .hactive = 720, |
| 288 | .y_res = 482, | 288 | .vactive = 482, |
| 289 | .pixelclock = 13500000, | 289 | .pixelclock = 13500000, |
| 290 | .hsw = 64, | 290 | .hsw = 64, |
| 291 | .hfp = 16, | 291 | .hfp = 16, |
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c index bc33ce34a856..e3833efb6db8 100644 --- a/drivers/gpu/drm/omapdrm/omap_connector.c +++ b/drivers/gpu/drm/omapdrm/omap_connector.c | |||
| @@ -52,7 +52,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode, | |||
| 52 | mode->hsync_end = mode->hsync_start + timings->hsw; | 52 | mode->hsync_end = mode->hsync_start + timings->hsw; |
| 53 | mode->htotal = mode->hsync_end + timings->hbp; | 53 | mode->htotal = mode->hsync_end + timings->hbp; |
| 54 | 54 | ||
| 55 | mode->vdisplay = timings->y_res; | 55 | mode->vdisplay = timings->vactive; |
| 56 | mode->vsync_start = mode->vdisplay + timings->vfp; | 56 | mode->vsync_start = mode->vdisplay + timings->vfp; |
| 57 | mode->vsync_end = mode->vsync_start + timings->vsw; | 57 | mode->vsync_end = mode->vsync_start + timings->vsw; |
| 58 | mode->vtotal = mode->vsync_end + timings->vbp; | 58 | mode->vtotal = mode->vsync_end + timings->vbp; |
| @@ -86,7 +86,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings, | |||
| 86 | timings->hsw = mode->hsync_end - mode->hsync_start; | 86 | timings->hsw = mode->hsync_end - mode->hsync_start; |
| 87 | timings->hbp = mode->htotal - mode->hsync_end; | 87 | timings->hbp = mode->htotal - mode->hsync_end; |
| 88 | 88 | ||
| 89 | timings->y_res = mode->vdisplay; | 89 | timings->vactive = mode->vdisplay; |
| 90 | timings->vfp = mode->vsync_start - mode->vdisplay; | 90 | timings->vfp = mode->vsync_start - mode->vdisplay; |
| 91 | timings->vsw = mode->vsync_end - mode->vsync_start; | 91 | timings->vsw = mode->vsync_end - mode->vsync_start; |
| 92 | timings->vbp = mode->vtotal - mode->vsync_end; | 92 | timings->vbp = mode->vtotal - mode->vsync_end; |
