drm/amd/powerplay: round up the Mhz convertion (v2)

Since the clock value there may be like 29999 10Khz.

v2: rebase (Alex)

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 8 insertions, 2 deletions

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index 26d130a91725..5b55c709fb1c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -211,12 +211,18 @@ static int smu10_set_clock_limit(struct pp_hwmgr *hwmgr, const void *input)
         return 0;
 }
 
+static inline uint32_t convert_10k_to_mhz(uint32_t clock)
+{
+        return (clock + 99) / 100;
+}
+
 static int smu10_set_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock)
 {
         struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
 
-        if (smu10_data->need_min_deep_sleep_dcefclk && smu10_data->deep_sleep_dcefclk != clock/100) {
-                smu10_data->deep_sleep_dcefclk = clock/100;
+        if (smu10_data->need_min_deep_sleep_dcefclk &&
+            smu10_data->deep_sleep_dcefclk != convert_10k_to_mhz(clock)) {
+                smu10_data->deep_sleep_dcefclk = convert_10k_to_mhz(clock);
                 smum_send_msg_to_smc_with_parameter(hwmgr,
                                         PPSMC_MSG_SetMinDeepSleepDcefclk,
                                         smu10_data->deep_sleep_dcefclk);