diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2016-08-08 01:44:59 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-09-19 13:22:09 -0400 |
commit | ee1a51f882f6197e05948de615842761c3386524 (patch) | |
tree | a2f4c695096152dd121799c8e53ace5d8f3bc2dc /drivers/gpu | |
parent | 6a99a964f6e6af6b6f0d536312722257ae44f812 (diff) |
drm/amd/powerplay: add common interface in smumgr to help to visit fw image.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smumgr.h | 69 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | 101 |
2 files changed, 169 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h index 34abfd2cde53..e7af6436c6c2 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h | |||
@@ -28,6 +28,7 @@ | |||
28 | 28 | ||
29 | struct pp_smumgr; | 29 | struct pp_smumgr; |
30 | struct pp_instance; | 30 | struct pp_instance; |
31 | struct pp_hwmgr; | ||
31 | 32 | ||
32 | #define smu_lower_32_bits(n) ((uint32_t)(n)) | 33 | #define smu_lower_32_bits(n) ((uint32_t)(n)) |
33 | #define smu_upper_32_bits(n) ((uint32_t)(((n)>>16)>>16)) | 34 | #define smu_upper_32_bits(n) ((uint32_t)(((n)>>16)>>16)) |
@@ -53,6 +54,44 @@ enum AVFS_BTC_STATUS { | |||
53 | AVFS_BTC_SMUMSG_ERROR | 54 | AVFS_BTC_SMUMSG_ERROR |
54 | }; | 55 | }; |
55 | 56 | ||
57 | enum SMU_TABLE { | ||
58 | SMU_UVD_TABLE = 0, | ||
59 | SMU_VCE_TABLE, | ||
60 | SMU_SAMU_TABLE, | ||
61 | SMU_BIF_TABLE, | ||
62 | }; | ||
63 | |||
64 | enum SMU_TYPE { | ||
65 | SMU_SoftRegisters = 0, | ||
66 | SMU_Discrete_DpmTable, | ||
67 | }; | ||
68 | |||
69 | enum SMU_MEMBER { | ||
70 | HandshakeDisables = 0, | ||
71 | VoltageChangeTimeout, | ||
72 | AverageGraphicsActivity, | ||
73 | PreVBlankGap, | ||
74 | VBlankTimeout, | ||
75 | UvdBootLevel, | ||
76 | VceBootLevel, | ||
77 | SamuBootLevel, | ||
78 | LowSclkInterruptThreshold, | ||
79 | }; | ||
80 | |||
81 | |||
82 | enum SMU_MAC_DEFINITION { | ||
83 | SMU_MAX_LEVELS_GRAPHICS = 0, | ||
84 | SMU_MAX_LEVELS_MEMORY, | ||
85 | SMU_MAX_LEVELS_LINK, | ||
86 | SMU_MAX_ENTRIES_SMIO, | ||
87 | SMU_MAX_LEVELS_VDDC, | ||
88 | SMU_MAX_LEVELS_VDDGFX, | ||
89 | SMU_MAX_LEVELS_VDDCI, | ||
90 | SMU_MAX_LEVELS_MVDD, | ||
91 | SMU_UVD_MCLK_HANDSHAKE_DISABLE, | ||
92 | }; | ||
93 | |||
94 | |||
56 | struct pp_smumgr_func { | 95 | struct pp_smumgr_func { |
57 | int (*smu_init)(struct pp_smumgr *smumgr); | 96 | int (*smu_init)(struct pp_smumgr *smumgr); |
58 | int (*smu_fini)(struct pp_smumgr *smumgr); | 97 | int (*smu_fini)(struct pp_smumgr *smumgr); |
@@ -69,6 +108,18 @@ struct pp_smumgr_func { | |||
69 | int (*download_pptable_settings)(struct pp_smumgr *smumgr, | 108 | int (*download_pptable_settings)(struct pp_smumgr *smumgr, |
70 | void **table); | 109 | void **table); |
71 | int (*upload_pptable_settings)(struct pp_smumgr *smumgr); | 110 | int (*upload_pptable_settings)(struct pp_smumgr *smumgr); |
111 | int (*update_smc_table)(struct pp_hwmgr *hwmgr, uint32_t type); | ||
112 | int (*process_firmware_header)(struct pp_hwmgr *hwmgr); | ||
113 | int (*update_sclk_threshold)(struct pp_hwmgr *hwmgr); | ||
114 | int (*thermal_setup_fan_table)(struct pp_hwmgr *hwmgr); | ||
115 | int (*thermal_avfs_enable)(struct pp_hwmgr *hwmgr); | ||
116 | int (*init_smc_table)(struct pp_hwmgr *hwmgr); | ||
117 | int (*populate_all_graphic_levels)(struct pp_hwmgr *hwmgr); | ||
118 | int (*populate_all_memory_levels)(struct pp_hwmgr *hwmgr); | ||
119 | int (*initialize_mc_reg_table)(struct pp_hwmgr *hwmgr); | ||
120 | uint32_t (*get_offsetof)(uint32_t type, uint32_t member); | ||
121 | uint32_t (*get_mac_definition)(uint32_t value); | ||
122 | bool (*is_dpm_running)(struct pp_hwmgr *hwmgr); | ||
72 | }; | 123 | }; |
73 | 124 | ||
74 | struct pp_smumgr { | 125 | struct pp_smumgr { |
@@ -127,6 +178,24 @@ extern int tonga_smum_init(struct pp_smumgr *smumgr); | |||
127 | extern int fiji_smum_init(struct pp_smumgr *smumgr); | 178 | extern int fiji_smum_init(struct pp_smumgr *smumgr); |
128 | extern int polaris10_smum_init(struct pp_smumgr *smumgr); | 179 | extern int polaris10_smum_init(struct pp_smumgr *smumgr); |
129 | 180 | ||
181 | extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr); | ||
182 | |||
183 | extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type); | ||
184 | extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr); | ||
185 | extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr, | ||
186 | void *input, void *output, void *storage, int result); | ||
187 | extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr, | ||
188 | void *input, void *output, void *storage, int result); | ||
189 | extern int smum_init_smc_table(struct pp_hwmgr *hwmgr); | ||
190 | extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr); | ||
191 | extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr); | ||
192 | extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr); | ||
193 | extern uint32_t smum_get_offsetof(struct pp_smumgr *smumgr, | ||
194 | uint32_t type, uint32_t member); | ||
195 | extern uint32_t smum_get_mac_definition(struct pp_smumgr *smumgr, uint32_t value); | ||
196 | |||
197 | extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr); | ||
198 | |||
130 | #define SMUM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT | 199 | #define SMUM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT |
131 | 200 | ||
132 | #define SMUM_FIELD_MASK(reg, field) reg##__##field##_MASK | 201 | #define SMUM_FIELD_MASK(reg, field) reg##__##field##_MASK |
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c index bbeb786db003..e5812aa456f3 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | |||
@@ -86,6 +86,57 @@ int smum_fini(struct pp_smumgr *smumgr) | |||
86 | return 0; | 86 | return 0; |
87 | } | 87 | } |
88 | 88 | ||
89 | int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr, | ||
90 | void *input, void *output, void *storage, int result) | ||
91 | { | ||
92 | if (NULL != hwmgr->smumgr->smumgr_funcs->thermal_avfs_enable) | ||
93 | return hwmgr->smumgr->smumgr_funcs->thermal_avfs_enable(hwmgr); | ||
94 | |||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr, | ||
99 | void *input, void *output, void *storage, int result) | ||
100 | { | ||
101 | if (NULL != hwmgr->smumgr->smumgr_funcs->thermal_setup_fan_table) | ||
102 | return hwmgr->smumgr->smumgr_funcs->thermal_setup_fan_table(hwmgr); | ||
103 | |||
104 | return 0; | ||
105 | } | ||
106 | |||
107 | int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr) | ||
108 | { | ||
109 | |||
110 | if (NULL != hwmgr->smumgr->smumgr_funcs->update_sclk_threshold) | ||
111 | return hwmgr->smumgr->smumgr_funcs->update_sclk_threshold(hwmgr); | ||
112 | |||
113 | return 0; | ||
114 | } | ||
115 | |||
116 | int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) | ||
117 | { | ||
118 | |||
119 | if (NULL != hwmgr->smumgr->smumgr_funcs->update_smc_table) | ||
120 | return hwmgr->smumgr->smumgr_funcs->update_smc_table(hwmgr, type); | ||
121 | |||
122 | return 0; | ||
123 | } | ||
124 | |||
125 | uint32_t smum_get_offsetof(struct pp_smumgr *smumgr, uint32_t type, uint32_t member) | ||
126 | { | ||
127 | if (NULL != smumgr->smumgr_funcs->get_offsetof) | ||
128 | return smumgr->smumgr_funcs->get_offsetof(type, member); | ||
129 | |||
130 | return 0; | ||
131 | } | ||
132 | |||
133 | int smum_process_firmware_header(struct pp_hwmgr *hwmgr) | ||
134 | { | ||
135 | if (NULL != hwmgr->smumgr->smumgr_funcs->process_firmware_header) | ||
136 | return hwmgr->smumgr->smumgr_funcs->process_firmware_header(hwmgr); | ||
137 | return 0; | ||
138 | } | ||
139 | |||
89 | int smum_get_argument(struct pp_smumgr *smumgr) | 140 | int smum_get_argument(struct pp_smumgr *smumgr) |
90 | { | 141 | { |
91 | if (NULL != smumgr->smumgr_funcs->get_argument) | 142 | if (NULL != smumgr->smumgr_funcs->get_argument) |
@@ -94,13 +145,20 @@ int smum_get_argument(struct pp_smumgr *smumgr) | |||
94 | return 0; | 145 | return 0; |
95 | } | 146 | } |
96 | 147 | ||
148 | uint32_t smum_get_mac_definition(struct pp_smumgr *smumgr, uint32_t value) | ||
149 | { | ||
150 | if (NULL != smumgr->smumgr_funcs->get_mac_definition) | ||
151 | return smumgr->smumgr_funcs->get_mac_definition(value); | ||
152 | |||
153 | return 0; | ||
154 | } | ||
155 | |||
97 | int smum_download_powerplay_table(struct pp_smumgr *smumgr, | 156 | int smum_download_powerplay_table(struct pp_smumgr *smumgr, |
98 | void **table) | 157 | void **table) |
99 | { | 158 | { |
100 | if (NULL != smumgr->smumgr_funcs->download_pptable_settings) | 159 | if (NULL != smumgr->smumgr_funcs->download_pptable_settings) |
101 | return smumgr->smumgr_funcs->download_pptable_settings(smumgr, | 160 | return smumgr->smumgr_funcs->download_pptable_settings(smumgr, |
102 | table); | 161 | table); |
103 | |||
104 | return 0; | 162 | return 0; |
105 | } | 163 | } |
106 | 164 | ||
@@ -267,3 +325,44 @@ int smu_free_memory(void *device, void *handle) | |||
267 | 325 | ||
268 | return 0; | 326 | return 0; |
269 | } | 327 | } |
328 | |||
329 | int smum_init_smc_table(struct pp_hwmgr *hwmgr) | ||
330 | { | ||
331 | if (NULL != hwmgr->smumgr->smumgr_funcs->init_smc_table) | ||
332 | return hwmgr->smumgr->smumgr_funcs->init_smc_table(hwmgr); | ||
333 | |||
334 | return 0; | ||
335 | } | ||
336 | |||
337 | int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) | ||
338 | { | ||
339 | if (NULL != hwmgr->smumgr->smumgr_funcs->populate_all_graphic_levels) | ||
340 | return hwmgr->smumgr->smumgr_funcs->populate_all_graphic_levels(hwmgr); | ||
341 | |||
342 | return 0; | ||
343 | } | ||
344 | |||
345 | int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr) | ||
346 | { | ||
347 | if (NULL != hwmgr->smumgr->smumgr_funcs->populate_all_memory_levels) | ||
348 | return hwmgr->smumgr->smumgr_funcs->populate_all_memory_levels(hwmgr); | ||
349 | |||
350 | return 0; | ||
351 | } | ||
352 | |||
353 | /*this interface is needed by island ci/vi */ | ||
354 | int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) | ||
355 | { | ||
356 | if (NULL != hwmgr->smumgr->smumgr_funcs->initialize_mc_reg_table) | ||
357 | return hwmgr->smumgr->smumgr_funcs->initialize_mc_reg_table(hwmgr); | ||
358 | |||
359 | return 0; | ||
360 | } | ||
361 | |||
362 | bool smum_is_dpm_running(struct pp_hwmgr *hwmgr) | ||
363 | { | ||
364 | if (NULL != hwmgr->smumgr->smumgr_funcs->is_dpm_running) | ||
365 | return hwmgr->smumgr->smumgr_funcs->is_dpm_running(hwmgr); | ||
366 | |||
367 | return true; | ||
368 | } | ||