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authorDave Airlie <airlied@redhat.com>2016-09-27 22:08:49 -0400
committerDave Airlie <airlied@redhat.com>2016-09-27 22:08:49 -0400
commitca09fb9f60b5f3ab2d57e761aaeea89a5147d784 (patch)
tree908e42ecf32d2601f4c5c340c6c4626841baa661 /drivers/gpu
parent9f4ef05bcdcfdf911b056b471dd3c6a4f331b644 (diff)
parent08895a8b6b06ed2323cd97a36ee40a116b3db8ed (diff)
Merge tag 'v4.8-rc8' into drm-next
Linux 4.8-rc8 There was a lot of fallout in the imx/amdgpu/i915 drivers, so backmerge it now to avoid troubles. * tag 'v4.8-rc8': (1442 commits) Linux 4.8-rc8 fault_in_multipages_readable() throws set-but-unused error mm: check VMA flags to avoid invalid PROT_NONE NUMA balancing radix tree: fix sibling entry handling in radix_tree_descend() radix tree test suite: Test radix_tree_replace_slot() for multiorder entries fix memory leaks in tracing_buffers_splice_read() tracing: Move mutex to protect against resetting of seq data MIPS: Fix delay slot emulation count in debugfs MIPS: SMP: Fix possibility of deadlock when bringing CPUs online mm: delete unnecessary and unsafe init_tlb_ubc() huge tmpfs: fix Committed_AS leak shmem: fix tmpfs to handle the huge= option properly blk-mq: skip unmapped queues in blk_mq_alloc_request_hctx MIPS: Fix pre-r6 emulation FPU initialisation arm64: kgdb: handle read-only text / modules arm64: Call numa_store_cpu_info() earlier. locking/hung_task: Fix typo in CONFIG_DETECT_HUNG_TASK help text nvme-rdma: only clear queue flags after successful connect i2c: qup: skip qup_i2c_suspend if the device is already runtime suspended perf/core: Limit matching exclusive events to one PMU ...
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c13
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c9
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/cik_sdma.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c12
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c2
-rw-r--r--drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c2
-rw-r--r--drivers/gpu/drm/amd/scheduler/gpu_scheduler.c2
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c2
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c10
-rw-r--r--drivers/gpu/drm/drm_atomic.c6
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c2
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fb.c6
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimc.c29
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_g2d.c29
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gsc.c35
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_rotator.c26
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c3
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
-rw-r--r--drivers/gpu/drm/imx/ipuv3-crtc.c4
-rw-r--r--drivers/gpu/drm/mediatek/Kconfig3
-rw-r--r--drivers/gpu/drm/msm/msm_drv.h6
-rw-r--r--drivers/gpu/drm/msm/msm_gem.c9
-rw-r--r--drivers/gpu/drm/msm/msm_gem_submit.c29
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_acpi.c11
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_atpx_handler.c9
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c4
-rw-r--r--drivers/gpu/drm/tegra/dsi.c43
-rw-r--r--drivers/gpu/drm/vc4/vc4_bo.c2
-rw-r--r--drivers/gpu/drm/vc4/vc4_drv.c6
-rw-r--r--drivers/gpu/drm/vc4/vc4_drv.h9
-rw-r--r--drivers/gpu/drm/vc4/vc4_gem.c18
-rw-r--r--drivers/gpu/drm/vc4/vc4_irq.c4
-rw-r--r--drivers/gpu/drm/vc4/vc4_validate_shaders.c10
-rw-r--r--drivers/gpu/host1x/mipi.c63
41 files changed, 238 insertions, 215 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9d79e4ba0213..72c68dbb9821 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -407,7 +407,6 @@ unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
407/* 407/*
408 * BO. 408 * BO.
409 */ 409 */
410
411struct amdgpu_bo_list_entry { 410struct amdgpu_bo_list_entry {
412 struct amdgpu_bo *robj; 411 struct amdgpu_bo *robj;
413 struct ttm_validate_buffer tv; 412 struct ttm_validate_buffer tv;
@@ -620,9 +619,9 @@ int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
620void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev); 619void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
621int amdgpu_gart_init(struct amdgpu_device *adev); 620int amdgpu_gart_init(struct amdgpu_device *adev);
622void amdgpu_gart_fini(struct amdgpu_device *adev); 621void amdgpu_gart_fini(struct amdgpu_device *adev);
623void amdgpu_gart_unbind(struct amdgpu_device *adev, unsigned offset, 622void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
624 int pages); 623 int pages);
625int amdgpu_gart_bind(struct amdgpu_device *adev, unsigned offset, 624int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
626 int pages, struct page **pagelist, 625 int pages, struct page **pagelist,
627 dma_addr_t *dma_addr, uint32_t flags); 626 dma_addr_t *dma_addr, uint32_t flags);
628int amdgpu_ttm_recover_gart(struct amdgpu_device *adev); 627int amdgpu_ttm_recover_gart(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 59961db9c390..8e6bf548d689 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -348,6 +348,19 @@ bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *
348 (le16_to_cpu(path->usConnObjectId) & 348 (le16_to_cpu(path->usConnObjectId) &
349 OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT; 349 OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
350 350
351 /* Skip TV/CV support */
352 if ((le16_to_cpu(path->usDeviceTag) ==
353 ATOM_DEVICE_TV1_SUPPORT) ||
354 (le16_to_cpu(path->usDeviceTag) ==
355 ATOM_DEVICE_CV_SUPPORT))
356 continue;
357
358 if (con_obj_id >= ARRAY_SIZE(object_connector_convert)) {
359 DRM_ERROR("invalid con_obj_id %d for device tag 0x%04x\n",
360 con_obj_id, le16_to_cpu(path->usDeviceTag));
361 continue;
362 }
363
351 connector_type = 364 connector_type =
352 object_connector_convert[con_obj_id]; 365 object_connector_convert[con_obj_id];
353 connector_object_id = con_obj_id; 366 connector_object_id = con_obj_id;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
index 550c5ee704ec..dae35a96a694 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
@@ -205,16 +205,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
205 atpx->is_hybrid = false; 205 atpx->is_hybrid = false;
206 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { 206 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
207 printk("ATPX Hybrid Graphics\n"); 207 printk("ATPX Hybrid Graphics\n");
208#if 1
209 /* This is a temporary hack until the D3 cold support
210 * makes it upstream. The ATPX power_control method seems
211 * to still work on even if the system should be using
212 * the new standardized hybrid D3 cold ACPI interface.
213 */
214 atpx->functions.power_cntl = true;
215#else
216 atpx->functions.power_cntl = false; 208 atpx->functions.power_cntl = false;
217#endif
218 atpx->is_hybrid = true; 209 atpx->is_hybrid = true;
219 } 210 }
220 211
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 921bce2df0b0..0feea347f680 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -221,7 +221,7 @@ void amdgpu_gart_table_vram_free(struct amdgpu_device *adev)
221 * Unbinds the requested pages from the gart page table and 221 * Unbinds the requested pages from the gart page table and
222 * replaces them with the dummy page (all asics). 222 * replaces them with the dummy page (all asics).
223 */ 223 */
224void amdgpu_gart_unbind(struct amdgpu_device *adev, unsigned offset, 224void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
225 int pages) 225 int pages)
226{ 226{
227 unsigned t; 227 unsigned t;
@@ -268,7 +268,7 @@ void amdgpu_gart_unbind(struct amdgpu_device *adev, unsigned offset,
268 * (all asics). 268 * (all asics).
269 * Returns 0 for success, -EINVAL for failure. 269 * Returns 0 for success, -EINVAL for failure.
270 */ 270 */
271int amdgpu_gart_bind(struct amdgpu_device *adev, unsigned offset, 271int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
272 int pages, struct page **pagelist, dma_addr_t *dma_addr, 272 int pages, struct page **pagelist, dma_addr_t *dma_addr,
273 uint32_t flags) 273 uint32_t flags)
274{ 274{
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 4127e7ceace0..6a6c86c9c169 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -295,7 +295,7 @@ void amdgpu_ib_pool_fini(struct amdgpu_device *adev)
295int amdgpu_ib_ring_tests(struct amdgpu_device *adev) 295int amdgpu_ib_ring_tests(struct amdgpu_device *adev)
296{ 296{
297 unsigned i; 297 unsigned i;
298 int r; 298 int r, ret = 0;
299 299
300 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { 300 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
301 struct amdgpu_ring *ring = adev->rings[i]; 301 struct amdgpu_ring *ring = adev->rings[i];
@@ -316,10 +316,11 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev)
316 } else { 316 } else {
317 /* still not good, but we can live with it */ 317 /* still not good, but we can live with it */
318 DRM_ERROR("amdgpu: failed testing IB on ring %d (%d).\n", i, r); 318 DRM_ERROR("amdgpu: failed testing IB on ring %d (%d).\n", i, r);
319 ret = r;
319 } 320 }
320 } 321 }
321 } 322 }
322 return 0; 323 return ret;
323} 324}
324 325
325/* 326/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index b63969d7887c..160a094e1a93 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -273,8 +273,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
273 273
274 adev = amdgpu_get_adev(bo->bdev); 274 adev = amdgpu_get_adev(bo->bdev);
275 ring = adev->mman.buffer_funcs_ring; 275 ring = adev->mman.buffer_funcs_ring;
276 old_start = old_mem->start << PAGE_SHIFT; 276 old_start = (u64)old_mem->start << PAGE_SHIFT;
277 new_start = new_mem->start << PAGE_SHIFT; 277 new_start = (u64)new_mem->start << PAGE_SHIFT;
278 278
279 switch (old_mem->mem_type) { 279 switch (old_mem->mem_type) {
280 case TTM_PL_TT: 280 case TTM_PL_TT:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 25dd58a65905..cee7bc9a2314 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1154,7 +1154,8 @@ int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout)
1154 r = 0; 1154 r = 0;
1155 } 1155 }
1156 1156
1157error:
1158 fence_put(fence); 1157 fence_put(fence);
1158
1159error:
1159 return r; 1160 return r;
1160} 1161}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index bd5af328154f..a6a48ed9562e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1593,7 +1593,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
1593 r = amd_sched_entity_init(&ring->sched, &vm->entity, 1593 r = amd_sched_entity_init(&ring->sched, &vm->entity,
1594 rq, amdgpu_sched_jobs); 1594 rq, amdgpu_sched_jobs);
1595 if (r) 1595 if (r)
1596 return r; 1596 goto err;
1597 1597
1598 vm->page_directory_fence = NULL; 1598 vm->page_directory_fence = NULL;
1599 1599
@@ -1624,6 +1624,9 @@ error_free_page_directory:
1624error_free_sched_entity: 1624error_free_sched_entity:
1625 amd_sched_entity_fini(&ring->sched, &vm->entity); 1625 amd_sched_entity_fini(&ring->sched, &vm->entity);
1626 1626
1627err:
1628 drm_free_large(vm->page_tables);
1629
1627 return r; 1630 return r;
1628} 1631}
1629 1632
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index e6d7bf9520a0..cb952acc7133 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -52,6 +52,7 @@ static void cik_sdma_set_ring_funcs(struct amdgpu_device *adev);
52static void cik_sdma_set_irq_funcs(struct amdgpu_device *adev); 52static void cik_sdma_set_irq_funcs(struct amdgpu_device *adev);
53static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev); 53static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev);
54static void cik_sdma_set_vm_pte_funcs(struct amdgpu_device *adev); 54static void cik_sdma_set_vm_pte_funcs(struct amdgpu_device *adev);
55static int cik_sdma_soft_reset(void *handle);
55 56
56MODULE_FIRMWARE("radeon/bonaire_sdma.bin"); 57MODULE_FIRMWARE("radeon/bonaire_sdma.bin");
57MODULE_FIRMWARE("radeon/bonaire_sdma1.bin"); 58MODULE_FIRMWARE("radeon/bonaire_sdma1.bin");
@@ -1014,6 +1015,8 @@ static int cik_sdma_resume(void *handle)
1014{ 1015{
1015 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 1016 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
1016 1017
1018 cik_sdma_soft_reset(handle);
1019
1017 return cik_sdma_hw_init(adev); 1020 return cik_sdma_hw_init(adev);
1018} 1021}
1019 1022
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 32a676291e67..71116da9e782 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2927,8 +2927,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
2927 u64 wb_gpu_addr; 2927 u64 wb_gpu_addr;
2928 u32 *buf; 2928 u32 *buf;
2929 struct bonaire_mqd *mqd; 2929 struct bonaire_mqd *mqd;
2930 2930 struct amdgpu_ring *ring;
2931 gfx_v7_0_cp_compute_enable(adev, true);
2932 2931
2933 /* fix up chicken bits */ 2932 /* fix up chicken bits */
2934 tmp = RREG32(mmCP_CPF_DEBUG); 2933 tmp = RREG32(mmCP_CPF_DEBUG);
@@ -2963,7 +2962,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
2963 2962
2964 /* init the queues. Just two for now. */ 2963 /* init the queues. Just two for now. */
2965 for (i = 0; i < adev->gfx.num_compute_rings; i++) { 2964 for (i = 0; i < adev->gfx.num_compute_rings; i++) {
2966 struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; 2965 ring = &adev->gfx.compute_ring[i];
2967 2966
2968 if (ring->mqd_obj == NULL) { 2967 if (ring->mqd_obj == NULL) {
2969 r = amdgpu_bo_create(adev, 2968 r = amdgpu_bo_create(adev,
@@ -3142,6 +3141,13 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
3142 amdgpu_bo_unreserve(ring->mqd_obj); 3141 amdgpu_bo_unreserve(ring->mqd_obj);
3143 3142
3144 ring->ready = true; 3143 ring->ready = true;
3144 }
3145
3146 gfx_v7_0_cp_compute_enable(adev, true);
3147
3148 for (i = 0; i < adev->gfx.num_compute_rings; i++) {
3149 ring = &adev->gfx.compute_ring[i];
3150
3145 r = amdgpu_ring_test_ring(ring); 3151 r = amdgpu_ring_test_ring(ring);
3146 if (r) 3152 if (r)
3147 ring->ready = false; 3153 ring->ready = false;
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index 9ae307505190..565dab3c7218 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -710,7 +710,7 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring, long timeout)
710 DRM_ERROR("amdgpu: IB test timed out\n"); 710 DRM_ERROR("amdgpu: IB test timed out\n");
711 r = -ETIMEDOUT; 711 r = -ETIMEDOUT;
712 goto err1; 712 goto err1;
713 } else if (r) { 713 } else if (r < 0) {
714 DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r); 714 DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
715 goto err1; 715 goto err1;
716 } 716 }
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c b/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c
index ad494b875311..453c5d66e5c3 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c
@@ -186,7 +186,7 @@ u32 __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
186 sizeof(u32)) + inx; 186 sizeof(u32)) + inx;
187 187
188 pr_debug("kfd: get kernel queue doorbell\n" 188 pr_debug("kfd: get kernel queue doorbell\n"
189 " doorbell offset == 0x%08d\n" 189 " doorbell offset == 0x%08X\n"
190 " kernel address == 0x%08lX\n", 190 " kernel address == 0x%08lX\n",
191 *doorbell_off, (uintptr_t)(kfd->doorbell_kernel_ptr + inx)); 191 *doorbell_off, (uintptr_t)(kfd->doorbell_kernel_ptr + inx));
192 192
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
index ef312bb75fda..963a24d46a93 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
@@ -405,7 +405,7 @@ void amd_sched_job_recovery(struct amd_gpu_scheduler *sched)
405 spin_lock(&sched->job_list_lock); 405 spin_lock(&sched->job_list_lock);
406 s_job = list_first_entry_or_null(&sched->ring_mirror_list, 406 s_job = list_first_entry_or_null(&sched->ring_mirror_list,
407 struct amd_sched_job, node); 407 struct amd_sched_job, node);
408 if (s_job) 408 if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
409 schedule_delayed_work(&s_job->work_tdr, sched->timeout); 409 schedule_delayed_work(&s_job->work_tdr, sched->timeout);
410 410
411 list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) { 411 list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index a978381ef95b..9b17a66cf0e1 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -387,7 +387,7 @@ void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
387 atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c)); 387 atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
388} 388}
389 389
390void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc) 390static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
391{ 391{
392 struct atmel_hlcdc_crtc_state *state; 392 struct atmel_hlcdc_crtc_state *state;
393 393
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
index 72e6b7dd457b..9d4c030672f0 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
@@ -320,19 +320,19 @@ atmel_hlcdc_plane_update_pos_and_size(struct atmel_hlcdc_plane *plane,
320 u32 *coeff_tab = heo_upscaling_ycoef; 320 u32 *coeff_tab = heo_upscaling_ycoef;
321 u32 max_memsize; 321 u32 max_memsize;
322 322
323 if (state->crtc_w < state->src_w) 323 if (state->crtc_h < state->src_h)
324 coeff_tab = heo_downscaling_ycoef; 324 coeff_tab = heo_downscaling_ycoef;
325 for (i = 0; i < ARRAY_SIZE(heo_upscaling_ycoef); i++) 325 for (i = 0; i < ARRAY_SIZE(heo_upscaling_ycoef); i++)
326 atmel_hlcdc_layer_update_cfg(&plane->layer, 326 atmel_hlcdc_layer_update_cfg(&plane->layer,
327 33 + i, 327 33 + i,
328 0xffffffff, 328 0xffffffff,
329 coeff_tab[i]); 329 coeff_tab[i]);
330 factor = ((8 * 256 * state->src_w) - (256 * 4)) / 330 factor = ((8 * 256 * state->src_h) - (256 * 4)) /
331 state->crtc_w; 331 state->crtc_h;
332 factor++; 332 factor++;
333 max_memsize = ((factor * state->crtc_w) + (256 * 4)) / 333 max_memsize = ((factor * state->crtc_h) + (256 * 4)) /
334 2048; 334 2048;
335 if (max_memsize > state->src_w) 335 if (max_memsize > state->src_h)
336 factor--; 336 factor--;
337 factor_reg |= (factor << 16) | 0x80000000; 337 factor_reg |= (factor << 16) | 0x80000000;
338 } 338 }
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 904d29c012ad..23739609427d 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -475,7 +475,7 @@ int drm_atomic_crtc_set_property(struct drm_crtc *crtc,
475 val, 475 val,
476 -1, 476 -1,
477 &replaced); 477 &replaced);
478 state->color_mgmt_changed = replaced; 478 state->color_mgmt_changed |= replaced;
479 return ret; 479 return ret;
480 } else if (property == config->ctm_property) { 480 } else if (property == config->ctm_property) {
481 ret = drm_atomic_replace_property_blob_from_id(crtc, 481 ret = drm_atomic_replace_property_blob_from_id(crtc,
@@ -483,7 +483,7 @@ int drm_atomic_crtc_set_property(struct drm_crtc *crtc,
483 val, 483 val,
484 sizeof(struct drm_color_ctm), 484 sizeof(struct drm_color_ctm),
485 &replaced); 485 &replaced);
486 state->color_mgmt_changed = replaced; 486 state->color_mgmt_changed |= replaced;
487 return ret; 487 return ret;
488 } else if (property == config->gamma_lut_property) { 488 } else if (property == config->gamma_lut_property) {
489 ret = drm_atomic_replace_property_blob_from_id(crtc, 489 ret = drm_atomic_replace_property_blob_from_id(crtc,
@@ -491,7 +491,7 @@ int drm_atomic_crtc_set_property(struct drm_crtc *crtc,
491 val, 491 val,
492 -1, 492 -1,
493 &replaced); 493 &replaced);
494 state->color_mgmt_changed = replaced; 494 state->color_mgmt_changed |= replaced;
495 return ret; 495 return ret;
496 } else if (crtc->funcs->atomic_set_property) 496 } else if (crtc->funcs->atomic_set_property)
497 return crtc->funcs->atomic_set_property(crtc, state, property, val); 497 return crtc->funcs->atomic_set_property(crtc, state, property, val);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 5e830281bebd..03414bde1f15 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -466,7 +466,7 @@ static bool drm_fb_helper_is_bound(struct drm_fb_helper *fb_helper)
466 466
467 /* Sometimes user space wants everything disabled, so don't steal the 467 /* Sometimes user space wants everything disabled, so don't steal the
468 * display if there's a master. */ 468 * display if there's a master. */
469 if (lockless_dereference(dev->master)) 469 if (READ_ONCE(dev->master))
470 return false; 470 return false;
471 471
472 drm_for_each_crtc(crtc, dev) { 472 drm_for_each_crtc(crtc, dev) {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index e0166403b4bd..40ce841eb952 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -55,11 +55,11 @@ static int check_fb_gem_memory_type(struct drm_device *drm_dev,
55 flags = exynos_gem->flags; 55 flags = exynos_gem->flags;
56 56
57 /* 57 /*
58 * without iommu support, not support physically non-continuous memory 58 * Physically non-contiguous memory type for framebuffer is not
59 * for framebuffer. 59 * supported without IOMMU.
60 */ 60 */
61 if (IS_NONCONTIG_BUFFER(flags)) { 61 if (IS_NONCONTIG_BUFFER(flags)) {
62 DRM_ERROR("cannot use this gem memory type for fb.\n"); 62 DRM_ERROR("Non-contiguous GEM memory is not supported.\n");
63 return -EINVAL; 63 return -EINVAL;
64 } 64 }
65 65
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index 0525c56145db..147ef0d298cb 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -1753,32 +1753,6 @@ static int fimc_clk_ctrl(struct fimc_context *ctx, bool enable)
1753 return 0; 1753 return 0;
1754} 1754}
1755 1755
1756#ifdef CONFIG_PM_SLEEP
1757static int fimc_suspend(struct device *dev)
1758{
1759 struct fimc_context *ctx = get_fimc_context(dev);
1760
1761 DRM_DEBUG_KMS("id[%d]\n", ctx->id);
1762
1763 if (pm_runtime_suspended(dev))
1764 return 0;
1765
1766 return fimc_clk_ctrl(ctx, false);
1767}
1768
1769static int fimc_resume(struct device *dev)
1770{
1771 struct fimc_context *ctx = get_fimc_context(dev);
1772
1773 DRM_DEBUG_KMS("id[%d]\n", ctx->id);
1774
1775 if (!pm_runtime_suspended(dev))
1776 return fimc_clk_ctrl(ctx, true);
1777
1778 return 0;
1779}
1780#endif
1781
1782static int fimc_runtime_suspend(struct device *dev) 1756static int fimc_runtime_suspend(struct device *dev)
1783{ 1757{
1784 struct fimc_context *ctx = get_fimc_context(dev); 1758 struct fimc_context *ctx = get_fimc_context(dev);
@@ -1799,7 +1773,8 @@ static int fimc_runtime_resume(struct device *dev)
1799#endif 1773#endif
1800 1774
1801static const struct dev_pm_ops fimc_pm_ops = { 1775static const struct dev_pm_ops fimc_pm_ops = {
1802 SET_SYSTEM_SLEEP_PM_OPS(fimc_suspend, fimc_resume) 1776 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1777 pm_runtime_force_resume)
1803 SET_RUNTIME_PM_OPS(fimc_runtime_suspend, fimc_runtime_resume, NULL) 1778 SET_RUNTIME_PM_OPS(fimc_runtime_suspend, fimc_runtime_resume, NULL)
1804}; 1779};
1805 1780
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 4bf00f57ffe8..6eca8bb88648 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -1475,8 +1475,8 @@ static int g2d_remove(struct platform_device *pdev)
1475 return 0; 1475 return 0;
1476} 1476}
1477 1477
1478#ifdef CONFIG_PM_SLEEP 1478#ifdef CONFIG_PM
1479static int g2d_suspend(struct device *dev) 1479static int g2d_runtime_suspend(struct device *dev)
1480{ 1480{
1481 struct g2d_data *g2d = dev_get_drvdata(dev); 1481 struct g2d_data *g2d = dev_get_drvdata(dev);
1482 1482
@@ -1490,25 +1490,6 @@ static int g2d_suspend(struct device *dev)
1490 1490
1491 flush_work(&g2d->runqueue_work); 1491 flush_work(&g2d->runqueue_work);
1492 1492
1493 return 0;
1494}
1495
1496static int g2d_resume(struct device *dev)
1497{
1498 struct g2d_data *g2d = dev_get_drvdata(dev);
1499
1500 g2d->suspended = false;
1501 g2d_exec_runqueue(g2d);
1502
1503 return 0;
1504}
1505#endif
1506
1507#ifdef CONFIG_PM
1508static int g2d_runtime_suspend(struct device *dev)
1509{
1510 struct g2d_data *g2d = dev_get_drvdata(dev);
1511
1512 clk_disable_unprepare(g2d->gate_clk); 1493 clk_disable_unprepare(g2d->gate_clk);
1513 1494
1514 return 0; 1495 return 0;
@@ -1523,12 +1504,16 @@ static int g2d_runtime_resume(struct device *dev)
1523 if (ret < 0) 1504 if (ret < 0)
1524 dev_warn(dev, "failed to enable clock.\n"); 1505 dev_warn(dev, "failed to enable clock.\n");
1525 1506
1507 g2d->suspended = false;
1508 g2d_exec_runqueue(g2d);
1509
1526 return ret; 1510 return ret;
1527} 1511}
1528#endif 1512#endif
1529 1513
1530static const struct dev_pm_ops g2d_pm_ops = { 1514static const struct dev_pm_ops g2d_pm_ops = {
1531 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume) 1515 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1516 pm_runtime_force_resume)
1532 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL) 1517 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1533}; 1518};
1534 1519
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 5d20da8f957e..52a9d269484e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -1760,34 +1760,7 @@ static int gsc_remove(struct platform_device *pdev)
1760 return 0; 1760 return 0;
1761} 1761}
1762 1762
1763#ifdef CONFIG_PM_SLEEP 1763static int __maybe_unused gsc_runtime_suspend(struct device *dev)
1764static int gsc_suspend(struct device *dev)
1765{
1766 struct gsc_context *ctx = get_gsc_context(dev);
1767
1768 DRM_DEBUG_KMS("id[%d]\n", ctx->id);
1769
1770 if (pm_runtime_suspended(dev))
1771 return 0;
1772
1773 return gsc_clk_ctrl(ctx, false);
1774}
1775
1776static int gsc_resume(struct device *dev)
1777{
1778 struct gsc_context *ctx = get_gsc_context(dev);
1779
1780 DRM_DEBUG_KMS("id[%d]\n", ctx->id);
1781
1782 if (!pm_runtime_suspended(dev))
1783 return gsc_clk_ctrl(ctx, true);
1784
1785 return 0;
1786}
1787#endif
1788
1789#ifdef CONFIG_PM
1790static int gsc_runtime_suspend(struct device *dev)
1791{ 1764{
1792 struct gsc_context *ctx = get_gsc_context(dev); 1765 struct gsc_context *ctx = get_gsc_context(dev);
1793 1766
@@ -1796,7 +1769,7 @@ static int gsc_runtime_suspend(struct device *dev)
1796 return gsc_clk_ctrl(ctx, false); 1769 return gsc_clk_ctrl(ctx, false);
1797} 1770}
1798 1771
1799static int gsc_runtime_resume(struct device *dev) 1772static int __maybe_unused gsc_runtime_resume(struct device *dev)
1800{ 1773{
1801 struct gsc_context *ctx = get_gsc_context(dev); 1774 struct gsc_context *ctx = get_gsc_context(dev);
1802 1775
@@ -1804,10 +1777,10 @@ static int gsc_runtime_resume(struct device *dev)
1804 1777
1805 return gsc_clk_ctrl(ctx, true); 1778 return gsc_clk_ctrl(ctx, true);
1806} 1779}
1807#endif
1808 1780
1809static const struct dev_pm_ops gsc_pm_ops = { 1781static const struct dev_pm_ops gsc_pm_ops = {
1810 SET_SYSTEM_SLEEP_PM_OPS(gsc_suspend, gsc_resume) 1782 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1783 pm_runtime_force_resume)
1811 SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL) 1784 SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL)
1812}; 1785};
1813 1786
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
index 404367a430b5..6591e406084c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
@@ -794,29 +794,6 @@ static int rotator_clk_crtl(struct rot_context *rot, bool enable)
794 return 0; 794 return 0;
795} 795}
796 796
797
798#ifdef CONFIG_PM_SLEEP
799static int rotator_suspend(struct device *dev)
800{
801 struct rot_context *rot = dev_get_drvdata(dev);
802
803 if (pm_runtime_suspended(dev))
804 return 0;
805
806 return rotator_clk_crtl(rot, false);
807}
808
809static int rotator_resume(struct device *dev)
810{
811 struct rot_context *rot = dev_get_drvdata(dev);
812
813 if (!pm_runtime_suspended(dev))
814 return rotator_clk_crtl(rot, true);
815
816 return 0;
817}
818#endif
819
820static int rotator_runtime_suspend(struct device *dev) 797static int rotator_runtime_suspend(struct device *dev)
821{ 798{
822 struct rot_context *rot = dev_get_drvdata(dev); 799 struct rot_context *rot = dev_get_drvdata(dev);
@@ -833,7 +810,8 @@ static int rotator_runtime_resume(struct device *dev)
833#endif 810#endif
834 811
835static const struct dev_pm_ops rotator_pm_ops = { 812static const struct dev_pm_ops rotator_pm_ops = {
836 SET_SYSTEM_SLEEP_PM_OPS(rotator_suspend, rotator_resume) 813 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
814 pm_runtime_force_resume)
837 SET_RUNTIME_PM_OPS(rotator_runtime_suspend, rotator_runtime_resume, 815 SET_RUNTIME_PM_OPS(rotator_runtime_suspend, rotator_runtime_resume,
838 NULL) 816 NULL)
839}; 817};
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c8bd02277b7d..2c8106758922 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2616,6 +2616,8 @@ static void i915_gem_reset_engine(struct intel_engine_cs *engine)
2616 list_for_each_entry_continue(request, &engine->request_list, link) 2616 list_for_each_entry_continue(request, &engine->request_list, link)
2617 if (request->ctx == incomplete_ctx) 2617 if (request->ctx == incomplete_ctx)
2618 reset_request(request); 2618 reset_request(request);
2619
2620 engine->i915->gt.active_engines &= ~intel_engine_flag(engine);
2619} 2621}
2620 2622
2621void i915_gem_reset(struct drm_i915_private *dev_priv) 2623void i915_gem_reset(struct drm_i915_private *dev_priv)
@@ -2626,6 +2628,7 @@ void i915_gem_reset(struct drm_i915_private *dev_priv)
2626 2628
2627 for_each_engine(engine, dev_priv) 2629 for_each_engine(engine, dev_priv)
2628 i915_gem_reset_engine(engine); 2630 i915_gem_reset_engine(engine);
2631 mod_delayed_work(dev_priv->wq, &dev_priv->gt.idle_work, 0);
2629 2632
2630 i915_gem_restore_fences(&dev_priv->drm); 2633 i915_gem_restore_fences(&dev_priv->drm);
2631} 2634}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 497d99b88468..8d4c35d55b1b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3601,6 +3601,8 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
3601 3601
3602 dev_priv->modeset_restore_state = NULL; 3602 dev_priv->modeset_restore_state = NULL;
3603 3603
3604 dev_priv->modeset_restore_state = NULL;
3605
3604 /* reset doesn't touch the display */ 3606 /* reset doesn't touch the display */
3605 if (!gpu_reset_clobbers_display(dev_priv)) { 3607 if (!gpu_reset_clobbers_display(dev_priv)) {
3606 if (!state) { 3608 if (!state) {
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index 9df29f1cb16a..4e1ae3fc462d 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -79,6 +79,8 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
79 79
80 /* always disable planes on the CRTC */ 80 /* always disable planes on the CRTC */
81 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, true); 81 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, true);
82
83 drm_crtc_vblank_off(crtc);
82} 84}
83 85
84static void imx_drm_crtc_reset(struct drm_crtc *crtc) 86static void imx_drm_crtc_reset(struct drm_crtc *crtc)
@@ -183,6 +185,8 @@ static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
183static void ipu_crtc_atomic_begin(struct drm_crtc *crtc, 185static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
184 struct drm_crtc_state *old_crtc_state) 186 struct drm_crtc_state *old_crtc_state)
185{ 187{
188 drm_crtc_vblank_on(crtc);
189
186 spin_lock_irq(&crtc->dev->event_lock); 190 spin_lock_irq(&crtc->dev->event_lock);
187 if (crtc->state->event) { 191 if (crtc->state->event) {
188 WARN_ON(drm_crtc_vblank_get(crtc)); 192 WARN_ON(drm_crtc_vblank_get(crtc));
diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig
index 23ac8041c562..294de4549922 100644
--- a/drivers/gpu/drm/mediatek/Kconfig
+++ b/drivers/gpu/drm/mediatek/Kconfig
@@ -2,6 +2,9 @@ config DRM_MEDIATEK
2 tristate "DRM Support for Mediatek SoCs" 2 tristate "DRM Support for Mediatek SoCs"
3 depends on DRM 3 depends on DRM
4 depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST) 4 depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST)
5 depends on COMMON_CLK
6 depends on HAVE_ARM_SMCCC
7 depends on OF
5 select DRM_GEM_CMA_HELPER 8 select DRM_GEM_CMA_HELPER
6 select DRM_KMS_HELPER 9 select DRM_KMS_HELPER
7 select DRM_MIPI_DSI 10 select DRM_MIPI_DSI
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index b4bc7f1ef717..d0da52f2a806 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -157,6 +157,12 @@ struct msm_drm_private {
157 struct shrinker shrinker; 157 struct shrinker shrinker;
158 158
159 struct msm_vblank_ctrl vblank_ctrl; 159 struct msm_vblank_ctrl vblank_ctrl;
160
161 /* task holding struct_mutex.. currently only used in submit path
162 * to detect and reject faults from copy_from_user() for submit
163 * ioctl.
164 */
165 struct task_struct *struct_mutex_task;
160}; 166};
161 167
162struct msm_format { 168struct msm_format {
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 0a9b5580b2e9..b6ac27e31929 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -196,11 +196,20 @@ int msm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
196{ 196{
197 struct drm_gem_object *obj = vma->vm_private_data; 197 struct drm_gem_object *obj = vma->vm_private_data;
198 struct drm_device *dev = obj->dev; 198 struct drm_device *dev = obj->dev;
199 struct msm_drm_private *priv = dev->dev_private;
199 struct page **pages; 200 struct page **pages;
200 unsigned long pfn; 201 unsigned long pfn;
201 pgoff_t pgoff; 202 pgoff_t pgoff;
202 int ret; 203 int ret;
203 204
205 /* This should only happen if userspace tries to pass a mmap'd
206 * but unfaulted gem bo vaddr into submit ioctl, triggering
207 * a page fault while struct_mutex is already held. This is
208 * not a valid use-case so just bail.
209 */
210 if (priv->struct_mutex_task == current)
211 return VM_FAULT_SIGBUS;
212
204 /* Make sure we don't parallel update on a fault, nor move or remove 213 /* Make sure we don't parallel update on a fault, nor move or remove
205 * something from beneath our feet 214 * something from beneath our feet
206 */ 215 */
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c
index 3ac14cd1e5b9..b6a0f37a65f3 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -66,6 +66,14 @@ void msm_gem_submit_free(struct msm_gem_submit *submit)
66 kfree(submit); 66 kfree(submit);
67} 67}
68 68
69static inline unsigned long __must_check
70copy_from_user_inatomic(void *to, const void __user *from, unsigned long n)
71{
72 if (access_ok(VERIFY_READ, from, n))
73 return __copy_from_user_inatomic(to, from, n);
74 return -EFAULT;
75}
76
69static int submit_lookup_objects(struct msm_gem_submit *submit, 77static int submit_lookup_objects(struct msm_gem_submit *submit,
70 struct drm_msm_gem_submit *args, struct drm_file *file) 78 struct drm_msm_gem_submit *args, struct drm_file *file)
71{ 79{
@@ -73,6 +81,7 @@ static int submit_lookup_objects(struct msm_gem_submit *submit,
73 int ret = 0; 81 int ret = 0;
74 82
75 spin_lock(&file->table_lock); 83 spin_lock(&file->table_lock);
84 pagefault_disable();
76 85
77 for (i = 0; i < args->nr_bos; i++) { 86 for (i = 0; i < args->nr_bos; i++) {
78 struct drm_msm_gem_submit_bo submit_bo; 87 struct drm_msm_gem_submit_bo submit_bo;
@@ -86,10 +95,15 @@ static int submit_lookup_objects(struct msm_gem_submit *submit,
86 */ 95 */
87 submit->bos[i].flags = 0; 96 submit->bos[i].flags = 0;
88 97
89 ret = copy_from_user(&submit_bo, userptr, sizeof(submit_bo)); 98 ret = copy_from_user_inatomic(&submit_bo, userptr, sizeof(submit_bo));
90 if (ret) { 99 if (unlikely(ret)) {
91 ret = -EFAULT; 100 pagefault_enable();
92 goto out_unlock; 101 spin_unlock(&file->table_lock);
102 ret = copy_from_user(&submit_bo, userptr, sizeof(submit_bo));
103 if (ret)
104 goto out;
105 spin_lock(&file->table_lock);
106 pagefault_disable();
93 } 107 }
94 108
95 if (submit_bo.flags & ~MSM_SUBMIT_BO_FLAGS) { 109 if (submit_bo.flags & ~MSM_SUBMIT_BO_FLAGS) {
@@ -129,9 +143,12 @@ static int submit_lookup_objects(struct msm_gem_submit *submit,
129 } 143 }
130 144
131out_unlock: 145out_unlock:
132 submit->nr_bos = i; 146 pagefault_enable();
133 spin_unlock(&file->table_lock); 147 spin_unlock(&file->table_lock);
134 148
149out:
150 submit->nr_bos = i;
151
135 return ret; 152 return ret;
136} 153}
137 154
@@ -392,6 +409,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
392 goto out_unlock; 409 goto out_unlock;
393 } 410 }
394 } 411 }
412 priv->struct_mutex_task = current;
395 413
396 submit = submit_create(dev, gpu, args->nr_bos, args->nr_cmds); 414 submit = submit_create(dev, gpu, args->nr_bos, args->nr_cmds);
397 if (!submit) { 415 if (!submit) {
@@ -531,6 +549,7 @@ out:
531out_unlock: 549out_unlock:
532 if (ret && (out_fence_fd >= 0)) 550 if (ret && (out_fence_fd >= 0))
533 put_unused_fd(out_fence_fd); 551 put_unused_fd(out_fence_fd);
552 priv->struct_mutex_task = NULL;
534 mutex_unlock(&dev->struct_mutex); 553 mutex_unlock(&dev->struct_mutex);
535 return ret; 554 return ret;
536} 555}
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c
index f2ad17aa33f0..dc57b628e074 100644
--- a/drivers/gpu/drm/nouveau/nouveau_acpi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c
@@ -225,6 +225,17 @@ static bool nouveau_pr3_present(struct pci_dev *pdev)
225 if (!parent_pdev) 225 if (!parent_pdev)
226 return false; 226 return false;
227 227
228 if (!parent_pdev->bridge_d3) {
229 /*
230 * Parent PCI bridge is currently not power managed.
231 * Since userspace can change these afterwards to be on
232 * the safe side we stick with _DSM and prevent usage of
233 * _PR3 from the bridge.
234 */
235 pci_d3cold_disable(pdev);
236 return false;
237 }
238
228 parent_adev = ACPI_COMPANION(&parent_pdev->dev); 239 parent_adev = ACPI_COMPANION(&parent_pdev->dev);
229 if (!parent_adev) 240 if (!parent_adev)
230 return false; 241 return false;
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 4824f70b0258..a4e9f35da3a2 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -627,7 +627,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
627 if (radeon_crtc->ss.refdiv) { 627 if (radeon_crtc->ss.refdiv) {
628 radeon_crtc->pll_flags |= RADEON_PLL_USE_REF_DIV; 628 radeon_crtc->pll_flags |= RADEON_PLL_USE_REF_DIV;
629 radeon_crtc->pll_reference_div = radeon_crtc->ss.refdiv; 629 radeon_crtc->pll_reference_div = radeon_crtc->ss.refdiv;
630 if (rdev->family >= CHIP_RV770) 630 if (ASIC_IS_AVIVO(rdev) &&
631 rdev->family != CHIP_RS780 &&
632 rdev->family != CHIP_RS880)
631 radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; 633 radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
632 } 634 }
633 } 635 }
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index a1321b2fa454..2fdcd04bc93f 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -203,16 +203,7 @@ static int radeon_atpx_validate(struct radeon_atpx *atpx)
203 atpx->is_hybrid = false; 203 atpx->is_hybrid = false;
204 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { 204 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
205 printk("ATPX Hybrid Graphics\n"); 205 printk("ATPX Hybrid Graphics\n");
206#if 1
207 /* This is a temporary hack until the D3 cold support
208 * makes it upstream. The ATPX power_control method seems
209 * to still work on even if the system should be using
210 * the new standardized hybrid D3 cold ACPI interface.
211 */
212 atpx->functions.power_cntl = true;
213#else
214 atpx->functions.power_cntl = false; 206 atpx->functions.power_cntl = false;
215#endif
216 atpx->is_hybrid = true; 207 atpx->is_hybrid = true;
217 } 208 }
218 209
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 27ee0ab0e1a7..455268214b89 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -264,8 +264,8 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
264 264
265 rdev = radeon_get_rdev(bo->bdev); 265 rdev = radeon_get_rdev(bo->bdev);
266 ridx = radeon_copy_ring_index(rdev); 266 ridx = radeon_copy_ring_index(rdev);
267 old_start = old_mem->start << PAGE_SHIFT; 267 old_start = (u64)old_mem->start << PAGE_SHIFT;
268 new_start = new_mem->start << PAGE_SHIFT; 268 new_start = (u64)new_mem->start << PAGE_SHIFT;
269 269
270 switch (old_mem->mem_type) { 270 switch (old_mem->mem_type) {
271 case TTM_PL_VRAM: 271 case TTM_PL_VRAM:
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 3d228ad90e0f..3dea1216bafd 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -840,6 +840,21 @@ static const struct drm_encoder_funcs tegra_dsi_encoder_funcs = {
840 .destroy = tegra_output_encoder_destroy, 840 .destroy = tegra_output_encoder_destroy,
841}; 841};
842 842
843static void tegra_dsi_unprepare(struct tegra_dsi *dsi)
844{
845 int err;
846
847 if (dsi->slave)
848 tegra_dsi_unprepare(dsi->slave);
849
850 err = tegra_mipi_disable(dsi->mipi);
851 if (err < 0)
852 dev_err(dsi->dev, "failed to disable MIPI calibration: %d\n",
853 err);
854
855 pm_runtime_put(dsi->dev);
856}
857
843static void tegra_dsi_encoder_disable(struct drm_encoder *encoder) 858static void tegra_dsi_encoder_disable(struct drm_encoder *encoder)
844{ 859{
845 struct tegra_output *output = encoder_to_output(encoder); 860 struct tegra_output *output = encoder_to_output(encoder);
@@ -876,7 +891,26 @@ static void tegra_dsi_encoder_disable(struct drm_encoder *encoder)
876 891
877 tegra_dsi_disable(dsi); 892 tegra_dsi_disable(dsi);
878 893
879 pm_runtime_put(dsi->dev); 894 tegra_dsi_unprepare(dsi);
895}
896
897static void tegra_dsi_prepare(struct tegra_dsi *dsi)
898{
899 int err;
900
901 pm_runtime_get_sync(dsi->dev);
902
903 err = tegra_mipi_enable(dsi->mipi);
904 if (err < 0)
905 dev_err(dsi->dev, "failed to enable MIPI calibration: %d\n",
906 err);
907
908 err = tegra_dsi_pad_calibrate(dsi);
909 if (err < 0)
910 dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);
911
912 if (dsi->slave)
913 tegra_dsi_prepare(dsi->slave);
880} 914}
881 915
882static void tegra_dsi_encoder_enable(struct drm_encoder *encoder) 916static void tegra_dsi_encoder_enable(struct drm_encoder *encoder)
@@ -887,13 +921,8 @@ static void tegra_dsi_encoder_enable(struct drm_encoder *encoder)
887 struct tegra_dsi *dsi = to_dsi(output); 921 struct tegra_dsi *dsi = to_dsi(output);
888 struct tegra_dsi_state *state; 922 struct tegra_dsi_state *state;
889 u32 value; 923 u32 value;
890 int err;
891
892 pm_runtime_get_sync(dsi->dev);
893 924
894 err = tegra_dsi_pad_calibrate(dsi); 925 tegra_dsi_prepare(dsi);
895 if (err < 0)
896 dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);
897 926
898 state = tegra_dsi_get_state(dsi); 927 state = tegra_dsi_get_state(dsi);
899 928
diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c
index 59adcf8532dd..3f6704cf6608 100644
--- a/drivers/gpu/drm/vc4/vc4_bo.c
+++ b/drivers/gpu/drm/vc4/vc4_bo.c
@@ -144,7 +144,7 @@ static struct list_head *vc4_get_cache_list_for_size(struct drm_device *dev,
144 return &vc4->bo_cache.size_list[page_index]; 144 return &vc4->bo_cache.size_list[page_index];
145} 145}
146 146
147void vc4_bo_cache_purge(struct drm_device *dev) 147static void vc4_bo_cache_purge(struct drm_device *dev)
148{ 148{
149 struct vc4_dev *vc4 = to_vc4_dev(dev); 149 struct vc4_dev *vc4 = to_vc4_dev(dev);
150 150
diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
index 3c9e7f64b926..8703f56b7947 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
@@ -58,21 +58,21 @@ static int vc4_get_param_ioctl(struct drm_device *dev, void *data,
58 switch (args->param) { 58 switch (args->param) {
59 case DRM_VC4_PARAM_V3D_IDENT0: 59 case DRM_VC4_PARAM_V3D_IDENT0:
60 ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev); 60 ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
61 if (ret) 61 if (ret < 0)
62 return ret; 62 return ret;
63 args->value = V3D_READ(V3D_IDENT0); 63 args->value = V3D_READ(V3D_IDENT0);
64 pm_runtime_put(&vc4->v3d->pdev->dev); 64 pm_runtime_put(&vc4->v3d->pdev->dev);
65 break; 65 break;
66 case DRM_VC4_PARAM_V3D_IDENT1: 66 case DRM_VC4_PARAM_V3D_IDENT1:
67 ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev); 67 ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
68 if (ret) 68 if (ret < 0)
69 return ret; 69 return ret;
70 args->value = V3D_READ(V3D_IDENT1); 70 args->value = V3D_READ(V3D_IDENT1);
71 pm_runtime_put(&vc4->v3d->pdev->dev); 71 pm_runtime_put(&vc4->v3d->pdev->dev);
72 break; 72 break;
73 case DRM_VC4_PARAM_V3D_IDENT2: 73 case DRM_VC4_PARAM_V3D_IDENT2:
74 ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev); 74 ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
75 if (ret) 75 if (ret < 0)
76 return ret; 76 return ret;
77 args->value = V3D_READ(V3D_IDENT2); 77 args->value = V3D_READ(V3D_IDENT2);
78 pm_runtime_put(&vc4->v3d->pdev->dev); 78 pm_runtime_put(&vc4->v3d->pdev->dev);
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 489e3de0c050..428e24919ef1 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -321,6 +321,15 @@ vc4_first_render_job(struct vc4_dev *vc4)
321 struct vc4_exec_info, head); 321 struct vc4_exec_info, head);
322} 322}
323 323
324static inline struct vc4_exec_info *
325vc4_last_render_job(struct vc4_dev *vc4)
326{
327 if (list_empty(&vc4->render_job_list))
328 return NULL;
329 return list_last_entry(&vc4->render_job_list,
330 struct vc4_exec_info, head);
331}
332
324/** 333/**
325 * struct vc4_texture_sample_info - saves the offsets into the UBO for texture 334 * struct vc4_texture_sample_info - saves the offsets into the UBO for texture
326 * setup parameters. 335 * setup parameters.
diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
index 27c52ec35193..77daea6cb866 100644
--- a/drivers/gpu/drm/vc4/vc4_gem.c
+++ b/drivers/gpu/drm/vc4/vc4_gem.c
@@ -530,8 +530,8 @@ vc4_cl_lookup_bos(struct drm_device *dev,
530 return -EINVAL; 530 return -EINVAL;
531 } 531 }
532 532
533 exec->bo = kcalloc(exec->bo_count, sizeof(struct drm_gem_cma_object *), 533 exec->bo = drm_calloc_large(exec->bo_count,
534 GFP_KERNEL); 534 sizeof(struct drm_gem_cma_object *));
535 if (!exec->bo) { 535 if (!exec->bo) {
536 DRM_ERROR("Failed to allocate validated BO pointers\n"); 536 DRM_ERROR("Failed to allocate validated BO pointers\n");
537 return -ENOMEM; 537 return -ENOMEM;
@@ -568,8 +568,8 @@ vc4_cl_lookup_bos(struct drm_device *dev,
568 spin_unlock(&file_priv->table_lock); 568 spin_unlock(&file_priv->table_lock);
569 569
570fail: 570fail:
571 kfree(handles); 571 drm_free_large(handles);
572 return 0; 572 return ret;
573} 573}
574 574
575static int 575static int
@@ -604,7 +604,7 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec)
604 * read the contents back for validation, and I think the 604 * read the contents back for validation, and I think the
605 * bo->vaddr is uncached access. 605 * bo->vaddr is uncached access.
606 */ 606 */
607 temp = kmalloc(temp_size, GFP_KERNEL); 607 temp = drm_malloc_ab(temp_size, 1);
608 if (!temp) { 608 if (!temp) {
609 DRM_ERROR("Failed to allocate storage for copying " 609 DRM_ERROR("Failed to allocate storage for copying "
610 "in bin/render CLs.\n"); 610 "in bin/render CLs.\n");
@@ -671,7 +671,7 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec)
671 ret = vc4_validate_shader_recs(dev, exec); 671 ret = vc4_validate_shader_recs(dev, exec);
672 672
673fail: 673fail:
674 kfree(temp); 674 drm_free_large(temp);
675 return ret; 675 return ret;
676} 676}
677 677
@@ -684,7 +684,7 @@ vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec)
684 if (exec->bo) { 684 if (exec->bo) {
685 for (i = 0; i < exec->bo_count; i++) 685 for (i = 0; i < exec->bo_count; i++)
686 drm_gem_object_unreference_unlocked(&exec->bo[i]->base); 686 drm_gem_object_unreference_unlocked(&exec->bo[i]->base);
687 kfree(exec->bo); 687 drm_free_large(exec->bo);
688 } 688 }
689 689
690 while (!list_empty(&exec->unref_list)) { 690 while (!list_empty(&exec->unref_list)) {
@@ -938,8 +938,8 @@ vc4_gem_destroy(struct drm_device *dev)
938 vc4->overflow_mem = NULL; 938 vc4->overflow_mem = NULL;
939 } 939 }
940 940
941 vc4_bo_cache_destroy(dev);
942
943 if (vc4->hang_state) 941 if (vc4->hang_state)
944 vc4_free_hang_state(dev, vc4->hang_state); 942 vc4_free_hang_state(dev, vc4->hang_state);
943
944 vc4_bo_cache_destroy(dev);
945} 945}
diff --git a/drivers/gpu/drm/vc4/vc4_irq.c b/drivers/gpu/drm/vc4/vc4_irq.c
index b0104a346a74..094bc6a475c1 100644
--- a/drivers/gpu/drm/vc4/vc4_irq.c
+++ b/drivers/gpu/drm/vc4/vc4_irq.c
@@ -83,8 +83,10 @@ vc4_overflow_mem_work(struct work_struct *work)
83 83
84 spin_lock_irqsave(&vc4->job_lock, irqflags); 84 spin_lock_irqsave(&vc4->job_lock, irqflags);
85 current_exec = vc4_first_bin_job(vc4); 85 current_exec = vc4_first_bin_job(vc4);
86 if (!current_exec)
87 current_exec = vc4_last_render_job(vc4);
86 if (current_exec) { 88 if (current_exec) {
87 vc4->overflow_mem->seqno = vc4->finished_seqno + 1; 89 vc4->overflow_mem->seqno = current_exec->seqno;
88 list_add_tail(&vc4->overflow_mem->unref_head, 90 list_add_tail(&vc4->overflow_mem->unref_head,
89 &current_exec->unref_list); 91 &current_exec->unref_list);
90 vc4->overflow_mem = NULL; 92 vc4->overflow_mem = NULL;
diff --git a/drivers/gpu/drm/vc4/vc4_validate_shaders.c b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
index 46527e989ce3..2543cf5b8b51 100644
--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
@@ -309,8 +309,14 @@ validate_uniform_address_write(struct vc4_validated_shader_info *validated_shade
309 * of uniforms on each side. However, this scheme is easy to 309 * of uniforms on each side. However, this scheme is easy to
310 * validate so it's all we allow for now. 310 * validate so it's all we allow for now.
311 */ 311 */
312 312 switch (QPU_GET_FIELD(inst, QPU_SIG)) {
313 if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_NONE) { 313 case QPU_SIG_NONE:
314 case QPU_SIG_SCOREBOARD_UNLOCK:
315 case QPU_SIG_COLOR_LOAD:
316 case QPU_SIG_LOAD_TMU0:
317 case QPU_SIG_LOAD_TMU1:
318 break;
319 default:
314 DRM_ERROR("uniforms address change must be " 320 DRM_ERROR("uniforms address change must be "
315 "normal math\n"); 321 "normal math\n");
316 return false; 322 return false;
diff --git a/drivers/gpu/host1x/mipi.c b/drivers/gpu/host1x/mipi.c
index 52a6fd224127..e00809d996a2 100644
--- a/drivers/gpu/host1x/mipi.c
+++ b/drivers/gpu/host1x/mipi.c
@@ -242,20 +242,6 @@ struct tegra_mipi_device *tegra_mipi_request(struct device *device)
242 dev->pads = args.args[0]; 242 dev->pads = args.args[0];
243 dev->device = device; 243 dev->device = device;
244 244
245 mutex_lock(&dev->mipi->lock);
246
247 if (dev->mipi->usage_count++ == 0) {
248 err = tegra_mipi_power_up(dev->mipi);
249 if (err < 0) {
250 dev_err(dev->mipi->dev,
251 "failed to power up MIPI bricks: %d\n",
252 err);
253 return ERR_PTR(err);
254 }
255 }
256
257 mutex_unlock(&dev->mipi->lock);
258
259 return dev; 245 return dev;
260 246
261put: 247put:
@@ -270,29 +256,42 @@ EXPORT_SYMBOL(tegra_mipi_request);
270 256
271void tegra_mipi_free(struct tegra_mipi_device *device) 257void tegra_mipi_free(struct tegra_mipi_device *device)
272{ 258{
273 int err; 259 platform_device_put(device->pdev);
260 kfree(device);
261}
262EXPORT_SYMBOL(tegra_mipi_free);
274 263
275 mutex_lock(&device->mipi->lock); 264int tegra_mipi_enable(struct tegra_mipi_device *dev)
265{
266 int err = 0;
276 267
277 if (--device->mipi->usage_count == 0) { 268 mutex_lock(&dev->mipi->lock);
278 err = tegra_mipi_power_down(device->mipi);
279 if (err < 0) {
280 /*
281 * Not much that can be done here, so an error message
282 * will have to do.
283 */
284 dev_err(device->mipi->dev,
285 "failed to power down MIPI bricks: %d\n",
286 err);
287 }
288 }
289 269
290 mutex_unlock(&device->mipi->lock); 270 if (dev->mipi->usage_count++ == 0)
271 err = tegra_mipi_power_up(dev->mipi);
272
273 mutex_unlock(&dev->mipi->lock);
274
275 return err;
291 276
292 platform_device_put(device->pdev);
293 kfree(device);
294} 277}
295EXPORT_SYMBOL(tegra_mipi_free); 278EXPORT_SYMBOL(tegra_mipi_enable);
279
280int tegra_mipi_disable(struct tegra_mipi_device *dev)
281{
282 int err = 0;
283
284 mutex_lock(&dev->mipi->lock);
285
286 if (--dev->mipi->usage_count == 0)
287 err = tegra_mipi_power_down(dev->mipi);
288
289 mutex_unlock(&dev->mipi->lock);
290
291 return err;
292
293}
294EXPORT_SYMBOL(tegra_mipi_disable);
296 295
297static int tegra_mipi_wait(struct tegra_mipi *mipi) 296static int tegra_mipi_wait(struct tegra_mipi *mipi)
298{ 297{