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authorHarry Wentland <harry.wentland@amd.com>2018-07-06 13:40:33 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-07-16 17:11:51 -0400
commit9a6a8075bd439115b41468eaccdcb5e463196fb5 (patch)
tree7192634ab4e967a6ace0c990096efc07b474b2d4 /drivers/gpu
parentddb85fcd839cab0ac46a44d47c4f345dad4c2cb1 (diff)
drm/amd/display: Fix some checkpatch.pl errors and warnings in dc_link_dp.c
[Why] Any Linux kernel code should pass checkpatch.pl with no errors and little, if any, warning. [How] Fixing some spacing errors and warnings. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c35
1 files changed, 18 insertions, 17 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 701a882505e9..474cd3e01752 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -39,7 +39,7 @@ static bool decide_fallback_link_setting(
39 struct dc_link_settings initial_link_settings, 39 struct dc_link_settings initial_link_settings,
40 struct dc_link_settings *current_link_setting, 40 struct dc_link_settings *current_link_setting,
41 enum link_training_result training_result); 41 enum link_training_result training_result);
42static struct dc_link_settings get_common_supported_link_settings ( 42static struct dc_link_settings get_common_supported_link_settings(
43 struct dc_link_settings link_setting_a, 43 struct dc_link_settings link_setting_a,
44 struct dc_link_settings link_setting_b); 44 struct dc_link_settings link_setting_b);
45 45
@@ -94,8 +94,8 @@ static void dpcd_set_link_settings(
94 uint8_t rate = (uint8_t) 94 uint8_t rate = (uint8_t)
95 (lt_settings->link_settings.link_rate); 95 (lt_settings->link_settings.link_rate);
96 96
97 union down_spread_ctrl downspread = {{0}}; 97 union down_spread_ctrl downspread = { {0} };
98 union lane_count_set lane_count_set = {{0}}; 98 union lane_count_set lane_count_set = { {0} };
99 uint8_t link_set_buffer[2]; 99 uint8_t link_set_buffer[2];
100 100
101 downspread.raw = (uint8_t) 101 downspread.raw = (uint8_t)
@@ -165,11 +165,11 @@ static void dpcd_set_lt_pattern_and_lane_settings(
165 const struct link_training_settings *lt_settings, 165 const struct link_training_settings *lt_settings,
166 enum hw_dp_training_pattern pattern) 166 enum hw_dp_training_pattern pattern)
167{ 167{
168 union dpcd_training_lane dpcd_lane[LANE_COUNT_DP_MAX] = {{{0}}}; 168 union dpcd_training_lane dpcd_lane[LANE_COUNT_DP_MAX] = { { {0} } };
169 const uint32_t dpcd_base_lt_offset = 169 const uint32_t dpcd_base_lt_offset =
170 DP_TRAINING_PATTERN_SET; 170 DP_TRAINING_PATTERN_SET;
171 uint8_t dpcd_lt_buffer[5] = {0}; 171 uint8_t dpcd_lt_buffer[5] = {0};
172 union dpcd_training_pattern dpcd_pattern = {{0}}; 172 union dpcd_training_pattern dpcd_pattern = { {0} };
173 uint32_t lane; 173 uint32_t lane;
174 uint32_t size_in_bytes; 174 uint32_t size_in_bytes;
175 bool edp_workaround = false; /* TODO link_prop.INTERNAL */ 175 bool edp_workaround = false; /* TODO link_prop.INTERNAL */
@@ -233,7 +233,7 @@ static void dpcd_set_lt_pattern_and_lane_settings(
233 link, 233 link,
234 DP_TRAINING_PATTERN_SET, 234 DP_TRAINING_PATTERN_SET,
235 &dpcd_pattern.raw, 235 &dpcd_pattern.raw,
236 sizeof(dpcd_pattern.raw) ); 236 sizeof(dpcd_pattern.raw));
237 237
238 core_link_write_dpcd( 238 core_link_write_dpcd(
239 link, 239 link,
@@ -247,7 +247,7 @@ static void dpcd_set_lt_pattern_and_lane_settings(
247 link, 247 link,
248 dpcd_base_lt_offset, 248 dpcd_base_lt_offset,
249 dpcd_lt_buffer, 249 dpcd_lt_buffer,
250 size_in_bytes + sizeof(dpcd_pattern.raw) ); 250 size_in_bytes + sizeof(dpcd_pattern.raw));
251 251
252 link->cur_lane_setting = lt_settings->lane_settings[0]; 252 link->cur_lane_setting = lt_settings->lane_settings[0];
253} 253}
@@ -429,8 +429,8 @@ static void get_lane_status_and_drive_settings(
429 struct link_training_settings *req_settings) 429 struct link_training_settings *req_settings)
430{ 430{
431 uint8_t dpcd_buf[6] = {0}; 431 uint8_t dpcd_buf[6] = {0};
432 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {{{0}}}; 432 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = { { {0} } };
433 struct link_training_settings request_settings = {{0}}; 433 struct link_training_settings request_settings = { {0} };
434 uint32_t lane; 434 uint32_t lane;
435 435
436 memset(req_settings, '\0', sizeof(struct link_training_settings)); 436 memset(req_settings, '\0', sizeof(struct link_training_settings));
@@ -652,7 +652,7 @@ static bool perform_post_lt_adj_req_sequence(
652 652
653 if (req_drv_setting_changed) { 653 if (req_drv_setting_changed) {
654 update_drive_settings( 654 update_drive_settings(
655 lt_settings,req_settings); 655 lt_settings, req_settings);
656 656
657 dc_link_dp_set_drive_settings(link, 657 dc_link_dp_set_drive_settings(link,
658 lt_settings); 658 lt_settings);
@@ -725,8 +725,8 @@ static enum link_training_result perform_channel_equalization_sequence(
725 enum hw_dp_training_pattern hw_tr_pattern; 725 enum hw_dp_training_pattern hw_tr_pattern;
726 uint32_t retries_ch_eq; 726 uint32_t retries_ch_eq;
727 enum dc_lane_count lane_count = lt_settings->link_settings.lane_count; 727 enum dc_lane_count lane_count = lt_settings->link_settings.lane_count;
728 union lane_align_status_updated dpcd_lane_status_updated = {{0}}; 728 union lane_align_status_updated dpcd_lane_status_updated = { {0} };
729 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {{{0}}}; 729 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = { { {0} } };
730 730
731 hw_tr_pattern = get_supported_tp(link); 731 hw_tr_pattern = get_supported_tp(link);
732 732
@@ -1186,7 +1186,7 @@ bool dp_hbr_verify_link_cap(
1186 return success; 1186 return success;
1187} 1187}
1188 1188
1189static struct dc_link_settings get_common_supported_link_settings ( 1189static struct dc_link_settings get_common_supported_link_settings(
1190 struct dc_link_settings link_setting_a, 1190 struct dc_link_settings link_setting_a,
1191 struct dc_link_settings link_setting_b) 1191 struct dc_link_settings link_setting_b)
1192{ 1192{
@@ -1432,6 +1432,7 @@ static uint32_t bandwidth_in_kbps_from_link_settings(
1432 1432
1433 uint32_t lane_count = link_setting->lane_count; 1433 uint32_t lane_count = link_setting->lane_count;
1434 uint32_t kbps = link_rate_in_kbps; 1434 uint32_t kbps = link_rate_in_kbps;
1435
1435 kbps *= lane_count; 1436 kbps *= lane_count;
1436 kbps *= 8; /* 8 bits per byte*/ 1437 kbps *= 8; /* 8 bits per byte*/
1437 1438
@@ -1449,9 +1450,9 @@ bool dp_validate_mode_timing(
1449 const struct dc_link_settings *link_setting; 1450 const struct dc_link_settings *link_setting;
1450 1451
1451 /*always DP fail safe mode*/ 1452 /*always DP fail safe mode*/
1452 if (timing->pix_clk_khz == (uint32_t)25175 && 1453 if (timing->pix_clk_khz == (uint32_t) 25175 &&
1453 timing->h_addressable == (uint32_t)640 && 1454 timing->h_addressable == (uint32_t) 640 &&
1454 timing->v_addressable == (uint32_t)480) 1455 timing->v_addressable == (uint32_t) 480)
1455 return true; 1456 return true;
1456 1457
1457 /* We always use verified link settings */ 1458 /* We always use verified link settings */
@@ -2001,7 +2002,7 @@ static void handle_automated_test(struct dc_link *link)
2001 2002
2002bool dc_link_handle_hpd_rx_irq(struct dc_link *link, union hpd_irq_data *out_hpd_irq_dpcd_data, bool *out_link_loss) 2003bool dc_link_handle_hpd_rx_irq(struct dc_link *link, union hpd_irq_data *out_hpd_irq_dpcd_data, bool *out_link_loss)
2003{ 2004{
2004 union hpd_irq_data hpd_irq_dpcd_data = {{{{0}}}}; 2005 union hpd_irq_data hpd_irq_dpcd_data = { { { {0} } } };
2005 union device_service_irq device_service_clear = { { 0 } }; 2006 union device_service_irq device_service_clear = { { 0 } };
2006 enum dc_status result; 2007 enum dc_status result;
2007 2008