diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2016-09-15 15:42:09 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-09-16 15:52:54 -0400 |
commit | 95e588a01424cb4d6f38bc02f84c8dfe05e0e55f (patch) | |
tree | a78debf34195e970e3f1763adc8d173104deeb5a /drivers/gpu | |
parent | 0f444c24dd00ba562483d5825f9757e0f933d813 (diff) |
drm/amdgpu/gfx6: drop gds_switch callback
GDS works differently on GFX6, plus the callback was
empty.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c index d33d3213cb6f..e7293f64d953 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | |||
@@ -2678,14 +2678,6 @@ static uint64_t gfx_v6_0_get_gpu_clock_counter(struct amdgpu_device *adev) | |||
2678 | return clock; | 2678 | return clock; |
2679 | } | 2679 | } |
2680 | 2680 | ||
2681 | static void gfx_v6_0_ring_emit_gds_switch(struct amdgpu_ring *ring, | ||
2682 | uint32_t vmid, | ||
2683 | uint32_t gds_base, uint32_t gds_size, | ||
2684 | uint32_t gws_base, uint32_t gws_size, | ||
2685 | uint32_t oa_base, uint32_t oa_size) | ||
2686 | { | ||
2687 | } | ||
2688 | |||
2689 | static void gfx_v6_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags) | 2681 | static void gfx_v6_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags) |
2690 | { | 2682 | { |
2691 | amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); | 2683 | amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); |
@@ -3115,7 +3107,6 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = { | |||
3115 | .emit_fence = gfx_v6_0_ring_emit_fence, | 3107 | .emit_fence = gfx_v6_0_ring_emit_fence, |
3116 | .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, | 3108 | .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, |
3117 | .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, | 3109 | .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, |
3118 | .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch, | ||
3119 | .emit_hdp_flush = gfx_v6_0_ring_emit_hdp_flush, | 3110 | .emit_hdp_flush = gfx_v6_0_ring_emit_hdp_flush, |
3120 | .emit_hdp_invalidate = gfx_v6_0_ring_emit_hdp_invalidate, | 3111 | .emit_hdp_invalidate = gfx_v6_0_ring_emit_hdp_invalidate, |
3121 | .test_ring = gfx_v6_0_ring_test_ring, | 3112 | .test_ring = gfx_v6_0_ring_test_ring, |
@@ -3133,7 +3124,6 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = { | |||
3133 | .emit_fence = gfx_v6_0_ring_emit_fence, | 3124 | .emit_fence = gfx_v6_0_ring_emit_fence, |
3134 | .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, | 3125 | .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, |
3135 | .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, | 3126 | .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, |
3136 | .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch, | ||
3137 | .emit_hdp_flush = gfx_v6_0_ring_emit_hdp_flush, | 3127 | .emit_hdp_flush = gfx_v6_0_ring_emit_hdp_flush, |
3138 | .emit_hdp_invalidate = gfx_v6_0_ring_emit_hdp_invalidate, | 3128 | .emit_hdp_invalidate = gfx_v6_0_ring_emit_hdp_invalidate, |
3139 | .test_ring = gfx_v6_0_ring_test_ring, | 3129 | .test_ring = gfx_v6_0_ring_test_ring, |