diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2018-03-22 03:46:47 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-04-11 14:07:48 -0400 |
commit | 8bb575a2d83af097980641d864401b303286755c (patch) | |
tree | 74ee2811a82a5eae732072efbf432e12af3491da /drivers/gpu | |
parent | b61e54cb1881c7cb74787da6a5d39d8d48dcc075 (diff) |
drm/amd/pp: Save vf state in pp context
Store vf state in pp_context so we can
deprecate the cgs interface.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
6 files changed, 13 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c index 9ada102e253c..337af789d258 100644 --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c | |||
@@ -46,7 +46,8 @@ static int amd_powerplay_create(struct amdgpu_device *adev) | |||
46 | return -ENOMEM; | 46 | return -ENOMEM; |
47 | 47 | ||
48 | hwmgr->adev = adev; | 48 | hwmgr->adev = adev; |
49 | hwmgr->pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false; | 49 | hwmgr->not_vf = !amdgpu_sriov_vf(adev); |
50 | hwmgr->pm_en = (amdgpu_dpm && hwmgr->not_vf) ? true : false; | ||
50 | hwmgr->device = amdgpu_cgs_create_device(adev); | 51 | hwmgr->device = amdgpu_cgs_create_device(adev); |
51 | mutex_init(&hwmgr->smu_lock); | 52 | mutex_init(&hwmgr->smu_lock); |
52 | hwmgr->chip_family = adev->family; | 53 | hwmgr->chip_family = adev->family; |
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index d6c9a3bac0a9..d5cadc61c9b3 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | |||
@@ -718,6 +718,7 @@ struct pp_hwmgr { | |||
718 | uint32_t chip_family; | 718 | uint32_t chip_family; |
719 | uint32_t chip_id; | 719 | uint32_t chip_id; |
720 | uint32_t smu_version; | 720 | uint32_t smu_version; |
721 | bool not_vf; | ||
721 | bool pm_en; | 722 | bool pm_en; |
722 | struct mutex smu_lock; | 723 | struct mutex smu_lock; |
723 | 724 | ||
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c index faef78321446..35b947e5292c 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | |||
@@ -288,8 +288,7 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr) | |||
288 | struct fiji_smumgr *priv = (struct fiji_smumgr *)(hwmgr->smu_backend); | 288 | struct fiji_smumgr *priv = (struct fiji_smumgr *)(hwmgr->smu_backend); |
289 | 289 | ||
290 | /* Only start SMC if SMC RAM is not running */ | 290 | /* Only start SMC if SMC RAM is not running */ |
291 | if (!(smu7_is_smc_ram_running(hwmgr) | 291 | if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) { |
292 | || cgs_is_virtualization_enabled(hwmgr->device))) { | ||
293 | /* Check if SMU is running in protected mode */ | 292 | /* Check if SMU is running in protected mode */ |
294 | if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, | 293 | if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, |
295 | CGS_IND_REG__SMC, | 294 | CGS_IND_REG__SMC, |
@@ -335,8 +334,8 @@ static bool fiji_is_hw_avfs_present(struct pp_hwmgr *hwmgr) | |||
335 | uint32_t efuse = 0; | 334 | uint32_t efuse = 0; |
336 | uint32_t mask = (1 << ((AVFS_EN_MSB - AVFS_EN_LSB) + 1)) - 1; | 335 | uint32_t mask = (1 << ((AVFS_EN_MSB - AVFS_EN_LSB) + 1)) - 1; |
337 | 336 | ||
338 | if (cgs_is_virtualization_enabled(hwmgr->device)) | 337 | if (!hwmgr->not_vf) |
339 | return 0; | 338 | return false; |
340 | 339 | ||
341 | if (!atomctrl_read_efuse(hwmgr->device, AVFS_EN_LSB, AVFS_EN_MSB, | 340 | if (!atomctrl_read_efuse(hwmgr->device, AVFS_EN_LSB, AVFS_EN_MSB, |
342 | mask, &efuse)) { | 341 | mask, &efuse)) { |
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c index fe6854eecf7b..05e60e8fee0b 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | |||
@@ -295,8 +295,7 @@ static int polaris10_start_smu(struct pp_hwmgr *hwmgr) | |||
295 | struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(hwmgr->smu_backend); | 295 | struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(hwmgr->smu_backend); |
296 | 296 | ||
297 | /* Only start SMC if SMC RAM is not running */ | 297 | /* Only start SMC if SMC RAM is not running */ |
298 | if (!(smu7_is_smc_ram_running(hwmgr) | 298 | if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) { |
299 | || cgs_is_virtualization_enabled(hwmgr->device))) { | ||
300 | smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE)); | 299 | smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE)); |
301 | smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL)); | 300 | smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL)); |
302 | 301 | ||
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c index 0399c10d2be0..3684822b75b2 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | |||
@@ -375,7 +375,7 @@ static int smu7_populate_single_firmware_entry(struct pp_hwmgr *hwmgr, | |||
375 | entry->meta_data_addr_low = 0; | 375 | entry->meta_data_addr_low = 0; |
376 | 376 | ||
377 | /* digest need be excluded out */ | 377 | /* digest need be excluded out */ |
378 | if (cgs_is_virtualization_enabled(hwmgr->device)) | 378 | if (!hwmgr->not_vf) |
379 | info.image_size -= 20; | 379 | info.image_size -= 20; |
380 | entry->data_size_byte = info.image_size; | 380 | entry->data_size_byte = info.image_size; |
381 | entry->num_register_entries = 0; | 381 | entry->num_register_entries = 0; |
@@ -409,7 +409,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) | |||
409 | 0x0); | 409 | 0x0); |
410 | 410 | ||
411 | if (hwmgr->chip_id > CHIP_TOPAZ) { /* add support for Topaz */ | 411 | if (hwmgr->chip_id > CHIP_TOPAZ) { /* add support for Topaz */ |
412 | if (!cgs_is_virtualization_enabled(hwmgr->device)) { | 412 | if (hwmgr->not_vf) { |
413 | smu7_send_msg_to_smc_with_parameter(hwmgr, | 413 | smu7_send_msg_to_smc_with_parameter(hwmgr, |
414 | PPSMC_MSG_SMU_DRAM_ADDR_HI, | 414 | PPSMC_MSG_SMU_DRAM_ADDR_HI, |
415 | upper_32_bits(smu_data->smu_buffer.mc_addr)); | 415 | upper_32_bits(smu_data->smu_buffer.mc_addr)); |
@@ -467,7 +467,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) | |||
467 | PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr, | 467 | PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr, |
468 | UCODE_ID_SDMA1, &toc->entry[toc->num_entries++]), | 468 | UCODE_ID_SDMA1, &toc->entry[toc->num_entries++]), |
469 | "Failed to Get Firmware Entry.", return -EINVAL); | 469 | "Failed to Get Firmware Entry.", return -EINVAL); |
470 | if (cgs_is_virtualization_enabled(hwmgr->device)) | 470 | if (!hwmgr->not_vf) |
471 | PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr, | 471 | PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr, |
472 | UCODE_ID_MEC_STORAGE, &toc->entry[toc->num_entries++]), | 472 | UCODE_ID_MEC_STORAGE, &toc->entry[toc->num_entries++]), |
473 | "Failed to Get Firmware Entry.", return -EINVAL); | 473 | "Failed to Get Firmware Entry.", return -EINVAL); |
@@ -608,7 +608,7 @@ int smu7_init(struct pp_hwmgr *hwmgr) | |||
608 | smu_data->header = smu_data->header_buffer.kaddr; | 608 | smu_data->header = smu_data->header_buffer.kaddr; |
609 | smu_data->header_buffer.mc_addr = mc_addr; | 609 | smu_data->header_buffer.mc_addr = mc_addr; |
610 | 610 | ||
611 | if (cgs_is_virtualization_enabled(hwmgr->device)) | 611 | if (!hwmgr->not_vf) |
612 | return 0; | 612 | return 0; |
613 | 613 | ||
614 | smu_data->smu_buffer.data_size = 200*4096; | 614 | smu_data->smu_buffer.data_size = 200*4096; |
@@ -643,7 +643,7 @@ int smu7_smu_fini(struct pp_hwmgr *hwmgr) | |||
643 | &smu_data->header_buffer.mc_addr, | 643 | &smu_data->header_buffer.mc_addr, |
644 | &smu_data->header_buffer.kaddr); | 644 | &smu_data->header_buffer.kaddr); |
645 | 645 | ||
646 | if (!cgs_is_virtualization_enabled(hwmgr->device)) | 646 | if (hwmgr->not_vf) |
647 | amdgpu_bo_free_kernel(&smu_data->smu_buffer.handle, | 647 | amdgpu_bo_free_kernel(&smu_data->smu_buffer.handle, |
648 | &smu_data->smu_buffer.mc_addr, | 648 | &smu_data->smu_buffer.mc_addr, |
649 | &smu_data->smu_buffer.kaddr); | 649 | &smu_data->smu_buffer.kaddr); |
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c index b51d7468c3e7..2ba05d2b4302 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | |||
@@ -199,8 +199,7 @@ static int tonga_start_smu(struct pp_hwmgr *hwmgr) | |||
199 | int result; | 199 | int result; |
200 | 200 | ||
201 | /* Only start SMC if SMC RAM is not running */ | 201 | /* Only start SMC if SMC RAM is not running */ |
202 | if (!(smu7_is_smc_ram_running(hwmgr) || | 202 | if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) { |
203 | cgs_is_virtualization_enabled(hwmgr->device))) { | ||
204 | /*Check if SMU is running in protected mode*/ | 203 | /*Check if SMU is running in protected mode*/ |
205 | if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, | 204 | if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, |
206 | SMU_FIRMWARE, SMU_MODE)) { | 205 | SMU_FIRMWARE, SMU_MODE)) { |