diff options
author | Rodrigo Vivi <rodrigo.vivi@gmail.com> | 2011-12-15 11:47:33 -0500 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2012-01-06 16:54:12 -0500 |
commit | 55a6713b3f30a5024056027e9dbf03ac8f13bfc9 (patch) | |
tree | 3416145a4e9ab7761623efcc73124ab73570a076 /drivers/gpu | |
parent | 23bd15ec662344dc10e9918fdd0dbc58bc71526d (diff) |
drm/i915: Removing TV Out modes.
These modes are no longer needed or are not according to TV timing standards.
Intel PRM Vol 3 - Display Registers Updated -
Section 5 TV-Out Programming /
5.2.1 Television Standards /
5.2.1.1 Timing tables
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_tv.c | 122 |
1 files changed, 0 insertions, 122 deletions
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 2b1fcadbc5ce..1571be37ce3e 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c | |||
@@ -674,78 +674,6 @@ static const struct tv_mode tv_modes[] = { | |||
674 | .filter_table = filter_table, | 674 | .filter_table = filter_table, |
675 | }, | 675 | }, |
676 | { | 676 | { |
677 | .name = "480p@59.94Hz", | ||
678 | .clock = 107520, | ||
679 | .refresh = 59940, | ||
680 | .oversample = TV_OVERSAMPLE_4X, | ||
681 | .component_only = 1, | ||
682 | |||
683 | .hsync_end = 64, .hblank_end = 122, | ||
684 | .hblank_start = 842, .htotal = 857, | ||
685 | |||
686 | .progressive = true, .trilevel_sync = false, | ||
687 | |||
688 | .vsync_start_f1 = 12, .vsync_start_f2 = 12, | ||
689 | .vsync_len = 12, | ||
690 | |||
691 | .veq_ena = false, | ||
692 | |||
693 | .vi_end_f1 = 44, .vi_end_f2 = 44, | ||
694 | .nbr_end = 479, | ||
695 | |||
696 | .burst_ena = false, | ||
697 | |||
698 | .filter_table = filter_table, | ||
699 | }, | ||
700 | { | ||
701 | .name = "480p@60Hz", | ||
702 | .clock = 107520, | ||
703 | .refresh = 60000, | ||
704 | .oversample = TV_OVERSAMPLE_4X, | ||
705 | .component_only = 1, | ||
706 | |||
707 | .hsync_end = 64, .hblank_end = 122, | ||
708 | .hblank_start = 842, .htotal = 856, | ||
709 | |||
710 | .progressive = true, .trilevel_sync = false, | ||
711 | |||
712 | .vsync_start_f1 = 12, .vsync_start_f2 = 12, | ||
713 | .vsync_len = 12, | ||
714 | |||
715 | .veq_ena = false, | ||
716 | |||
717 | .vi_end_f1 = 44, .vi_end_f2 = 44, | ||
718 | .nbr_end = 479, | ||
719 | |||
720 | .burst_ena = false, | ||
721 | |||
722 | .filter_table = filter_table, | ||
723 | }, | ||
724 | { | ||
725 | .name = "576p", | ||
726 | .clock = 107520, | ||
727 | .refresh = 50000, | ||
728 | .oversample = TV_OVERSAMPLE_4X, | ||
729 | .component_only = 1, | ||
730 | |||
731 | .hsync_end = 64, .hblank_end = 139, | ||
732 | .hblank_start = 859, .htotal = 863, | ||
733 | |||
734 | .progressive = true, .trilevel_sync = false, | ||
735 | |||
736 | .vsync_start_f1 = 10, .vsync_start_f2 = 10, | ||
737 | .vsync_len = 10, | ||
738 | |||
739 | .veq_ena = false, | ||
740 | |||
741 | .vi_end_f1 = 48, .vi_end_f2 = 48, | ||
742 | .nbr_end = 575, | ||
743 | |||
744 | .burst_ena = false, | ||
745 | |||
746 | .filter_table = filter_table, | ||
747 | }, | ||
748 | { | ||
749 | .name = "720p@60Hz", | 677 | .name = "720p@60Hz", |
750 | .clock = 148800, | 678 | .clock = 148800, |
751 | .refresh = 60000, | 679 | .refresh = 60000, |
@@ -770,30 +698,6 @@ static const struct tv_mode tv_modes[] = { | |||
770 | .filter_table = filter_table, | 698 | .filter_table = filter_table, |
771 | }, | 699 | }, |
772 | { | 700 | { |
773 | .name = "720p@59.94Hz", | ||
774 | .clock = 148800, | ||
775 | .refresh = 59940, | ||
776 | .oversample = TV_OVERSAMPLE_2X, | ||
777 | .component_only = 1, | ||
778 | |||
779 | .hsync_end = 80, .hblank_end = 300, | ||
780 | .hblank_start = 1580, .htotal = 1651, | ||
781 | |||
782 | .progressive = true, .trilevel_sync = true, | ||
783 | |||
784 | .vsync_start_f1 = 10, .vsync_start_f2 = 10, | ||
785 | .vsync_len = 10, | ||
786 | |||
787 | .veq_ena = false, | ||
788 | |||
789 | .vi_end_f1 = 29, .vi_end_f2 = 29, | ||
790 | .nbr_end = 719, | ||
791 | |||
792 | .burst_ena = false, | ||
793 | |||
794 | .filter_table = filter_table, | ||
795 | }, | ||
796 | { | ||
797 | .name = "720p@50Hz", | 701 | .name = "720p@50Hz", |
798 | .clock = 148800, | 702 | .clock = 148800, |
799 | .refresh = 50000, | 703 | .refresh = 50000, |
@@ -870,32 +774,6 @@ static const struct tv_mode tv_modes[] = { | |||
870 | 774 | ||
871 | .filter_table = filter_table, | 775 | .filter_table = filter_table, |
872 | }, | 776 | }, |
873 | { | ||
874 | .name = "1080i@59.94Hz", | ||
875 | .clock = 148800, | ||
876 | .refresh = 29970, | ||
877 | .oversample = TV_OVERSAMPLE_2X, | ||
878 | .component_only = 1, | ||
879 | |||
880 | .hsync_end = 88, .hblank_end = 235, | ||
881 | .hblank_start = 2155, .htotal = 2201, | ||
882 | |||
883 | .progressive = false, .trilevel_sync = true, | ||
884 | |||
885 | .vsync_start_f1 = 4, .vsync_start_f2 = 5, | ||
886 | .vsync_len = 10, | ||
887 | |||
888 | .veq_ena = true, .veq_start_f1 = 4, | ||
889 | .veq_start_f2 = 4, .veq_len = 10, | ||
890 | |||
891 | |||
892 | .vi_end_f1 = 21, .vi_end_f2 = 22, | ||
893 | .nbr_end = 539, | ||
894 | |||
895 | .burst_ena = false, | ||
896 | |||
897 | .filter_table = filter_table, | ||
898 | }, | ||
899 | }; | 777 | }; |
900 | 778 | ||
901 | static struct intel_tv *enc_to_intel_tv(struct drm_encoder *encoder) | 779 | static struct intel_tv *enc_to_intel_tv(struct drm_encoder *encoder) |