diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-02-17 13:40:53 -0500 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-02-22 10:55:49 -0500 |
commit | 548f245ba6a318ef93f4d79bcc15cfe59a86f0d5 (patch) | |
tree | e5483f47b02a7a280fd0a0d6220f65f4ca1806f2 /drivers/gpu | |
parent | fc9a2228ac208dc2b6033cfc6c56b6f7655fbdfa (diff) |
drm/i915: fix per-pipe reads after "cleanup"
In a few places I replaced reads of per-pipe registers with the actual
register offsets themselves (converting I915_READ(reg) to _PIPE(reg)).
Alexey caught this on his 9xx machine because the cursor control write
was affected. A quick audit showed a few more places where I'd borked
a read, so here's a patch to fix things up.
Reported-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: compilation fix]
Tested-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6bda30dae400..1a15438512f1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -5220,7 +5220,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) | |||
5220 | bool visible = base != 0; | 5220 | bool visible = base != 0; |
5221 | 5221 | ||
5222 | if (intel_crtc->cursor_visible != visible) { | 5222 | if (intel_crtc->cursor_visible != visible) { |
5223 | uint32_t cntl = CURCNTR(pipe); | 5223 | uint32_t cntl = I915_READ(CURCNTR(pipe)); |
5224 | if (base) { | 5224 | if (base) { |
5225 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); | 5225 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); |
5226 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; | 5226 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; |
@@ -5590,7 +5590,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc) | |||
5590 | struct drm_i915_private *dev_priv = dev->dev_private; | 5590 | struct drm_i915_private *dev_priv = dev->dev_private; |
5591 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 5591 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
5592 | int pipe = intel_crtc->pipe; | 5592 | int pipe = intel_crtc->pipe; |
5593 | u32 dpll = DPLL(pipe); | 5593 | u32 dpll = I915_READ(DPLL(pipe)); |
5594 | u32 fp; | 5594 | u32 fp; |
5595 | intel_clock_t clock; | 5595 | intel_clock_t clock; |
5596 | 5596 | ||
@@ -5675,13 +5675,14 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc) | |||
5675 | struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, | 5675 | struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, |
5676 | struct drm_crtc *crtc) | 5676 | struct drm_crtc *crtc) |
5677 | { | 5677 | { |
5678 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
5678 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 5679 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
5679 | int pipe = intel_crtc->pipe; | 5680 | int pipe = intel_crtc->pipe; |
5680 | struct drm_display_mode *mode; | 5681 | struct drm_display_mode *mode; |
5681 | int htot = HTOTAL(pipe); | 5682 | int htot = I915_READ(HTOTAL(pipe)); |
5682 | int hsync = HSYNC(pipe); | 5683 | int hsync = I915_READ(HSYNC(pipe)); |
5683 | int vtot = VTOTAL(pipe); | 5684 | int vtot = I915_READ(VTOTAL(pipe)); |
5684 | int vsync = VSYNC(pipe); | 5685 | int vsync = I915_READ(VSYNC(pipe)); |
5685 | 5686 | ||
5686 | mode = kzalloc(sizeof(*mode), GFP_KERNEL); | 5687 | mode = kzalloc(sizeof(*mode), GFP_KERNEL); |
5687 | if (!mode) | 5688 | if (!mode) |