drm/amdgpu: bypass vce clock if vce is idle on Fiji.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index a6b4e27bee89..3f6db4ec0102 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -716,7 +716,8 @@ static int vce_v3_0_set_clockgating_state(void *handle,
         int i;
 
         if ((adev->asic_type == CHIP_POLARIS10) ||
-            (adev->asic_type == CHIP_TONGA))
+                (adev->asic_type == CHIP_TONGA) ||
+                (adev->asic_type == CHIP_FIJI))
                 vce_v3_0_set_bypass_mode(adev, enable);
 
         if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))