diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2016-06-23 23:43:36 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-07-07 15:02:05 -0400 |
commit | 313c45fdb4b3a95004df85e9d15c9e70895f219a (patch) | |
tree | 564029560b9b5daf25323ef532b07535de12d2ee /drivers/gpu | |
parent | 34e3205e089606b07bdc90863e7c057def0c3fe4 (diff) |
drm/amdgpu/gmc7: remove duplicate wait_for_idle functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 33 |
1 files changed, 5 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c index eb4a7b8f3742..d24a82bd0c7a 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | |||
@@ -39,6 +39,7 @@ | |||
39 | 39 | ||
40 | static void gmc_v7_0_set_gart_funcs(struct amdgpu_device *adev); | 40 | static void gmc_v7_0_set_gart_funcs(struct amdgpu_device *adev); |
41 | static void gmc_v7_0_set_irq_funcs(struct amdgpu_device *adev); | 41 | static void gmc_v7_0_set_irq_funcs(struct amdgpu_device *adev); |
42 | static int gmc_v7_0_wait_for_idle(void *handle); | ||
42 | 43 | ||
43 | MODULE_FIRMWARE("radeon/bonaire_mc.bin"); | 44 | MODULE_FIRMWARE("radeon/bonaire_mc.bin"); |
44 | MODULE_FIRMWARE("radeon/hawaii_mc.bin"); | 45 | MODULE_FIRMWARE("radeon/hawaii_mc.bin"); |
@@ -73,30 +74,6 @@ static void gmc_v7_0_init_golden_registers(struct amdgpu_device *adev) | |||
73 | } | 74 | } |
74 | } | 75 | } |
75 | 76 | ||
76 | /** | ||
77 | * gmc7_mc_wait_for_idle - wait for MC idle callback. | ||
78 | * | ||
79 | * @adev: amdgpu_device pointer | ||
80 | * | ||
81 | * Wait for the MC (memory controller) to be idle. | ||
82 | * (evergreen+). | ||
83 | * Returns 0 if the MC is idle, -1 if not. | ||
84 | */ | ||
85 | static int gmc_v7_0_mc_wait_for_idle(struct amdgpu_device *adev) | ||
86 | { | ||
87 | unsigned i; | ||
88 | u32 tmp; | ||
89 | |||
90 | for (i = 0; i < adev->usec_timeout; i++) { | ||
91 | /* read MC_STATUS */ | ||
92 | tmp = RREG32(mmSRBM_STATUS) & 0x1F00; | ||
93 | if (!tmp) | ||
94 | return 0; | ||
95 | udelay(1); | ||
96 | } | ||
97 | return -1; | ||
98 | } | ||
99 | |||
100 | static void gmc_v7_0_mc_stop(struct amdgpu_device *adev, | 77 | static void gmc_v7_0_mc_stop(struct amdgpu_device *adev, |
101 | struct amdgpu_mode_mc_save *save) | 78 | struct amdgpu_mode_mc_save *save) |
102 | { | 79 | { |
@@ -105,7 +82,7 @@ static void gmc_v7_0_mc_stop(struct amdgpu_device *adev, | |||
105 | if (adev->mode_info.num_crtc) | 82 | if (adev->mode_info.num_crtc) |
106 | amdgpu_display_stop_mc_access(adev, save); | 83 | amdgpu_display_stop_mc_access(adev, save); |
107 | 84 | ||
108 | gmc_v7_0_mc_wait_for_idle(adev); | 85 | gmc_v7_0_wait_for_idle((void *)adev); |
109 | 86 | ||
110 | blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL); | 87 | blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL); |
111 | if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { | 88 | if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { |
@@ -311,7 +288,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) | |||
311 | amdgpu_display_set_vga_render_state(adev, false); | 288 | amdgpu_display_set_vga_render_state(adev, false); |
312 | 289 | ||
313 | gmc_v7_0_mc_stop(adev, &save); | 290 | gmc_v7_0_mc_stop(adev, &save); |
314 | if (gmc_v7_0_mc_wait_for_idle(adev)) { | 291 | if (gmc_v7_0_wait_for_idle((void *)adev)) { |
315 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); | 292 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); |
316 | } | 293 | } |
317 | /* Update configuration */ | 294 | /* Update configuration */ |
@@ -331,7 +308,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) | |||
331 | WREG32(mmMC_VM_AGP_BASE, 0); | 308 | WREG32(mmMC_VM_AGP_BASE, 0); |
332 | WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); | 309 | WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); |
333 | WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); | 310 | WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); |
334 | if (gmc_v7_0_mc_wait_for_idle(adev)) { | 311 | if (gmc_v7_0_wait_for_idle((void *)adev)) { |
335 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); | 312 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); |
336 | } | 313 | } |
337 | gmc_v7_0_mc_resume(adev, &save); | 314 | gmc_v7_0_mc_resume(adev, &save); |
@@ -1137,7 +1114,7 @@ static int gmc_v7_0_soft_reset(void *handle) | |||
1137 | 1114 | ||
1138 | if (srbm_soft_reset) { | 1115 | if (srbm_soft_reset) { |
1139 | gmc_v7_0_mc_stop(adev, &save); | 1116 | gmc_v7_0_mc_stop(adev, &save); |
1140 | if (gmc_v7_0_wait_for_idle(adev)) { | 1117 | if (gmc_v7_0_wait_for_idle((void *)adev)) { |
1141 | dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); | 1118 | dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); |
1142 | } | 1119 | } |
1143 | 1120 | ||