diff options
author | Dave Airlie <airlied@redhat.com> | 2018-11-28 19:19:04 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2018-11-28 19:19:09 -0500 |
commit | 1a31c26ed7b495f152e3103dc7c68e3307a39541 (patch) | |
tree | 64f05f0c356deaf18c5e86bf73a08c4f66f5d822 /drivers/gpu | |
parent | bfeb122d3080b03aa49405c615f4d8144ab30073 (diff) | |
parent | 256856efb8cc2b5468c69edf45eb0ab579833ce7 (diff) |
Merge tag 'du-next-20181123' of git://linuxtv.org/pinchartl/media into drm-next
R-Car DU changes for v4.21:
- R8A7744 and R8A77470 support
- R8A77965 LVDS support
- Miscellaneous fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3165107.GPE8tO0qUE@avalon
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_du_drv.c | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_du_kms.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_du_plane.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_lvds.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/shmobile/shmob_drm_drv.c | 4 |
6 files changed, 60 insertions, 13 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 17741843cf51..90dacab67be5 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c | |||
@@ -226,9 +226,6 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) | |||
226 | * system clock, and have no internal clock divider. | 226 | * system clock, and have no internal clock divider. |
227 | */ | 227 | */ |
228 | 228 | ||
229 | if (WARN_ON(!rcrtc->extclock)) | ||
230 | return; | ||
231 | |||
232 | /* | 229 | /* |
233 | * The H3 ES1.x exhibits dot clock duty cycle stability issues. | 230 | * The H3 ES1.x exhibits dot clock duty cycle stability issues. |
234 | * We can work around them by configuring the DPLL to twice the | 231 | * We can work around them by configuring the DPLL to twice the |
@@ -701,7 +698,7 @@ static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc, | |||
701 | * CRTC will be put later in .atomic_disable(). | 698 | * CRTC will be put later in .atomic_disable(). |
702 | * | 699 | * |
703 | * If a mode set is not in progress the CRTC is enabled, and the | 700 | * If a mode set is not in progress the CRTC is enabled, and the |
704 | * following get call will be a no-op. There is thus no need to belance | 701 | * following get call will be a no-op. There is thus no need to balance |
705 | * it in .atomic_flush() either. | 702 | * it in .atomic_flush() either. |
706 | */ | 703 | */ |
707 | rcar_du_crtc_get(rcrtc); | 704 | rcar_du_crtc_get(rcrtc); |
@@ -738,10 +735,22 @@ enum drm_mode_status rcar_du_crtc_mode_valid(struct drm_crtc *crtc, | |||
738 | struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); | 735 | struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); |
739 | struct rcar_du_device *rcdu = rcrtc->group->dev; | 736 | struct rcar_du_device *rcdu = rcrtc->group->dev; |
740 | bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; | 737 | bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; |
738 | unsigned int vbp; | ||
741 | 739 | ||
742 | if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED)) | 740 | if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED)) |
743 | return MODE_NO_INTERLACE; | 741 | return MODE_NO_INTERLACE; |
744 | 742 | ||
743 | /* | ||
744 | * The hardware requires a minimum combined horizontal sync and back | ||
745 | * porch of 20 pixels and a minimum vertical back porch of 3 lines. | ||
746 | */ | ||
747 | if (mode->htotal - mode->hsync_start < 20) | ||
748 | return MODE_HBLANK_NARROW; | ||
749 | |||
750 | vbp = (mode->vtotal - mode->vsync_end) / (interlaced ? 2 : 1); | ||
751 | if (vbp < 3) | ||
752 | return MODE_VBLANK_NARROW; | ||
753 | |||
745 | return MODE_OK; | 754 | return MODE_OK; |
746 | } | 755 | } |
747 | 756 | ||
@@ -1002,7 +1011,7 @@ unlock: | |||
1002 | drm_modeset_drop_locks(&ctx); | 1011 | drm_modeset_drop_locks(&ctx); |
1003 | drm_modeset_acquire_fini(&ctx); | 1012 | drm_modeset_acquire_fini(&ctx); |
1004 | 1013 | ||
1005 | return 0; | 1014 | return ret; |
1006 | } | 1015 | } |
1007 | 1016 | ||
1008 | static const struct drm_crtc_funcs crtc_funcs_gen2 = { | 1017 | static const struct drm_crtc_funcs crtc_funcs_gen2 = { |
@@ -1113,9 +1122,16 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, | |||
1113 | clk = devm_clk_get(rcdu->dev, clk_name); | 1122 | clk = devm_clk_get(rcdu->dev, clk_name); |
1114 | if (!IS_ERR(clk)) { | 1123 | if (!IS_ERR(clk)) { |
1115 | rcrtc->extclock = clk; | 1124 | rcrtc->extclock = clk; |
1116 | } else if (PTR_ERR(rcrtc->clock) == -EPROBE_DEFER) { | 1125 | } else if (PTR_ERR(clk) == -EPROBE_DEFER) { |
1117 | dev_info(rcdu->dev, "can't get external clock %u\n", hwindex); | ||
1118 | return -EPROBE_DEFER; | 1126 | return -EPROBE_DEFER; |
1127 | } else if (rcdu->info->dpll_mask & BIT(hwindex)) { | ||
1128 | /* | ||
1129 | * DU channels that have a display PLL can't use the internal | ||
1130 | * system clock and thus require an external clock. | ||
1131 | */ | ||
1132 | ret = PTR_ERR(clk); | ||
1133 | dev_err(rcdu->dev, "can't get dclkin.%u: %d\n", hwindex, ret); | ||
1134 | return ret; | ||
1119 | } | 1135 | } |
1120 | 1136 | ||
1121 | init_waitqueue_head(&rcrtc->flip_wait); | 1137 | init_waitqueue_head(&rcrtc->flip_wait); |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index 7015974c247a..94f055186b95 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c | |||
@@ -41,7 +41,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = { | |||
41 | .channels_mask = BIT(1) | BIT(0), | 41 | .channels_mask = BIT(1) | BIT(0), |
42 | .routes = { | 42 | .routes = { |
43 | /* | 43 | /* |
44 | * R8A7743 has one RGB output and one LVDS output | 44 | * R8A774[34] has one RGB output and one LVDS output |
45 | */ | 45 | */ |
46 | [RCAR_DU_OUTPUT_DPAD0] = { | 46 | [RCAR_DU_OUTPUT_DPAD0] = { |
47 | .possible_crtcs = BIT(1) | BIT(0), | 47 | .possible_crtcs = BIT(1) | BIT(0), |
@@ -77,6 +77,33 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = { | |||
77 | }, | 77 | }, |
78 | }; | 78 | }; |
79 | 79 | ||
80 | static const struct rcar_du_device_info rzg1_du_r8a77470_info = { | ||
81 | .gen = 2, | ||
82 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | ||
83 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
84 | | RCAR_DU_FEATURE_INTERLACED | ||
85 | | RCAR_DU_FEATURE_TVM_SYNC, | ||
86 | .channels_mask = BIT(1) | BIT(0), | ||
87 | .routes = { | ||
88 | /* | ||
89 | * R8A77470 has two RGB outputs, one LVDS output, and | ||
90 | * one (currently unsupported) analog video output | ||
91 | */ | ||
92 | [RCAR_DU_OUTPUT_DPAD0] = { | ||
93 | .possible_crtcs = BIT(0), | ||
94 | .port = 0, | ||
95 | }, | ||
96 | [RCAR_DU_OUTPUT_DPAD1] = { | ||
97 | .possible_crtcs = BIT(1), | ||
98 | .port = 1, | ||
99 | }, | ||
100 | [RCAR_DU_OUTPUT_LVDS0] = { | ||
101 | .possible_crtcs = BIT(0) | BIT(1), | ||
102 | .port = 2, | ||
103 | }, | ||
104 | }, | ||
105 | }; | ||
106 | |||
80 | static const struct rcar_du_device_info rcar_du_r8a7779_info = { | 107 | static const struct rcar_du_device_info rcar_du_r8a7779_info = { |
81 | .gen = 2, | 108 | .gen = 2, |
82 | .features = RCAR_DU_FEATURE_INTERLACED | 109 | .features = RCAR_DU_FEATURE_INTERLACED |
@@ -341,7 +368,9 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = { | |||
341 | 368 | ||
342 | static const struct of_device_id rcar_du_of_table[] = { | 369 | static const struct of_device_id rcar_du_of_table[] = { |
343 | { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info }, | 370 | { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info }, |
371 | { .compatible = "renesas,du-r8a7744", .data = &rzg1_du_r8a7743_info }, | ||
344 | { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info }, | 372 | { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info }, |
373 | { .compatible = "renesas,du-r8a77470", .data = &rzg1_du_r8a77470_info }, | ||
345 | { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info }, | 374 | { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info }, |
346 | { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info }, | 375 | { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info }, |
347 | { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info }, | 376 | { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info }, |
@@ -437,7 +466,7 @@ static int rcar_du_remove(struct platform_device *pdev) | |||
437 | drm_kms_helper_poll_fini(ddev); | 466 | drm_kms_helper_poll_fini(ddev); |
438 | drm_mode_config_cleanup(ddev); | 467 | drm_mode_config_cleanup(ddev); |
439 | 468 | ||
440 | drm_dev_unref(ddev); | 469 | drm_dev_put(ddev); |
441 | 470 | ||
442 | return 0; | 471 | return 0; |
443 | } | 472 | } |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c index 4ebd61ecbee1..fe6f65c94eef 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c | |||
@@ -582,7 +582,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu) | |||
582 | * Initialize vertical blanking interrupts handling. Start with vblank | 582 | * Initialize vertical blanking interrupts handling. Start with vblank |
583 | * disabled for all CRTCs. | 583 | * disabled for all CRTCs. |
584 | */ | 584 | */ |
585 | ret = drm_vblank_init(dev, (1 << rcdu->num_crtcs) - 1); | 585 | ret = drm_vblank_init(dev, rcdu->num_crtcs); |
586 | if (ret < 0) | 586 | if (ret < 0) |
587 | return ret; | 587 | return ret; |
588 | 588 | ||
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c index 9e07758a755c..39d5ae3fdf72 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c | |||
@@ -783,13 +783,14 @@ int rcar_du_planes_init(struct rcar_du_group *rgrp) | |||
783 | drm_plane_helper_add(&plane->plane, | 783 | drm_plane_helper_add(&plane->plane, |
784 | &rcar_du_plane_helper_funcs); | 784 | &rcar_du_plane_helper_funcs); |
785 | 785 | ||
786 | drm_plane_create_alpha_property(&plane->plane); | ||
787 | |||
786 | if (type == DRM_PLANE_TYPE_PRIMARY) | 788 | if (type == DRM_PLANE_TYPE_PRIMARY) |
787 | continue; | 789 | continue; |
788 | 790 | ||
789 | drm_object_attach_property(&plane->plane.base, | 791 | drm_object_attach_property(&plane->plane.base, |
790 | rcdu->props.colorkey, | 792 | rcdu->props.colorkey, |
791 | RCAR_DU_COLORKEY_NONE); | 793 | RCAR_DU_COLORKEY_NONE); |
792 | drm_plane_create_alpha_property(&plane->plane); | ||
793 | drm_plane_create_zpos_property(&plane->plane, 1, 1, 7); | 794 | drm_plane_create_zpos_property(&plane->plane, 1, 1, 7); |
794 | } | 795 | } |
795 | 796 | ||
diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c b/drivers/gpu/drm/rcar-du/rcar_lvds.c index 173d7ad0b991..534a128a869d 100644 --- a/drivers/gpu/drm/rcar-du/rcar_lvds.c +++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c | |||
@@ -790,6 +790,7 @@ static const struct of_device_id rcar_lvds_of_table[] = { | |||
790 | { .compatible = "renesas,r8a7793-lvds", .data = &rcar_lvds_gen2_info }, | 790 | { .compatible = "renesas,r8a7793-lvds", .data = &rcar_lvds_gen2_info }, |
791 | { .compatible = "renesas,r8a7795-lvds", .data = &rcar_lvds_gen3_info }, | 791 | { .compatible = "renesas,r8a7795-lvds", .data = &rcar_lvds_gen3_info }, |
792 | { .compatible = "renesas,r8a7796-lvds", .data = &rcar_lvds_gen3_info }, | 792 | { .compatible = "renesas,r8a7796-lvds", .data = &rcar_lvds_gen3_info }, |
793 | { .compatible = "renesas,r8a77965-lvds", .data = &rcar_lvds_gen3_info }, | ||
793 | { .compatible = "renesas,r8a77970-lvds", .data = &rcar_lvds_r8a77970_info }, | 794 | { .compatible = "renesas,r8a77970-lvds", .data = &rcar_lvds_r8a77970_info }, |
794 | { .compatible = "renesas,r8a77980-lvds", .data = &rcar_lvds_gen3_info }, | 795 | { .compatible = "renesas,r8a77980-lvds", .data = &rcar_lvds_gen3_info }, |
795 | { .compatible = "renesas,r8a77990-lvds", .data = &rcar_lvds_r8a77990_info }, | 796 | { .compatible = "renesas,r8a77990-lvds", .data = &rcar_lvds_r8a77990_info }, |
diff --git a/drivers/gpu/drm/shmobile/shmob_drm_drv.c b/drivers/gpu/drm/shmobile/shmob_drm_drv.c index 6ececad6f845..8554102a6ead 100644 --- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c +++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c | |||
@@ -194,7 +194,7 @@ static int shmob_drm_remove(struct platform_device *pdev) | |||
194 | drm_kms_helper_poll_fini(ddev); | 194 | drm_kms_helper_poll_fini(ddev); |
195 | drm_mode_config_cleanup(ddev); | 195 | drm_mode_config_cleanup(ddev); |
196 | drm_irq_uninstall(ddev); | 196 | drm_irq_uninstall(ddev); |
197 | drm_dev_unref(ddev); | 197 | drm_dev_put(ddev); |
198 | 198 | ||
199 | return 0; | 199 | return 0; |
200 | } | 200 | } |
@@ -290,7 +290,7 @@ err_modeset_cleanup: | |||
290 | drm_kms_helper_poll_fini(ddev); | 290 | drm_kms_helper_poll_fini(ddev); |
291 | drm_mode_config_cleanup(ddev); | 291 | drm_mode_config_cleanup(ddev); |
292 | err_free_drm_dev: | 292 | err_free_drm_dev: |
293 | drm_dev_unref(ddev); | 293 | drm_dev_put(ddev); |
294 | 294 | ||
295 | return ret; | 295 | return ret; |
296 | } | 296 | } |