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authorJani Nikula <jani.nikula@intel.com>2016-09-19 06:35:25 -0400
committerJani Nikula <jani.nikula@intel.com>2016-10-10 09:04:59 -0400
commit16e1203db8ab740c912ea62761fdf27d7811b886 (patch)
treeb2a6ff1ef385ffc0115681adb2d55f98a8d8d393 /drivers/gpu
parentb89857852656f016328d2d7ccec5fff57445fa85 (diff)
drm/i915/backlight: setup and cache pwm alternate increment value
This will also be needed later on when setting up the alternate increment in backlight enable. Cc: Shawn Lee <shawn.c.lee@intel.com> Cc: <stable@vger.kernel.org> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/9984b20bc59aee90b83caf59ce91f3fb122c9627.1474281249.git.jani.nikula@intel.com (cherry picked from commit 32b421e79e6b546da1d469f1229403ac9142d695) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h1
-rw-r--r--drivers/gpu/drm/i915/intel_panel.c14
2 files changed, 12 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8fd16adf069b..c3e65e515c9d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -263,6 +263,7 @@ struct intel_panel {
263 bool enabled; 263 bool enabled;
264 bool combination_mode; /* gen 2/4 only */ 264 bool combination_mode; /* gen 2/4 only */
265 bool active_low_pwm; 265 bool active_low_pwm;
266 bool alternate_pwm_increment; /* lpt+ */
266 267
267 /* PWM chip */ 268 /* PWM chip */
268 bool util_pin_active_low; /* bxt+ */ 269 bool util_pin_active_low; /* bxt+ */
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index c10e9b0405e8..8bc43205d6a0 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1242,10 +1242,10 @@ static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1242 */ 1242 */
1243static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1243static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1244{ 1244{
1245 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1245 struct intel_panel *panel = &connector->panel;
1246 u32 mul; 1246 u32 mul;
1247 1247
1248 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY) 1248 if (panel->backlight.alternate_pwm_increment)
1249 mul = 128; 1249 mul = 128;
1250 else 1250 else
1251 mul = 16; 1251 mul = 16;
@@ -1261,9 +1261,10 @@ static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1261static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1261static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1262{ 1262{
1263 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1263 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1264 struct intel_panel *panel = &connector->panel;
1264 u32 mul, clock; 1265 u32 mul, clock;
1265 1266
1266 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY) 1267 if (panel->backlight.alternate_pwm_increment)
1267 mul = 16; 1268 mul = 16;
1268 else 1269 else
1269 mul = 128; 1270 mul = 128;
@@ -1414,6 +1415,13 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
1414 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1415 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1415 struct intel_panel *panel = &connector->panel; 1416 struct intel_panel *panel = &connector->panel;
1416 u32 pch_ctl1, pch_ctl2, val; 1417 u32 pch_ctl1, pch_ctl2, val;
1418 bool alt;
1419
1420 if (HAS_PCH_LPT(dev_priv))
1421 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1422 else
1423 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1424 panel->backlight.alternate_pwm_increment = alt;
1417 1425
1418 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1426 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1419 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1427 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;