aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu
diff options
context:
space:
mode:
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-04-12 09:49:39 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-04-18 01:11:49 -0400
commit0ee72d8f9b8e17b8e4ccfebc7a25cbc2d395cd6a (patch)
tree473e7fd6696b37fbc4fa3f2136e06aab5eb014fa /drivers/gpu
parent69fbc505c87bf90703d36860f5c911d3e93b17df (diff)
Revert "drm/i915/execlists: Reset RING registers upon resume"
This reverts commit f2a0409a08502d64fbe3990354dff5902b08d2fb which is commit bafb2f7d4755bf1571bd5e9a03b97f3fc4fe69ae upstream. It was reported to have problems. Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Eric Blau <eblau1@gmail.com> Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c50
1 files changed, 19 insertions, 31 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4147e51cf893..67db1577ee49 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2152,42 +2152,30 @@ error_deref_obj:
2152 2152
2153void intel_lr_context_resume(struct drm_i915_private *dev_priv) 2153void intel_lr_context_resume(struct drm_i915_private *dev_priv)
2154{ 2154{
2155 struct i915_gem_context *ctx = dev_priv->kernel_context;
2155 struct intel_engine_cs *engine; 2156 struct intel_engine_cs *engine;
2156 struct i915_gem_context *ctx;
2157
2158 /* Because we emit WA_TAIL_DWORDS there may be a disparity
2159 * between our bookkeeping in ce->ring->head and ce->ring->tail and
2160 * that stored in context. As we only write new commands from
2161 * ce->ring->tail onwards, everything before that is junk. If the GPU
2162 * starts reading from its RING_HEAD from the context, it may try to
2163 * execute that junk and die.
2164 *
2165 * So to avoid that we reset the context images upon resume. For
2166 * simplicity, we just zero everything out.
2167 */
2168 list_for_each_entry(ctx, &dev_priv->context_list, link) {
2169 for_each_engine(engine, dev_priv) {
2170 struct intel_context *ce = &ctx->engine[engine->id];
2171 u32 *reg;
2172 2157
2173 if (!ce->state) 2158 for_each_engine(engine, dev_priv) {
2174 continue; 2159 struct intel_context *ce = &ctx->engine[engine->id];
2160 void *vaddr;
2161 uint32_t *reg_state;
2175 2162
2176 reg = i915_gem_object_pin_map(ce->state->obj, 2163 if (!ce->state)
2177 I915_MAP_WB); 2164 continue;
2178 if (WARN_ON(IS_ERR(reg)))
2179 continue;
2180 2165
2181 reg += LRC_STATE_PN * PAGE_SIZE / sizeof(*reg); 2166 vaddr = i915_gem_object_pin_map(ce->state->obj, I915_MAP_WB);
2182 reg[CTX_RING_HEAD+1] = 0; 2167 if (WARN_ON(IS_ERR(vaddr)))
2183 reg[CTX_RING_TAIL+1] = 0; 2168 continue;
2184 2169
2185 ce->state->obj->dirty = true; 2170 reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE;
2186 i915_gem_object_unpin_map(ce->state->obj);
2187 2171
2188 ce->ring->head = ce->ring->tail = 0; 2172 reg_state[CTX_RING_HEAD+1] = 0;
2189 ce->ring->last_retired_head = -1; 2173 reg_state[CTX_RING_TAIL+1] = 0;
2190 intel_ring_update_space(ce->ring); 2174
2191 } 2175 ce->state->obj->dirty = true;
2176 i915_gem_object_unpin_map(ce->state->obj);
2177
2178 ce->ring->head = 0;
2179 ce->ring->tail = 0;
2192 } 2180 }
2193} 2181}