diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2016-07-29 04:30:04 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-08-08 11:33:02 -0400 |
commit | 08bd8b9f6f11e5b4f13580805ef3a38848e7fed7 (patch) | |
tree | c0abecab1b7b8fdbb8e8d63ac7a2f56e57a4099f /drivers/gpu | |
parent | 4fea83ff0f61676389b17803365c1e8d2b652183 (diff) |
drm/amd/powerplay: delete useless code in hwmgr.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 36 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 108 |
2 files changed, 7 insertions, 137 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c index 384b425407fb..ba8f57a415c7 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | |||
@@ -206,29 +206,7 @@ int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index, | |||
206 | return 0; | 206 | return 0; |
207 | } | 207 | } |
208 | 208 | ||
209 | int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr, | ||
210 | uint32_t index, uint32_t value, uint32_t mask) | ||
211 | { | ||
212 | uint32_t i; | ||
213 | uint32_t cur_value; | ||
214 | |||
215 | if (hwmgr == NULL || hwmgr->device == NULL) { | ||
216 | printk(KERN_ERR "[ powerplay ] Invalid Hardware Manager!"); | ||
217 | return -EINVAL; | ||
218 | } | ||
219 | |||
220 | for (i = 0; i < hwmgr->usec_timeout; i++) { | ||
221 | cur_value = cgs_read_register(hwmgr->device, index); | ||
222 | if ((cur_value & mask) != (value & mask)) | ||
223 | break; | ||
224 | udelay(1); | ||
225 | } | ||
226 | 209 | ||
227 | /* timeout means wrong logic*/ | ||
228 | if (i == hwmgr->usec_timeout) | ||
229 | return -1; | ||
230 | return 0; | ||
231 | } | ||
232 | 210 | ||
233 | 211 | ||
234 | /** | 212 | /** |
@@ -251,21 +229,7 @@ void phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr, | |||
251 | phm_wait_on_register(hwmgr, indirect_port + 1, mask, value); | 229 | phm_wait_on_register(hwmgr, indirect_port + 1, mask, value); |
252 | } | 230 | } |
253 | 231 | ||
254 | void phm_wait_for_indirect_register_unequal(struct pp_hwmgr *hwmgr, | ||
255 | uint32_t indirect_port, | ||
256 | uint32_t index, | ||
257 | uint32_t value, | ||
258 | uint32_t mask) | ||
259 | { | ||
260 | if (hwmgr == NULL || hwmgr->device == NULL) { | ||
261 | printk(KERN_ERR "[ powerplay ] Invalid Hardware Manager!"); | ||
262 | return; | ||
263 | } | ||
264 | 232 | ||
265 | cgs_write_register(hwmgr->device, indirect_port, index); | ||
266 | phm_wait_for_register_unequal(hwmgr, indirect_port + 1, | ||
267 | value, mask); | ||
268 | } | ||
269 | 233 | ||
270 | bool phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr) | 234 | bool phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr) |
271 | { | 235 | { |
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index 911081caa269..36b4ec9c9cb1 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | |||
@@ -639,16 +639,7 @@ extern int hw_init_power_state_table(struct pp_hwmgr *hwmgr); | |||
639 | extern int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index, | 639 | extern int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index, |
640 | uint32_t value, uint32_t mask); | 640 | uint32_t value, uint32_t mask); |
641 | 641 | ||
642 | extern int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr, | ||
643 | uint32_t index, uint32_t value, uint32_t mask); | ||
644 | 642 | ||
645 | extern uint32_t phm_read_indirect_register(struct pp_hwmgr *hwmgr, | ||
646 | uint32_t indirect_port, uint32_t index); | ||
647 | |||
648 | extern void phm_write_indirect_register(struct pp_hwmgr *hwmgr, | ||
649 | uint32_t indirect_port, | ||
650 | uint32_t index, | ||
651 | uint32_t value); | ||
652 | 643 | ||
653 | extern void phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr, | 644 | extern void phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr, |
654 | uint32_t indirect_port, | 645 | uint32_t indirect_port, |
@@ -656,12 +647,7 @@ extern void phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr, | |||
656 | uint32_t value, | 647 | uint32_t value, |
657 | uint32_t mask); | 648 | uint32_t mask); |
658 | 649 | ||
659 | extern void phm_wait_for_indirect_register_unequal( | 650 | |
660 | struct pp_hwmgr *hwmgr, | ||
661 | uint32_t indirect_port, | ||
662 | uint32_t index, | ||
663 | uint32_t value, | ||
664 | uint32_t mask); | ||
665 | 651 | ||
666 | extern bool phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr); | 652 | extern bool phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr); |
667 | extern bool phm_cf_want_vce_power_gating(struct pp_hwmgr *hwmgr); | 653 | extern bool phm_cf_want_vce_power_gating(struct pp_hwmgr *hwmgr); |
@@ -699,43 +685,7 @@ extern void phm_apply_dal_min_voltage_request(struct pp_hwmgr *hwmgr); | |||
699 | PHM_FIELD_SHIFT(reg, field)) | 685 | PHM_FIELD_SHIFT(reg, field)) |
700 | 686 | ||
701 | 687 | ||
702 | #define PHM_WAIT_REGISTER_GIVEN_INDEX(hwmgr, index, value, mask) \ | ||
703 | phm_wait_on_register(hwmgr, index, value, mask) | ||
704 | |||
705 | #define PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, index, value, mask) \ | ||
706 | phm_wait_for_register_unequal(hwmgr, index, value, mask) | ||
707 | |||
708 | #define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \ | ||
709 | phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX, index, value, mask) | ||
710 | |||
711 | #define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \ | ||
712 | phm_wait_for_indirect_register_unequal(hwmgr, mm##port##_INDEX, index, value, mask) | ||
713 | 688 | ||
714 | #define PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \ | ||
715 | phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX_0, index, value, mask) | ||
716 | |||
717 | #define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \ | ||
718 | phm_wait_for_indirect_register_unequal(hwmgr, mm##port##_INDEX_0, index, value, mask) | ||
719 | |||
720 | /* Operations on named registers. */ | ||
721 | |||
722 | #define PHM_WAIT_REGISTER(hwmgr, reg, value, mask) \ | ||
723 | PHM_WAIT_REGISTER_GIVEN_INDEX(hwmgr, mm##reg, value, mask) | ||
724 | |||
725 | #define PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, value, mask) \ | ||
726 | PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, mm##reg, value, mask) | ||
727 | |||
728 | #define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \ | ||
729 | PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask) | ||
730 | |||
731 | #define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \ | ||
732 | PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask) | ||
733 | |||
734 | #define PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \ | ||
735 | PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask) | ||
736 | |||
737 | #define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \ | ||
738 | PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask) | ||
739 | 689 | ||
740 | /* Operations on named fields. */ | 690 | /* Operations on named fields. */ |
741 | 691 | ||
@@ -764,60 +714,16 @@ extern void phm_apply_dal_min_voltage_request(struct pp_hwmgr *hwmgr); | |||
764 | PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ | 714 | PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ |
765 | reg, field, fieldval)) | 715 | reg, field, fieldval)) |
766 | 716 | ||
767 | #define PHM_WAIT_FIELD(hwmgr, reg, field, fieldval) \ | 717 | #define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \ |
768 | PHM_WAIT_REGISTER(hwmgr, reg, (fieldval) \ | 718 | phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX, index, value, mask) |
769 | << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) | ||
770 | |||
771 | #define PHM_WAIT_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \ | ||
772 | PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, (fieldval) \ | ||
773 | << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) | ||
774 | 719 | ||
775 | #define PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \ | ||
776 | PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, (fieldval) \ | ||
777 | << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) | ||
778 | 720 | ||
779 | #define PHM_WAIT_FIELD_UNEQUAL(hwmgr, reg, field, fieldval) \ | 721 | #define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \ |
780 | PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, (fieldval) \ | 722 | PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask) |
781 | << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) | ||
782 | |||
783 | #define PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \ | ||
784 | PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, (fieldval) \ | ||
785 | << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) | ||
786 | 723 | ||
787 | #define PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \ | 724 | #define PHM_WAIT_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \ |
788 | PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, (fieldval) \ | 725 | PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, (fieldval) \ |
789 | << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) | 726 | << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) |
790 | 727 | ||
791 | /* Operations on arrays of registers & fields. */ | ||
792 | |||
793 | #define PHM_READ_ARRAY_REGISTER(device, reg, offset) \ | ||
794 | cgs_read_register(device, mm##reg + (offset)) | ||
795 | |||
796 | #define PHM_WRITE_ARRAY_REGISTER(device, reg, offset, value) \ | ||
797 | cgs_write_register(device, mm##reg + (offset), value) | ||
798 | |||
799 | #define PHM_WAIT_ARRAY_REGISTER(hwmgr, reg, offset, value, mask) \ | ||
800 | PHM_WAIT_REGISTER_GIVEN_INDEX(hwmgr, mm##reg + (offset), value, mask) | ||
801 | |||
802 | #define PHM_WAIT_ARRAY_REGISTER_UNEQUAL(hwmgr, reg, offset, value, mask) \ | ||
803 | PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, mm##reg + (offset), value, mask) | ||
804 | |||
805 | #define PHM_READ_ARRAY_FIELD(hwmgr, reg, offset, field) \ | ||
806 | PHM_GET_FIELD(PHM_READ_ARRAY_REGISTER(hwmgr->device, reg, offset), reg, field) | ||
807 | |||
808 | #define PHM_WRITE_ARRAY_FIELD(hwmgr, reg, offset, field, fieldvalue) \ | ||
809 | PHM_WRITE_ARRAY_REGISTER(hwmgr->device, reg, offset, \ | ||
810 | PHM_SET_FIELD(PHM_READ_ARRAY_REGISTER(hwmgr->device, reg, offset), \ | ||
811 | reg, field, fieldvalue)) | ||
812 | |||
813 | #define PHM_WAIT_ARRAY_FIELD(hwmgr, reg, offset, field, fieldvalue) \ | ||
814 | PHM_WAIT_REGISTER_GIVEN_INDEX(hwmgr, mm##reg + (offset), \ | ||
815 | (fieldvalue) << PHM_FIELD_SHIFT(reg, field), \ | ||
816 | PHM_FIELD_MASK(reg, field)) | ||
817 | |||
818 | #define PHM_WAIT_ARRAY_FIELD_UNEQUAL(hwmgr, reg, offset, field, fieldvalue) \ | ||
819 | PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, mm##reg + (offset), \ | ||
820 | (fieldvalue) << PHM_FIELD_SHIFT(reg, field), \ | ||
821 | PHM_FIELD_MASK(reg, field)) | ||
822 | 728 | ||
823 | #endif /* _HWMGR_H_ */ | 729 | #endif /* _HWMGR_H_ */ |