gpu: host1x: Refactor channel allocation code

This is largely a rewrite of the Host1x channel allocation code, bringing
several changes:

- The previous code could deadlock due to an interaction
  between the 'reflock' mutex and CDMA timeout handling.
  This gets rid of the mutex.
- Support for more than 32 channels, required for Tegra186
- General refactoring, including better encapsulation
  of channel ownership handling into channel.c

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

1 files changed, 5 insertions, 2 deletions

diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index f05ebb14fa63..5c1c711a21af 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -198,7 +198,8 @@ static int host1x_probe(struct platform_device *pdev)
                 host->iova_end = geometry->aperture_end;
         }
 
-        err = host1x_channel_list_init(host);
+        err = host1x_channel_list_init(&host->channel_list,
+                                       host->info->nb_channels);
         if (err) {
                 dev_err(&pdev->dev, "failed to initialize channel list\n");
                 goto fail_detach_device;
@@ -207,7 +208,7 @@ static int host1x_probe(struct platform_device *pdev)
         err = clk_prepare_enable(host->clk);
         if (err < 0) {
                 dev_err(&pdev->dev, "failed to enable clock\n");
-                goto fail_detach_device;
+                goto fail_free_channels;
         }
 
         err = reset_control_deassert(host->rst);
@@ -244,6 +245,8 @@ fail_reset_assert:
         reset_control_assert(host->rst);
 fail_unprepare_disable:
         clk_disable_unprepare(host->clk);
+fail_free_channels:
+        host1x_channel_list_free(&host->channel_list);
 fail_detach_device:
         if (host->domain) {
                 put_iova_domain(&host->iova);