diff options
author | Emily Deng <Emily.Deng@amd.com> | 2017-07-20 00:14:45 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-07-25 16:29:43 -0400 |
commit | e72b991281fa5a1987aed70d8a78981d7cd8e703 (patch) | |
tree | af0b1847f6963bdc3103afce58c076afdfc4d0ae /drivers/gpu/drm | |
parent | 16a53a02fadec3a557abbfaf699404d14d2dfd7e (diff) |
drm/amdgpu/gmc8: SRIOV need to program fb location
SRIOV won't do vbios post in guest OS, and the mmMC_VM_FB_LOCATION
is pf and vf copy, so still need to program fb location for SRIOV.
v2: No need to stop mc, and update gmc_v8_0_vram_gtt_location as well.
v3: New line after the stack variables
BUG: SWDEV-126629
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index 2b39606f1d3c..c9dfe15efed6 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | |||
@@ -396,7 +396,10 @@ static int gmc_v8_0_polaris_mc_load_microcode(struct amdgpu_device *adev) | |||
396 | static void gmc_v8_0_vram_gtt_location(struct amdgpu_device *adev, | 396 | static void gmc_v8_0_vram_gtt_location(struct amdgpu_device *adev, |
397 | struct amdgpu_mc *mc) | 397 | struct amdgpu_mc *mc) |
398 | { | 398 | { |
399 | u64 base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF; | 399 | u64 base = 0; |
400 | |||
401 | if (!amdgpu_sriov_vf(adev)) | ||
402 | base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF; | ||
400 | base <<= 24; | 403 | base <<= 24; |
401 | 404 | ||
402 | if (mc->mc_vram_size > 0xFFC0000000ULL) { | 405 | if (mc->mc_vram_size > 0xFFC0000000ULL) { |
@@ -442,6 +445,17 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) | |||
442 | adev->mc.vram_end >> 12); | 445 | adev->mc.vram_end >> 12); |
443 | WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, | 446 | WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, |
444 | adev->vram_scratch.gpu_addr >> 12); | 447 | adev->vram_scratch.gpu_addr >> 12); |
448 | |||
449 | if (amdgpu_sriov_vf(adev)) { | ||
450 | tmp = ((adev->mc.vram_end >> 24) & 0xFFFF) << 16; | ||
451 | tmp |= ((adev->mc.vram_start >> 24) & 0xFFFF); | ||
452 | WREG32(mmMC_VM_FB_LOCATION, tmp); | ||
453 | /* XXX double check these! */ | ||
454 | WREG32(mmHDP_NONSURFACE_BASE, (adev->mc.vram_start >> 8)); | ||
455 | WREG32(mmHDP_NONSURFACE_INFO, (2 << 7) | (1 << 30)); | ||
456 | WREG32(mmHDP_NONSURFACE_SIZE, 0x3FFFFFFF); | ||
457 | } | ||
458 | |||
445 | WREG32(mmMC_VM_AGP_BASE, 0); | 459 | WREG32(mmMC_VM_AGP_BASE, 0); |
446 | WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); | 460 | WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); |
447 | WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); | 461 | WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); |