diff options
author | Harry Wentland <harry.wentland@amd.com> | 2017-07-22 20:05:20 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:15:36 -0400 |
commit | d0778ebfd58f5650de17531296ee5ecdde39ba68 (patch) | |
tree | a06a409667c5e31d8195d485d001a1b89a88cf37 /drivers/gpu/drm | |
parent | e12cfcb1d447cc937d1abc6f4aab8bbe5f88542e (diff) |
drm/amd/display: Roll core_link into dc_link
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
29 files changed, 444 insertions, 484 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h index 2bb2fc2a6566..c558f700df35 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | |||
@@ -563,7 +563,7 @@ struct amdgpu_connector { | |||
563 | /* The 'old' sink - before an HPD. | 563 | /* The 'old' sink - before an HPD. |
564 | * The 'current' sink is in dc_link->sink. */ | 564 | * The 'current' sink is in dc_link->sink. */ |
565 | const struct dc_sink *dc_sink; | 565 | const struct dc_sink *dc_sink; |
566 | const struct dc_link *dc_link; | 566 | struct dc_link *dc_link; |
567 | const struct dc_sink *dc_em_sink; | 567 | const struct dc_sink *dc_em_sink; |
568 | const struct dc_stream *stream; | 568 | const struct dc_stream *stream; |
569 | void *con_priv; | 569 | void *con_priv; |
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c index b247904206ba..4885403f5cec 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c | |||
@@ -1874,7 +1874,7 @@ void amdgpu_dm_connector_init_helper( | |||
1874 | struct amdgpu_display_manager *dm, | 1874 | struct amdgpu_display_manager *dm, |
1875 | struct amdgpu_connector *aconnector, | 1875 | struct amdgpu_connector *aconnector, |
1876 | int connector_type, | 1876 | int connector_type, |
1877 | const struct dc_link *link, | 1877 | struct dc_link *link, |
1878 | int link_index) | 1878 | int link_index) |
1879 | { | 1879 | { |
1880 | struct amdgpu_device *adev = dm->ddev->dev_private; | 1880 | struct amdgpu_device *adev = dm->ddev->dev_private; |
@@ -1997,7 +1997,7 @@ int amdgpu_dm_connector_init( | |||
1997 | int res = 0; | 1997 | int res = 0; |
1998 | int connector_type; | 1998 | int connector_type; |
1999 | struct dc *dc = dm->dc; | 1999 | struct dc *dc = dm->dc; |
2000 | const struct dc_link *link = dc_get_link_at_index(dc, link_index); | 2000 | struct dc_link *link = dc_get_link_at_index(dc, link_index); |
2001 | struct amdgpu_i2c_adapter *i2c; | 2001 | struct amdgpu_i2c_adapter *i2c; |
2002 | ((struct dc_link *)link)->priv = aconnector; | 2002 | ((struct dc_link *)link)->priv = aconnector; |
2003 | 2003 | ||
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h index 115d9081d964..c565787cd782 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h | |||
@@ -114,7 +114,7 @@ void amdgpu_dm_connector_init_helper( | |||
114 | struct amdgpu_display_manager *dm, | 114 | struct amdgpu_display_manager *dm, |
115 | struct amdgpu_connector *aconnector, | 115 | struct amdgpu_connector *aconnector, |
116 | int connector_type, | 116 | int connector_type, |
117 | const struct dc_link *link, | 117 | struct dc_link *link, |
118 | int link_index); | 118 | int link_index); |
119 | 119 | ||
120 | int amdgpu_dm_connector_mode_valid( | 120 | int amdgpu_dm_connector_mode_valid( |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 569310ab116d..73740e2a5819 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c | |||
@@ -94,7 +94,7 @@ static bool create_links( | |||
94 | 94 | ||
95 | for (i = 0; i < connectors_num; i++) { | 95 | for (i = 0; i < connectors_num; i++) { |
96 | struct link_init_data link_init_params = {0}; | 96 | struct link_init_data link_init_params = {0}; |
97 | struct core_link *link; | 97 | struct dc_link *link; |
98 | 98 | ||
99 | link_init_params.ctx = dc->ctx; | 99 | link_init_params.ctx = dc->ctx; |
100 | /* next BIOS object table connector */ | 100 | /* next BIOS object table connector */ |
@@ -111,7 +111,7 @@ static bool create_links( | |||
111 | } | 111 | } |
112 | 112 | ||
113 | for (i = 0; i < num_virtual_links; i++) { | 113 | for (i = 0; i < num_virtual_links; i++) { |
114 | struct core_link *link = dm_alloc(sizeof(*link)); | 114 | struct dc_link *link = dm_alloc(sizeof(*link)); |
115 | struct encoder_init_data enc_init = {0}; | 115 | struct encoder_init_data enc_init = {0}; |
116 | 116 | ||
117 | if (link == NULL) { | 117 | if (link == NULL) { |
@@ -121,7 +121,7 @@ static bool create_links( | |||
121 | 121 | ||
122 | link->ctx = dc->ctx; | 122 | link->ctx = dc->ctx; |
123 | link->dc = dc; | 123 | link->dc = dc; |
124 | link->public.connector_signal = SIGNAL_TYPE_VIRTUAL; | 124 | link->connector_signal = SIGNAL_TYPE_VIRTUAL; |
125 | link->link_id.type = OBJECT_TYPE_CONNECTOR; | 125 | link->link_id.type = OBJECT_TYPE_CONNECTOR; |
126 | link->link_id.id = CONNECTOR_ID_VIRTUAL; | 126 | link->link_id.id = CONNECTOR_ID_VIRTUAL; |
127 | link->link_id.enum_id = ENUM_ID_1; | 127 | link->link_id.enum_id = ENUM_ID_1; |
@@ -137,7 +137,7 @@ static bool create_links( | |||
137 | enc_init.encoder.enum_id = ENUM_ID_1; | 137 | enc_init.encoder.enum_id = ENUM_ID_1; |
138 | virtual_link_encoder_construct(link->link_enc, &enc_init); | 138 | virtual_link_encoder_construct(link->link_enc, &enc_init); |
139 | 139 | ||
140 | link->public.link_index = dc->link_count; | 140 | link->link_index = dc->link_count; |
141 | dc->links[dc->link_count] = link; | 141 | dc->links[dc->link_count] = link; |
142 | dc->link_count++; | 142 | dc->link_count++; |
143 | } | 143 | } |
@@ -278,14 +278,14 @@ static void set_drive_settings(struct dc *dc, | |||
278 | int i; | 278 | int i; |
279 | 279 | ||
280 | for (i = 0; i < core_dc->link_count; i++) { | 280 | for (i = 0; i < core_dc->link_count; i++) { |
281 | if (&core_dc->links[i]->public == link) | 281 | if (core_dc->links[i] == link) |
282 | break; | 282 | break; |
283 | } | 283 | } |
284 | 284 | ||
285 | if (i >= core_dc->link_count) | 285 | if (i >= core_dc->link_count) |
286 | ASSERT_CRITICAL(false); | 286 | ASSERT_CRITICAL(false); |
287 | 287 | ||
288 | dc_link_dp_set_drive_settings(&core_dc->links[i]->public, lt_settings); | 288 | dc_link_dp_set_drive_settings(core_dc->links[i], lt_settings); |
289 | } | 289 | } |
290 | 290 | ||
291 | static void perform_link_training(struct dc *dc, | 291 | static void perform_link_training(struct dc *dc, |
@@ -297,20 +297,17 @@ static void perform_link_training(struct dc *dc, | |||
297 | 297 | ||
298 | for (i = 0; i < core_dc->link_count; i++) | 298 | for (i = 0; i < core_dc->link_count; i++) |
299 | dc_link_dp_perform_link_training( | 299 | dc_link_dp_perform_link_training( |
300 | &core_dc->links[i]->public, | 300 | core_dc->links[i], |
301 | link_setting, | 301 | link_setting, |
302 | skip_video_pattern); | 302 | skip_video_pattern); |
303 | } | 303 | } |
304 | 304 | ||
305 | static void set_preferred_link_settings(struct dc *dc, | 305 | static void set_preferred_link_settings(struct dc *dc, |
306 | struct dc_link_settings *link_setting, | 306 | struct dc_link_settings *link_setting, |
307 | const struct dc_link *link) | 307 | struct dc_link *link) |
308 | { | 308 | { |
309 | struct core_link *core_link = DC_LINK_TO_CORE(link); | 309 | link->preferred_link_setting = *link_setting; |
310 | 310 | dp_retrain_link_dp_test(link, link_setting, false); | |
311 | core_link->public.preferred_link_setting = | ||
312 | *link_setting; | ||
313 | dp_retrain_link_dp_test(core_link, link_setting, false); | ||
314 | } | 311 | } |
315 | 312 | ||
316 | static void enable_hpd(const struct dc_link *link) | 313 | static void enable_hpd(const struct dc_link *link) |
@@ -325,7 +322,7 @@ static void disable_hpd(const struct dc_link *link) | |||
325 | 322 | ||
326 | 323 | ||
327 | static void set_test_pattern( | 324 | static void set_test_pattern( |
328 | const struct dc_link *link, | 325 | struct dc_link *link, |
329 | enum dp_test_pattern test_pattern, | 326 | enum dp_test_pattern test_pattern, |
330 | const struct link_training_settings *p_link_settings, | 327 | const struct link_training_settings *p_link_settings, |
331 | const unsigned char *p_custom_pattern, | 328 | const unsigned char *p_custom_pattern, |
@@ -345,9 +342,8 @@ void set_dither_option(const struct dc_stream *dc_stream, | |||
345 | { | 342 | { |
346 | struct core_stream *stream = DC_STREAM_TO_CORE(dc_stream); | 343 | struct core_stream *stream = DC_STREAM_TO_CORE(dc_stream); |
347 | struct bit_depth_reduction_params params; | 344 | struct bit_depth_reduction_params params; |
348 | struct core_link *core_link = DC_LINK_TO_CORE(stream->status.link); | 345 | struct dc_link *link = stream->status.link; |
349 | struct pipe_ctx *pipes = | 346 | struct pipe_ctx *pipes = link->dc->current_context->res_ctx.pipe_ctx; |
350 | core_link->dc->current_context->res_ctx.pipe_ctx; | ||
351 | 347 | ||
352 | memset(¶ms, 0, sizeof(params)); | 348 | memset(¶ms, 0, sizeof(params)); |
353 | if (!stream) | 349 | if (!stream) |
@@ -1693,10 +1689,10 @@ struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i) | |||
1693 | return NULL; | 1689 | return NULL; |
1694 | } | 1690 | } |
1695 | 1691 | ||
1696 | const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index) | 1692 | struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index) |
1697 | { | 1693 | { |
1698 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1694 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1699 | return &core_dc->links[link_index]->public; | 1695 | return core_dc->links[link_index]; |
1700 | } | 1696 | } |
1701 | 1697 | ||
1702 | const struct graphics_object_id dc_get_link_id_at_index( | 1698 | const struct graphics_object_id dc_get_link_id_at_index( |
@@ -1710,7 +1706,7 @@ enum dc_irq_source dc_get_hpd_irq_source_at_index( | |||
1710 | struct dc *dc, uint32_t link_index) | 1706 | struct dc *dc, uint32_t link_index) |
1711 | { | 1707 | { |
1712 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1708 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1713 | return core_dc->links[link_index]->public.irq_source_hpd; | 1709 | return core_dc->links[link_index]->irq_source_hpd; |
1714 | } | 1710 | } |
1715 | 1711 | ||
1716 | const struct audio **dc_get_audios(struct dc *dc) | 1712 | const struct audio **dc_get_audios(struct dc *dc) |
@@ -1796,9 +1792,9 @@ bool dc_read_aux_dpcd( | |||
1796 | { | 1792 | { |
1797 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1793 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1798 | 1794 | ||
1799 | struct core_link *link = core_dc->links[link_index]; | 1795 | struct dc_link *link = core_dc->links[link_index]; |
1800 | enum ddc_result r = dal_ddc_service_read_dpcd_data( | 1796 | enum ddc_result r = dal_ddc_service_read_dpcd_data( |
1801 | link->public.ddc, | 1797 | link->ddc, |
1802 | false, | 1798 | false, |
1803 | I2C_MOT_UNDEF, | 1799 | I2C_MOT_UNDEF, |
1804 | address, | 1800 | address, |
@@ -1815,10 +1811,10 @@ bool dc_write_aux_dpcd( | |||
1815 | uint32_t size) | 1811 | uint32_t size) |
1816 | { | 1812 | { |
1817 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1813 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1818 | struct core_link *link = core_dc->links[link_index]; | 1814 | struct dc_link *link = core_dc->links[link_index]; |
1819 | 1815 | ||
1820 | enum ddc_result r = dal_ddc_service_write_dpcd_data( | 1816 | enum ddc_result r = dal_ddc_service_write_dpcd_data( |
1821 | link->public.ddc, | 1817 | link->ddc, |
1822 | false, | 1818 | false, |
1823 | I2C_MOT_UNDEF, | 1819 | I2C_MOT_UNDEF, |
1824 | address, | 1820 | address, |
@@ -1837,9 +1833,9 @@ bool dc_read_aux_i2c( | |||
1837 | { | 1833 | { |
1838 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1834 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1839 | 1835 | ||
1840 | struct core_link *link = core_dc->links[link_index]; | 1836 | struct dc_link *link = core_dc->links[link_index]; |
1841 | enum ddc_result r = dal_ddc_service_read_dpcd_data( | 1837 | enum ddc_result r = dal_ddc_service_read_dpcd_data( |
1842 | link->public.ddc, | 1838 | link->ddc, |
1843 | true, | 1839 | true, |
1844 | mot, | 1840 | mot, |
1845 | address, | 1841 | address, |
@@ -1857,10 +1853,10 @@ bool dc_write_aux_i2c( | |||
1857 | uint32_t size) | 1853 | uint32_t size) |
1858 | { | 1854 | { |
1859 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1855 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1860 | struct core_link *link = core_dc->links[link_index]; | 1856 | struct dc_link *link = core_dc->links[link_index]; |
1861 | 1857 | ||
1862 | enum ddc_result r = dal_ddc_service_write_dpcd_data( | 1858 | enum ddc_result r = dal_ddc_service_write_dpcd_data( |
1863 | link->public.ddc, | 1859 | link->ddc, |
1864 | true, | 1860 | true, |
1865 | mot, | 1861 | mot, |
1866 | address, | 1862 | address, |
@@ -1880,10 +1876,10 @@ bool dc_query_ddc_data( | |||
1880 | 1876 | ||
1881 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1877 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1882 | 1878 | ||
1883 | struct core_link *link = core_dc->links[link_index]; | 1879 | struct dc_link *link = core_dc->links[link_index]; |
1884 | 1880 | ||
1885 | bool result = dal_ddc_service_query_ddc_data( | 1881 | bool result = dal_ddc_service_query_ddc_data( |
1886 | link->public.ddc, | 1882 | link->ddc, |
1887 | address, | 1883 | address, |
1888 | write_buf, | 1884 | write_buf, |
1889 | write_size, | 1885 | write_size, |
@@ -1900,8 +1896,8 @@ bool dc_submit_i2c( | |||
1900 | { | 1896 | { |
1901 | struct core_dc *core_dc = DC_TO_CORE(dc); | 1897 | struct core_dc *core_dc = DC_TO_CORE(dc); |
1902 | 1898 | ||
1903 | struct core_link *link = core_dc->links[link_index]; | 1899 | struct dc_link *link = core_dc->links[link_index]; |
1904 | struct ddc_service *ddc = link->public.ddc; | 1900 | struct ddc_service *ddc = link->ddc; |
1905 | 1901 | ||
1906 | return dal_i2caux_submit_i2c_command( | 1902 | return dal_i2caux_submit_i2c_command( |
1907 | ddc->ctx->i2caux, | 1903 | ddc->ctx->i2caux, |
@@ -1909,10 +1905,8 @@ bool dc_submit_i2c( | |||
1909 | cmd); | 1905 | cmd); |
1910 | } | 1906 | } |
1911 | 1907 | ||
1912 | static bool link_add_remote_sink_helper(struct core_link *core_link, struct dc_sink *sink) | 1908 | static bool link_add_remote_sink_helper(struct dc_link *dc_link, struct dc_sink *sink) |
1913 | { | 1909 | { |
1914 | struct dc_link *dc_link = &core_link->public; | ||
1915 | |||
1916 | if (dc_link->sink_count >= MAX_SINKS_PER_LINK) { | 1910 | if (dc_link->sink_count >= MAX_SINKS_PER_LINK) { |
1917 | BREAK_TO_DEBUGGER(); | 1911 | BREAK_TO_DEBUGGER(); |
1918 | return false; | 1912 | return false; |
@@ -1927,14 +1921,13 @@ static bool link_add_remote_sink_helper(struct core_link *core_link, struct dc_s | |||
1927 | } | 1921 | } |
1928 | 1922 | ||
1929 | struct dc_sink *dc_link_add_remote_sink( | 1923 | struct dc_sink *dc_link_add_remote_sink( |
1930 | const struct dc_link *link, | 1924 | struct dc_link *link, |
1931 | const uint8_t *edid, | 1925 | const uint8_t *edid, |
1932 | int len, | 1926 | int len, |
1933 | struct dc_sink_init_data *init_data) | 1927 | struct dc_sink_init_data *init_data) |
1934 | { | 1928 | { |
1935 | struct dc_sink *dc_sink; | 1929 | struct dc_sink *dc_sink; |
1936 | enum dc_edid_status edid_status; | 1930 | enum dc_edid_status edid_status; |
1937 | struct core_link *core_link = DC_LINK_TO_LINK(link); | ||
1938 | 1931 | ||
1939 | if (len > MAX_EDID_BUFFER_SIZE) { | 1932 | if (len > MAX_EDID_BUFFER_SIZE) { |
1940 | dm_error("Max EDID buffer size breached!\n"); | 1933 | dm_error("Max EDID buffer size breached!\n"); |
@@ -1960,12 +1953,12 @@ struct dc_sink *dc_link_add_remote_sink( | |||
1960 | dc_sink->dc_edid.length = len; | 1953 | dc_sink->dc_edid.length = len; |
1961 | 1954 | ||
1962 | if (!link_add_remote_sink_helper( | 1955 | if (!link_add_remote_sink_helper( |
1963 | core_link, | 1956 | link, |
1964 | dc_sink)) | 1957 | dc_sink)) |
1965 | goto fail_add_sink; | 1958 | goto fail_add_sink; |
1966 | 1959 | ||
1967 | edid_status = dm_helpers_parse_edid_caps( | 1960 | edid_status = dm_helpers_parse_edid_caps( |
1968 | core_link->ctx, | 1961 | link->ctx, |
1969 | &dc_sink->dc_edid, | 1962 | &dc_sink->dc_edid, |
1970 | &dc_sink->edid_caps); | 1963 | &dc_sink->edid_caps); |
1971 | 1964 | ||
@@ -1980,43 +1973,38 @@ fail_add_sink: | |||
1980 | return NULL; | 1973 | return NULL; |
1981 | } | 1974 | } |
1982 | 1975 | ||
1983 | void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink) | 1976 | void dc_link_set_sink(struct dc_link *link, struct dc_sink *sink) |
1984 | { | 1977 | { |
1985 | struct core_link *core_link = DC_LINK_TO_LINK(link); | 1978 | link->local_sink = sink; |
1986 | struct dc_link *dc_link = &core_link->public; | ||
1987 | |||
1988 | dc_link->local_sink = sink; | ||
1989 | 1979 | ||
1990 | if (sink == NULL) { | 1980 | if (sink == NULL) { |
1991 | dc_link->type = dc_connection_none; | 1981 | link->type = dc_connection_none; |
1992 | } else { | 1982 | } else { |
1993 | dc_link->type = dc_connection_single; | 1983 | link->type = dc_connection_single; |
1994 | } | 1984 | } |
1995 | } | 1985 | } |
1996 | 1986 | ||
1997 | void dc_link_remove_remote_sink(const struct dc_link *link, const struct dc_sink *sink) | 1987 | void dc_link_remove_remote_sink(struct dc_link *link, const struct dc_sink *sink) |
1998 | { | 1988 | { |
1999 | int i; | 1989 | int i; |
2000 | struct core_link *core_link = DC_LINK_TO_LINK(link); | ||
2001 | struct dc_link *dc_link = &core_link->public; | ||
2002 | 1990 | ||
2003 | if (!link->sink_count) { | 1991 | if (!link->sink_count) { |
2004 | BREAK_TO_DEBUGGER(); | 1992 | BREAK_TO_DEBUGGER(); |
2005 | return; | 1993 | return; |
2006 | } | 1994 | } |
2007 | 1995 | ||
2008 | for (i = 0; i < dc_link->sink_count; i++) { | 1996 | for (i = 0; i < link->sink_count; i++) { |
2009 | if (dc_link->remote_sinks[i] == sink) { | 1997 | if (link->remote_sinks[i] == sink) { |
2010 | dc_sink_release(sink); | 1998 | dc_sink_release(sink); |
2011 | dc_link->remote_sinks[i] = NULL; | 1999 | link->remote_sinks[i] = NULL; |
2012 | 2000 | ||
2013 | /* shrink array to remove empty place */ | 2001 | /* shrink array to remove empty place */ |
2014 | while (i < dc_link->sink_count - 1) { | 2002 | while (i < link->sink_count - 1) { |
2015 | dc_link->remote_sinks[i] = dc_link->remote_sinks[i+1]; | 2003 | link->remote_sinks[i] = link->remote_sinks[i+1]; |
2016 | i++; | 2004 | i++; |
2017 | } | 2005 | } |
2018 | dc_link->remote_sinks[i] = NULL; | 2006 | link->remote_sinks[i] = NULL; |
2019 | dc_link->sink_count--; | 2007 | link->sink_count--; |
2020 | return; | 2008 | return; |
2021 | } | 2009 | } |
2022 | } | 2010 | } |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 036d22f878b8..428dbff8505b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c | |||
@@ -62,24 +62,24 @@ enum { | |||
62 | /******************************************************************************* | 62 | /******************************************************************************* |
63 | * Private functions | 63 | * Private functions |
64 | ******************************************************************************/ | 64 | ******************************************************************************/ |
65 | static void destruct(struct core_link *link) | 65 | static void destruct(struct dc_link *link) |
66 | { | 66 | { |
67 | int i; | 67 | int i; |
68 | 68 | ||
69 | if (link->public.ddc) | 69 | if (link->ddc) |
70 | dal_ddc_service_destroy(&link->public.ddc); | 70 | dal_ddc_service_destroy(&link->ddc); |
71 | 71 | ||
72 | if(link->link_enc) | 72 | if(link->link_enc) |
73 | link->link_enc->funcs->destroy(&link->link_enc); | 73 | link->link_enc->funcs->destroy(&link->link_enc); |
74 | 74 | ||
75 | if (link->public.local_sink) | 75 | if (link->local_sink) |
76 | dc_sink_release(link->public.local_sink); | 76 | dc_sink_release(link->local_sink); |
77 | 77 | ||
78 | for (i = 0; i < link->public.sink_count; ++i) | 78 | for (i = 0; i < link->sink_count; ++i) |
79 | dc_sink_release(link->public.remote_sinks[i]); | 79 | dc_sink_release(link->remote_sinks[i]); |
80 | } | 80 | } |
81 | 81 | ||
82 | static struct gpio *get_hpd_gpio(const struct core_link *link) | 82 | static struct gpio *get_hpd_gpio(const struct dc_link *link) |
83 | { | 83 | { |
84 | enum bp_result bp_result; | 84 | enum bp_result bp_result; |
85 | struct dc_bios *dcb = link->ctx->dc_bios; | 85 | struct dc_bios *dcb = link->ctx->dc_bios; |
@@ -116,7 +116,7 @@ static struct gpio *get_hpd_gpio(const struct core_link *link) | |||
116 | * true on success, false otherwise | 116 | * true on success, false otherwise |
117 | */ | 117 | */ |
118 | static bool program_hpd_filter( | 118 | static bool program_hpd_filter( |
119 | const struct core_link *link) | 119 | const struct dc_link *link) |
120 | { | 120 | { |
121 | bool result = false; | 121 | bool result = false; |
122 | 122 | ||
@@ -126,7 +126,7 @@ static bool program_hpd_filter( | |||
126 | int delay_on_disconnect_in_ms = 0; | 126 | int delay_on_disconnect_in_ms = 0; |
127 | 127 | ||
128 | /* Verify feature is supported */ | 128 | /* Verify feature is supported */ |
129 | switch (link->public.connector_signal) { | 129 | switch (link->connector_signal) { |
130 | case SIGNAL_TYPE_DVI_SINGLE_LINK: | 130 | case SIGNAL_TYPE_DVI_SINGLE_LINK: |
131 | case SIGNAL_TYPE_DVI_DUAL_LINK: | 131 | case SIGNAL_TYPE_DVI_DUAL_LINK: |
132 | case SIGNAL_TYPE_HDMI_TYPE_A: | 132 | case SIGNAL_TYPE_HDMI_TYPE_A: |
@@ -181,7 +181,7 @@ static bool program_hpd_filter( | |||
181 | return result; | 181 | return result; |
182 | } | 182 | } |
183 | 183 | ||
184 | static bool detect_sink(struct core_link *link, enum dc_connection_type *type) | 184 | static bool detect_sink(struct dc_link *link, enum dc_connection_type *type) |
185 | { | 185 | { |
186 | uint32_t is_hpd_high = 0; | 186 | uint32_t is_hpd_high = 0; |
187 | struct gpio *hpd_pin; | 187 | struct gpio *hpd_pin; |
@@ -306,7 +306,7 @@ static enum signal_type get_basic_signal_type( | |||
306 | * @brief | 306 | * @brief |
307 | * Check whether there is a dongle on DP connector | 307 | * Check whether there is a dongle on DP connector |
308 | */ | 308 | */ |
309 | static bool is_dp_sink_present(struct core_link *link) | 309 | static bool is_dp_sink_present(struct dc_link *link) |
310 | { | 310 | { |
311 | enum gpio_result gpio_result; | 311 | enum gpio_result gpio_result; |
312 | uint32_t clock_pin = 0; | 312 | uint32_t clock_pin = 0; |
@@ -320,7 +320,7 @@ static bool is_dp_sink_present(struct core_link *link) | |||
320 | ((connector_id == CONNECTOR_ID_DISPLAY_PORT) || | 320 | ((connector_id == CONNECTOR_ID_DISPLAY_PORT) || |
321 | (connector_id == CONNECTOR_ID_EDP)); | 321 | (connector_id == CONNECTOR_ID_EDP)); |
322 | 322 | ||
323 | ddc = dal_ddc_service_get_ddc_pin(link->public.ddc); | 323 | ddc = dal_ddc_service_get_ddc_pin(link->ddc); |
324 | 324 | ||
325 | if (!ddc) { | 325 | if (!ddc) { |
326 | BREAK_TO_DEBUGGER(); | 326 | BREAK_TO_DEBUGGER(); |
@@ -356,7 +356,7 @@ static bool is_dp_sink_present(struct core_link *link) | |||
356 | * @brief | 356 | * @brief |
357 | * Detect output sink type | 357 | * Detect output sink type |
358 | */ | 358 | */ |
359 | static enum signal_type link_detect_sink(struct core_link *link) | 359 | static enum signal_type link_detect_sink(struct dc_link *link) |
360 | { | 360 | { |
361 | enum signal_type result = get_basic_signal_type( | 361 | enum signal_type result = get_basic_signal_type( |
362 | link->link_enc->id, link->link_id); | 362 | link->link_enc->id, link->link_id); |
@@ -446,18 +446,18 @@ static enum signal_type dp_passive_dongle_detection( | |||
446 | audio_support); | 446 | audio_support); |
447 | } | 447 | } |
448 | 448 | ||
449 | static void link_disconnect_sink(struct core_link *link) | 449 | static void link_disconnect_sink(struct dc_link *link) |
450 | { | 450 | { |
451 | if (link->public.local_sink) { | 451 | if (link->local_sink) { |
452 | dc_sink_release(link->public.local_sink); | 452 | dc_sink_release(link->local_sink); |
453 | link->public.local_sink = NULL; | 453 | link->local_sink = NULL; |
454 | } | 454 | } |
455 | 455 | ||
456 | link->dpcd_sink_count = 0; | 456 | link->dpcd_sink_count = 0; |
457 | } | 457 | } |
458 | 458 | ||
459 | static void detect_dp( | 459 | static void detect_dp( |
460 | struct core_link *link, | 460 | struct dc_link *link, |
461 | struct display_sink_capability *sink_caps, | 461 | struct display_sink_capability *sink_caps, |
462 | bool *converter_disable_audio, | 462 | bool *converter_disable_audio, |
463 | struct audio_support *audio_support, | 463 | struct audio_support *audio_support, |
@@ -473,7 +473,7 @@ static void detect_dp( | |||
473 | 473 | ||
474 | /* DP active dongles */ | 474 | /* DP active dongles */ |
475 | if (is_dp_active_dongle(link)) { | 475 | if (is_dp_active_dongle(link)) { |
476 | link->public.type = dc_connection_active_dongle; | 476 | link->type = dc_connection_active_dongle; |
477 | if (!link->dpcd_caps.sink_count.bits.SINK_COUNT) { | 477 | if (!link->dpcd_caps.sink_count.bits.SINK_COUNT) { |
478 | /* | 478 | /* |
479 | * active dongle unplug processing for short irq | 479 | * active dongle unplug processing for short irq |
@@ -517,8 +517,8 @@ static void detect_dp( | |||
517 | 517 | ||
518 | if (dm_helpers_dp_mst_start_top_mgr( | 518 | if (dm_helpers_dp_mst_start_top_mgr( |
519 | link->ctx, | 519 | link->ctx, |
520 | &link->public, boot)) { | 520 | link, boot)) { |
521 | link->public.type = dc_connection_mst_branch; | 521 | link->type = dc_connection_mst_branch; |
522 | } else { | 522 | } else { |
523 | /* MST not supported */ | 523 | /* MST not supported */ |
524 | sink_caps->signal = SIGNAL_TYPE_DISPLAY_PORT; | 524 | sink_caps->signal = SIGNAL_TYPE_DISPLAY_PORT; |
@@ -526,15 +526,14 @@ static void detect_dp( | |||
526 | } | 526 | } |
527 | } else { | 527 | } else { |
528 | /* DP passive dongles */ | 528 | /* DP passive dongles */ |
529 | sink_caps->signal = dp_passive_dongle_detection(link->public.ddc, | 529 | sink_caps->signal = dp_passive_dongle_detection(link->ddc, |
530 | sink_caps, | 530 | sink_caps, |
531 | audio_support); | 531 | audio_support); |
532 | } | 532 | } |
533 | } | 533 | } |
534 | 534 | ||
535 | bool dc_link_detect(const struct dc_link *dc_link, bool boot) | 535 | bool dc_link_detect(struct dc_link *link, bool boot) |
536 | { | 536 | { |
537 | struct core_link *link = DC_LINK_TO_LINK(dc_link); | ||
538 | struct dc_sink_init_data sink_init_data = { 0 }; | 537 | struct dc_sink_init_data sink_init_data = { 0 }; |
539 | struct display_sink_capability sink_caps = { 0 }; | 538 | struct display_sink_capability sink_caps = { 0 }; |
540 | uint8_t i; | 539 | uint8_t i; |
@@ -546,7 +545,7 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
546 | struct core_sink *sink = NULL; | 545 | struct core_sink *sink = NULL; |
547 | enum dc_connection_type new_connection_type = dc_connection_none; | 546 | enum dc_connection_type new_connection_type = dc_connection_none; |
548 | 547 | ||
549 | if (link->public.connector_signal == SIGNAL_TYPE_VIRTUAL) | 548 | if (link->connector_signal == SIGNAL_TYPE_VIRTUAL) |
550 | return false; | 549 | return false; |
551 | 550 | ||
552 | if (false == detect_sink(link, &new_connection_type)) { | 551 | if (false == detect_sink(link, &new_connection_type)) { |
@@ -554,17 +553,17 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
554 | return false; | 553 | return false; |
555 | } | 554 | } |
556 | 555 | ||
557 | if (link->public.connector_signal == SIGNAL_TYPE_EDP && | 556 | if (link->connector_signal == SIGNAL_TYPE_EDP && |
558 | link->public.local_sink) | 557 | link->local_sink) |
559 | return true; | 558 | return true; |
560 | 559 | ||
561 | link_disconnect_sink(link); | 560 | link_disconnect_sink(link); |
562 | 561 | ||
563 | if (new_connection_type != dc_connection_none) { | 562 | if (new_connection_type != dc_connection_none) { |
564 | link->public.type = new_connection_type; | 563 | link->type = new_connection_type; |
565 | 564 | ||
566 | /* From Disconnected-to-Connected. */ | 565 | /* From Disconnected-to-Connected. */ |
567 | switch (link->public.connector_signal) { | 566 | switch (link->connector_signal) { |
568 | case SIGNAL_TYPE_HDMI_TYPE_A: { | 567 | case SIGNAL_TYPE_HDMI_TYPE_A: { |
569 | sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C; | 568 | sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C; |
570 | if (aud_support->hdmi_audio_native) | 569 | if (aud_support->hdmi_audio_native) |
@@ -602,14 +601,14 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
602 | aud_support, boot); | 601 | aud_support, boot); |
603 | 602 | ||
604 | /* Active dongle downstream unplug */ | 603 | /* Active dongle downstream unplug */ |
605 | if (link->public.type == dc_connection_active_dongle | 604 | if (link->type == dc_connection_active_dongle |
606 | && link->dpcd_caps.sink_count. | 605 | && link->dpcd_caps.sink_count. |
607 | bits.SINK_COUNT == 0) | 606 | bits.SINK_COUNT == 0) |
608 | return true; | 607 | return true; |
609 | 608 | ||
610 | if (link->public.type == dc_connection_mst_branch) { | 609 | if (link->type == dc_connection_mst_branch) { |
611 | LINK_INFO("link=%d, mst branch is now Connected\n", | 610 | LINK_INFO("link=%d, mst branch is now Connected\n", |
612 | link->public.link_index); | 611 | link->link_index); |
613 | return false; | 612 | return false; |
614 | } | 613 | } |
615 | 614 | ||
@@ -618,7 +617,7 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
618 | 617 | ||
619 | default: | 618 | default: |
620 | DC_ERROR("Invalid connector type! signal:%d\n", | 619 | DC_ERROR("Invalid connector type! signal:%d\n", |
621 | link->public.connector_signal); | 620 | link->connector_signal); |
622 | return false; | 621 | return false; |
623 | } /* switch() */ | 622 | } /* switch() */ |
624 | 623 | ||
@@ -629,13 +628,13 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
629 | link->dpcd_sink_count = 1; | 628 | link->dpcd_sink_count = 1; |
630 | 629 | ||
631 | dal_ddc_service_set_transaction_type( | 630 | dal_ddc_service_set_transaction_type( |
632 | link->public.ddc, | 631 | link->ddc, |
633 | sink_caps.transaction_type); | 632 | sink_caps.transaction_type); |
634 | 633 | ||
635 | link->public.aux_mode = dal_ddc_service_is_in_aux_transaction_mode( | 634 | link->aux_mode = dal_ddc_service_is_in_aux_transaction_mode( |
636 | link->public.ddc); | 635 | link->ddc); |
637 | 636 | ||
638 | sink_init_data.link = &link->public; | 637 | sink_init_data.link = link; |
639 | sink_init_data.sink_signal = sink_caps.signal; | 638 | sink_init_data.sink_signal = sink_caps.signal; |
640 | 639 | ||
641 | dc_sink = dc_sink_create(&sink_init_data); | 640 | dc_sink = dc_sink_create(&sink_init_data); |
@@ -648,11 +647,11 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
648 | dc_sink->converter_disable_audio = converter_disable_audio; | 647 | dc_sink->converter_disable_audio = converter_disable_audio; |
649 | 648 | ||
650 | sink = DC_SINK_TO_CORE(dc_sink); | 649 | sink = DC_SINK_TO_CORE(dc_sink); |
651 | link->public.local_sink = &sink->public; | 650 | link->local_sink = &sink->public; |
652 | 651 | ||
653 | edid_status = dm_helpers_read_local_edid( | 652 | edid_status = dm_helpers_read_local_edid( |
654 | link->ctx, | 653 | link->ctx, |
655 | &link->public, | 654 | link, |
656 | &sink->public); | 655 | &sink->public); |
657 | 656 | ||
658 | switch (edid_status) { | 657 | switch (edid_status) { |
@@ -719,21 +718,21 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
719 | 718 | ||
720 | } else { | 719 | } else { |
721 | /* From Connected-to-Disconnected. */ | 720 | /* From Connected-to-Disconnected. */ |
722 | if (link->public.type == dc_connection_mst_branch) { | 721 | if (link->type == dc_connection_mst_branch) { |
723 | LINK_INFO("link=%d, mst branch is now Disconnected\n", | 722 | LINK_INFO("link=%d, mst branch is now Disconnected\n", |
724 | link->public.link_index); | 723 | link->link_index); |
725 | dm_helpers_dp_mst_stop_top_mgr(link->ctx, &link->public); | 724 | dm_helpers_dp_mst_stop_top_mgr(link->ctx, link); |
726 | 725 | ||
727 | link->mst_stream_alloc_table.stream_count = 0; | 726 | link->mst_stream_alloc_table.stream_count = 0; |
728 | memset(link->mst_stream_alloc_table.stream_allocations, 0, sizeof(link->mst_stream_alloc_table.stream_allocations)); | 727 | memset(link->mst_stream_alloc_table.stream_allocations, 0, sizeof(link->mst_stream_alloc_table.stream_allocations)); |
729 | } | 728 | } |
730 | 729 | ||
731 | link->public.type = dc_connection_none; | 730 | link->type = dc_connection_none; |
732 | sink_caps.signal = SIGNAL_TYPE_NONE; | 731 | sink_caps.signal = SIGNAL_TYPE_NONE; |
733 | } | 732 | } |
734 | 733 | ||
735 | LINK_INFO("link=%d, dc_sink_in=%p is now %s\n", | 734 | LINK_INFO("link=%d, dc_sink_in=%p is now %s\n", |
736 | link->public.link_index, &sink->public, | 735 | link->link_index, &sink->public, |
737 | (sink_caps.signal == SIGNAL_TYPE_NONE ? | 736 | (sink_caps.signal == SIGNAL_TYPE_NONE ? |
738 | "Disconnected":"Connected")); | 737 | "Disconnected":"Connected")); |
739 | 738 | ||
@@ -741,7 +740,7 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot) | |||
741 | } | 740 | } |
742 | 741 | ||
743 | static enum hpd_source_id get_hpd_line( | 742 | static enum hpd_source_id get_hpd_line( |
744 | struct core_link *link) | 743 | struct dc_link *link) |
745 | { | 744 | { |
746 | struct gpio *hpd; | 745 | struct gpio *hpd; |
747 | enum hpd_source_id hpd_id = HPD_SOURCEID_UNKNOWN; | 746 | enum hpd_source_id hpd_id = HPD_SOURCEID_UNKNOWN; |
@@ -779,12 +778,12 @@ static enum hpd_source_id get_hpd_line( | |||
779 | return hpd_id; | 778 | return hpd_id; |
780 | } | 779 | } |
781 | 780 | ||
782 | static enum channel_id get_ddc_line(struct core_link *link) | 781 | static enum channel_id get_ddc_line(struct dc_link *link) |
783 | { | 782 | { |
784 | struct ddc *ddc; | 783 | struct ddc *ddc; |
785 | enum channel_id channel = CHANNEL_ID_UNKNOWN; | 784 | enum channel_id channel = CHANNEL_ID_UNKNOWN; |
786 | 785 | ||
787 | ddc = dal_ddc_service_get_ddc_pin(link->public.ddc); | 786 | ddc = dal_ddc_service_get_ddc_pin(link->ddc); |
788 | 787 | ||
789 | if (ddc) { | 788 | if (ddc) { |
790 | switch (dal_ddc_get_line(ddc)) { | 789 | switch (dal_ddc_get_line(ddc)) { |
@@ -887,7 +886,7 @@ static enum transmitter translate_encoder_to_transmitter( | |||
887 | } | 886 | } |
888 | 887 | ||
889 | static bool construct( | 888 | static bool construct( |
890 | struct core_link *link, | 889 | struct dc_link *link, |
891 | const struct link_init_data *init_params) | 890 | const struct link_init_data *init_params) |
892 | { | 891 | { |
893 | uint8_t i; | 892 | uint8_t i; |
@@ -899,14 +898,14 @@ static bool construct( | |||
899 | struct dc_bios *bios = init_params->dc->ctx->dc_bios; | 898 | struct dc_bios *bios = init_params->dc->ctx->dc_bios; |
900 | const struct dc_vbios_funcs *bp_funcs = bios->funcs; | 899 | const struct dc_vbios_funcs *bp_funcs = bios->funcs; |
901 | 900 | ||
902 | link->public.irq_source_hpd = DC_IRQ_SOURCE_INVALID; | 901 | link->irq_source_hpd = DC_IRQ_SOURCE_INVALID; |
903 | link->public.irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID; | 902 | link->irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID; |
904 | 903 | ||
905 | link->link_status.dpcd_caps = &link->dpcd_caps; | 904 | link->link_status.dpcd_caps = &link->dpcd_caps; |
906 | 905 | ||
907 | link->dc = init_params->dc; | 906 | link->dc = init_params->dc; |
908 | link->ctx = dc_ctx; | 907 | link->ctx = dc_ctx; |
909 | link->public.link_index = init_params->link_index; | 908 | link->link_index = init_params->link_index; |
910 | 909 | ||
911 | link->link_id = bios->funcs->get_connector_id(bios, init_params->connector_index); | 910 | link->link_id = bios->funcs->get_connector_id(bios, init_params->connector_index); |
912 | 911 | ||
@@ -919,35 +918,35 @@ static bool construct( | |||
919 | hpd_gpio = get_hpd_gpio(link); | 918 | hpd_gpio = get_hpd_gpio(link); |
920 | 919 | ||
921 | if (hpd_gpio != NULL) | 920 | if (hpd_gpio != NULL) |
922 | link->public.irq_source_hpd = dal_irq_get_source(hpd_gpio); | 921 | link->irq_source_hpd = dal_irq_get_source(hpd_gpio); |
923 | 922 | ||
924 | switch (link->link_id.id) { | 923 | switch (link->link_id.id) { |
925 | case CONNECTOR_ID_HDMI_TYPE_A: | 924 | case CONNECTOR_ID_HDMI_TYPE_A: |
926 | link->public.connector_signal = SIGNAL_TYPE_HDMI_TYPE_A; | 925 | link->connector_signal = SIGNAL_TYPE_HDMI_TYPE_A; |
927 | 926 | ||
928 | break; | 927 | break; |
929 | case CONNECTOR_ID_SINGLE_LINK_DVID: | 928 | case CONNECTOR_ID_SINGLE_LINK_DVID: |
930 | case CONNECTOR_ID_SINGLE_LINK_DVII: | 929 | case CONNECTOR_ID_SINGLE_LINK_DVII: |
931 | link->public.connector_signal = SIGNAL_TYPE_DVI_SINGLE_LINK; | 930 | link->connector_signal = SIGNAL_TYPE_DVI_SINGLE_LINK; |
932 | break; | 931 | break; |
933 | case CONNECTOR_ID_DUAL_LINK_DVID: | 932 | case CONNECTOR_ID_DUAL_LINK_DVID: |
934 | case CONNECTOR_ID_DUAL_LINK_DVII: | 933 | case CONNECTOR_ID_DUAL_LINK_DVII: |
935 | link->public.connector_signal = SIGNAL_TYPE_DVI_DUAL_LINK; | 934 | link->connector_signal = SIGNAL_TYPE_DVI_DUAL_LINK; |
936 | break; | 935 | break; |
937 | case CONNECTOR_ID_DISPLAY_PORT: | 936 | case CONNECTOR_ID_DISPLAY_PORT: |
938 | link->public.connector_signal = SIGNAL_TYPE_DISPLAY_PORT; | 937 | link->connector_signal = SIGNAL_TYPE_DISPLAY_PORT; |
939 | 938 | ||
940 | if (hpd_gpio != NULL) | 939 | if (hpd_gpio != NULL) |
941 | link->public.irq_source_hpd_rx = | 940 | link->irq_source_hpd_rx = |
942 | dal_irq_get_rx_source(hpd_gpio); | 941 | dal_irq_get_rx_source(hpd_gpio); |
943 | 942 | ||
944 | break; | 943 | break; |
945 | case CONNECTOR_ID_EDP: | 944 | case CONNECTOR_ID_EDP: |
946 | link->public.connector_signal = SIGNAL_TYPE_EDP; | 945 | link->connector_signal = SIGNAL_TYPE_EDP; |
947 | 946 | ||
948 | if (hpd_gpio != NULL) { | 947 | if (hpd_gpio != NULL) { |
949 | link->public.irq_source_hpd = DC_IRQ_SOURCE_INVALID; | 948 | link->irq_source_hpd = DC_IRQ_SOURCE_INVALID; |
950 | link->public.irq_source_hpd_rx = | 949 | link->irq_source_hpd_rx = |
951 | dal_irq_get_rx_source(hpd_gpio); | 950 | dal_irq_get_rx_source(hpd_gpio); |
952 | } | 951 | } |
953 | break; | 952 | break; |
@@ -966,21 +965,21 @@ static bool construct( | |||
966 | LINK_INFO("Connector[%d] description:" | 965 | LINK_INFO("Connector[%d] description:" |
967 | "signal %d\n", | 966 | "signal %d\n", |
968 | init_params->connector_index, | 967 | init_params->connector_index, |
969 | link->public.connector_signal); | 968 | link->connector_signal); |
970 | 969 | ||
971 | ddc_service_init_data.ctx = link->ctx; | 970 | ddc_service_init_data.ctx = link->ctx; |
972 | ddc_service_init_data.id = link->link_id; | 971 | ddc_service_init_data.id = link->link_id; |
973 | ddc_service_init_data.link = link; | 972 | ddc_service_init_data.link = link; |
974 | link->public.ddc = dal_ddc_service_create(&ddc_service_init_data); | 973 | link->ddc = dal_ddc_service_create(&ddc_service_init_data); |
975 | 974 | ||
976 | if (link->public.ddc == NULL) { | 975 | if (link->ddc == NULL) { |
977 | DC_ERROR("Failed to create ddc_service!\n"); | 976 | DC_ERROR("Failed to create ddc_service!\n"); |
978 | goto ddc_create_fail; | 977 | goto ddc_create_fail; |
979 | } | 978 | } |
980 | 979 | ||
981 | link->public.ddc_hw_inst = | 980 | link->ddc_hw_inst = |
982 | dal_ddc_get_line( | 981 | dal_ddc_get_line( |
983 | dal_ddc_service_get_ddc_pin(link->public.ddc)); | 982 | dal_ddc_service_get_ddc_pin(link->ddc)); |
984 | 983 | ||
985 | enc_init_data.ctx = dc_ctx; | 984 | enc_init_data.ctx = dc_ctx; |
986 | bp_funcs->get_src_obj(dc_ctx->dc_bios, link->link_id, 0, &enc_init_data.encoder); | 985 | bp_funcs->get_src_obj(dc_ctx->dc_bios, link->link_id, 0, &enc_init_data.encoder); |
@@ -988,7 +987,7 @@ static bool construct( | |||
988 | enc_init_data.channel = get_ddc_line(link); | 987 | enc_init_data.channel = get_ddc_line(link); |
989 | enc_init_data.hpd_source = get_hpd_line(link); | 988 | enc_init_data.hpd_source = get_hpd_line(link); |
990 | 989 | ||
991 | link->public.hpd_src = enc_init_data.hpd_source; | 990 | link->hpd_src = enc_init_data.hpd_source; |
992 | 991 | ||
993 | enc_init_data.transmitter = | 992 | enc_init_data.transmitter = |
994 | translate_encoder_to_transmitter(enc_init_data.encoder); | 993 | translate_encoder_to_transmitter(enc_init_data.encoder); |
@@ -1000,7 +999,7 @@ static bool construct( | |||
1000 | goto link_enc_create_fail; | 999 | goto link_enc_create_fail; |
1001 | } | 1000 | } |
1002 | 1001 | ||
1003 | link->public.link_enc_hw_inst = link->link_enc->transmitter; | 1002 | link->link_enc_hw_inst = link->link_enc->transmitter; |
1004 | 1003 | ||
1005 | for (i = 0; i < 4; i++) { | 1004 | for (i = 0; i < 4; i++) { |
1006 | if (BP_RESULT_OK != | 1005 | if (BP_RESULT_OK != |
@@ -1015,10 +1014,10 @@ static bool construct( | |||
1015 | if (!bp_funcs->is_device_id_supported(dc_ctx->dc_bios, link->device_tag.dev_id)) | 1014 | if (!bp_funcs->is_device_id_supported(dc_ctx->dc_bios, link->device_tag.dev_id)) |
1016 | continue; | 1015 | continue; |
1017 | if (link->device_tag.dev_id.device_type == DEVICE_TYPE_CRT | 1016 | if (link->device_tag.dev_id.device_type == DEVICE_TYPE_CRT |
1018 | && link->public.connector_signal != SIGNAL_TYPE_RGB) | 1017 | && link->connector_signal != SIGNAL_TYPE_RGB) |
1019 | continue; | 1018 | continue; |
1020 | if (link->device_tag.dev_id.device_type == DEVICE_TYPE_LCD | 1019 | if (link->device_tag.dev_id.device_type == DEVICE_TYPE_LCD |
1021 | && link->public.connector_signal == SIGNAL_TYPE_RGB) | 1020 | && link->connector_signal == SIGNAL_TYPE_RGB) |
1022 | continue; | 1021 | continue; |
1023 | break; | 1022 | break; |
1024 | } | 1023 | } |
@@ -1052,7 +1051,7 @@ static bool construct( | |||
1052 | device_tag_fail: | 1051 | device_tag_fail: |
1053 | link->link_enc->funcs->destroy(&link->link_enc); | 1052 | link->link_enc->funcs->destroy(&link->link_enc); |
1054 | link_enc_create_fail: | 1053 | link_enc_create_fail: |
1055 | dal_ddc_service_destroy(&link->public.ddc); | 1054 | dal_ddc_service_destroy(&link->ddc); |
1056 | ddc_create_fail: | 1055 | ddc_create_fail: |
1057 | create_fail: | 1056 | create_fail: |
1058 | 1057 | ||
@@ -1066,9 +1065,9 @@ create_fail: | |||
1066 | /******************************************************************************* | 1065 | /******************************************************************************* |
1067 | * Public functions | 1066 | * Public functions |
1068 | ******************************************************************************/ | 1067 | ******************************************************************************/ |
1069 | struct core_link *link_create(const struct link_init_data *init_params) | 1068 | struct dc_link *link_create(const struct link_init_data *init_params) |
1070 | { | 1069 | { |
1071 | struct core_link *link = | 1070 | struct dc_link *link = |
1072 | dm_alloc(sizeof(*link)); | 1071 | dm_alloc(sizeof(*link)); |
1073 | 1072 | ||
1074 | if (NULL == link) | 1073 | if (NULL == link) |
@@ -1086,7 +1085,7 @@ alloc_fail: | |||
1086 | return NULL; | 1085 | return NULL; |
1087 | } | 1086 | } |
1088 | 1087 | ||
1089 | void link_destroy(struct core_link **link) | 1088 | void link_destroy(struct dc_link **link) |
1090 | { | 1089 | { |
1091 | destruct(*link); | 1090 | destruct(*link); |
1092 | dm_free(*link); | 1091 | dm_free(*link); |
@@ -1094,7 +1093,7 @@ void link_destroy(struct core_link **link) | |||
1094 | } | 1093 | } |
1095 | 1094 | ||
1096 | static void dpcd_configure_panel_mode( | 1095 | static void dpcd_configure_panel_mode( |
1097 | struct core_link *link, | 1096 | struct dc_link *link, |
1098 | enum dp_panel_mode panel_mode) | 1097 | enum dp_panel_mode panel_mode) |
1099 | { | 1098 | { |
1100 | union dpcd_edp_config edp_config_set; | 1099 | union dpcd_edp_config edp_config_set; |
@@ -1139,7 +1138,7 @@ static void dpcd_configure_panel_mode( | |||
1139 | dm_logger_write(link->ctx->logger, LOG_DETECTION_DP_CAPS, | 1138 | dm_logger_write(link->ctx->logger, LOG_DETECTION_DP_CAPS, |
1140 | "Link: %d eDP panel mode supported: %d " | 1139 | "Link: %d eDP panel mode supported: %d " |
1141 | "eDP panel mode enabled: %d \n", | 1140 | "eDP panel mode enabled: %d \n", |
1142 | link->public.link_index, | 1141 | link->link_index, |
1143 | link->dpcd_caps.panel_mode_edp, | 1142 | link->dpcd_caps.panel_mode_edp, |
1144 | panel_mode_edp); | 1143 | panel_mode_edp); |
1145 | } | 1144 | } |
@@ -1147,7 +1146,7 @@ static void dpcd_configure_panel_mode( | |||
1147 | static void enable_stream_features(struct pipe_ctx *pipe_ctx) | 1146 | static void enable_stream_features(struct pipe_ctx *pipe_ctx) |
1148 | { | 1147 | { |
1149 | struct core_stream *stream = pipe_ctx->stream; | 1148 | struct core_stream *stream = pipe_ctx->stream; |
1150 | struct core_link *link = stream->sink->link; | 1149 | struct dc_link *link = stream->sink->link; |
1151 | union down_spread_ctrl downspread; | 1150 | union down_spread_ctrl downspread; |
1152 | 1151 | ||
1153 | core_link_read_dpcd(link, DP_DOWNSPREAD_CTRL, | 1152 | core_link_read_dpcd(link, DP_DOWNSPREAD_CTRL, |
@@ -1165,7 +1164,7 @@ static enum dc_status enable_link_dp(struct pipe_ctx *pipe_ctx) | |||
1165 | struct core_stream *stream = pipe_ctx->stream; | 1164 | struct core_stream *stream = pipe_ctx->stream; |
1166 | enum dc_status status; | 1165 | enum dc_status status; |
1167 | bool skip_video_pattern; | 1166 | bool skip_video_pattern; |
1168 | struct core_link *link = stream->sink->link; | 1167 | struct dc_link *link = stream->sink->link; |
1169 | struct dc_link_settings link_settings = {0}; | 1168 | struct dc_link_settings link_settings = {0}; |
1170 | enum dp_panel_mode panel_mode; | 1169 | enum dp_panel_mode panel_mode; |
1171 | enum dc_link_rate max_link_rate = LINK_RATE_HIGH2; | 1170 | enum dc_link_rate max_link_rate = LINK_RATE_HIGH2; |
@@ -1224,7 +1223,7 @@ static enum dc_status enable_link_dp(struct pipe_ctx *pipe_ctx) | |||
1224 | &link_settings, | 1223 | &link_settings, |
1225 | skip_video_pattern, | 1224 | skip_video_pattern, |
1226 | LINK_TRAINING_ATTEMPTS)) { | 1225 | LINK_TRAINING_ATTEMPTS)) { |
1227 | link->public.cur_link_settings = link_settings; | 1226 | link->cur_link_settings = link_settings; |
1228 | status = DC_OK; | 1227 | status = DC_OK; |
1229 | } | 1228 | } |
1230 | else | 1229 | else |
@@ -1237,12 +1236,12 @@ static enum dc_status enable_link_dp(struct pipe_ctx *pipe_ctx) | |||
1237 | 1236 | ||
1238 | static enum dc_status enable_link_dp_mst(struct pipe_ctx *pipe_ctx) | 1237 | static enum dc_status enable_link_dp_mst(struct pipe_ctx *pipe_ctx) |
1239 | { | 1238 | { |
1240 | struct core_link *link = pipe_ctx->stream->sink->link; | 1239 | struct dc_link *link = pipe_ctx->stream->sink->link; |
1241 | 1240 | ||
1242 | /* sink signal type after MST branch is MST. Multiple MST sinks | 1241 | /* sink signal type after MST branch is MST. Multiple MST sinks |
1243 | * share one link. Link DP PHY is enable or training only once. | 1242 | * share one link. Link DP PHY is enable or training only once. |
1244 | */ | 1243 | */ |
1245 | if (link->public.cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) | 1244 | if (link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) |
1246 | return DC_OK; | 1245 | return DC_OK; |
1247 | 1246 | ||
1248 | /* set the sink to MST mode before enabling the link */ | 1247 | /* set the sink to MST mode before enabling the link */ |
@@ -1254,16 +1253,16 @@ static enum dc_status enable_link_dp_mst(struct pipe_ctx *pipe_ctx) | |||
1254 | static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) | 1253 | static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) |
1255 | { | 1254 | { |
1256 | struct core_stream *stream = pipe_ctx->stream; | 1255 | struct core_stream *stream = pipe_ctx->stream; |
1257 | struct core_link *link = stream->sink->link; | 1256 | struct dc_link *link = stream->sink->link; |
1258 | enum dc_color_depth display_color_depth; | 1257 | enum dc_color_depth display_color_depth; |
1259 | 1258 | ||
1260 | if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) | 1259 | if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) |
1261 | dal_ddc_service_write_scdc_data( | 1260 | dal_ddc_service_write_scdc_data( |
1262 | stream->sink->link->public.ddc, | 1261 | stream->sink->link->ddc, |
1263 | stream->phy_pix_clk, | 1262 | stream->phy_pix_clk, |
1264 | stream->public.timing.flags.LTE_340MCSC_SCRAMBLE); | 1263 | stream->public.timing.flags.LTE_340MCSC_SCRAMBLE); |
1265 | 1264 | ||
1266 | memset(&stream->sink->link->public.cur_link_settings, 0, | 1265 | memset(&stream->sink->link->cur_link_settings, 0, |
1267 | sizeof(struct dc_link_settings)); | 1266 | sizeof(struct dc_link_settings)); |
1268 | 1267 | ||
1269 | display_color_depth = stream->public.timing.display_color_depth; | 1268 | display_color_depth = stream->public.timing.display_color_depth; |
@@ -1279,7 +1278,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) | |||
1279 | stream->phy_pix_clk); | 1278 | stream->phy_pix_clk); |
1280 | 1279 | ||
1281 | if (pipe_ctx->stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) | 1280 | if (pipe_ctx->stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) |
1282 | dal_ddc_service_read_scdc_data(link->public.ddc); | 1281 | dal_ddc_service_read_scdc_data(link->ddc); |
1283 | } | 1282 | } |
1284 | 1283 | ||
1285 | /****************************enable_link***********************************/ | 1284 | /****************************enable_link***********************************/ |
@@ -1321,7 +1320,7 @@ static enum dc_status enable_link(struct pipe_ctx *pipe_ctx) | |||
1321 | return status; | 1320 | return status; |
1322 | } | 1321 | } |
1323 | 1322 | ||
1324 | static void disable_link(struct core_link *link, enum signal_type signal) | 1323 | static void disable_link(struct dc_link *link, enum signal_type signal) |
1325 | { | 1324 | { |
1326 | /* | 1325 | /* |
1327 | * TODO: implement call for dp_set_hw_test_pattern | 1326 | * TODO: implement call for dp_set_hw_test_pattern |
@@ -1345,7 +1344,7 @@ static void disable_link(struct core_link *link, enum signal_type signal) | |||
1345 | 1344 | ||
1346 | enum dc_status dc_link_validate_mode_timing( | 1345 | enum dc_status dc_link_validate_mode_timing( |
1347 | const struct core_stream *stream, | 1346 | const struct core_stream *stream, |
1348 | struct core_link *link, | 1347 | struct dc_link *link, |
1349 | const struct dc_crtc_timing *timing) | 1348 | const struct dc_crtc_timing *timing) |
1350 | { | 1349 | { |
1351 | uint32_t max_pix_clk = stream->sink->public.dongle_max_pix_clk; | 1350 | uint32_t max_pix_clk = stream->sink->public.dongle_max_pix_clk; |
@@ -1353,7 +1352,7 @@ enum dc_status dc_link_validate_mode_timing( | |||
1353 | /* A hack to avoid failing any modes for EDID override feature on | 1352 | /* A hack to avoid failing any modes for EDID override feature on |
1354 | * topology change such as lower quality cable for DP or different dongle | 1353 | * topology change such as lower quality cable for DP or different dongle |
1355 | */ | 1354 | */ |
1356 | if (link->public.remote_sinks[0]) | 1355 | if (link->remote_sinks[0]) |
1357 | return DC_OK; | 1356 | return DC_OK; |
1358 | 1357 | ||
1359 | if (0 != max_pix_clk && timing->pix_clk_khz > max_pix_clk) | 1358 | if (0 != max_pix_clk && timing->pix_clk_khz > max_pix_clk) |
@@ -1376,10 +1375,9 @@ enum dc_status dc_link_validate_mode_timing( | |||
1376 | } | 1375 | } |
1377 | 1376 | ||
1378 | 1377 | ||
1379 | bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level, | 1378 | bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level, |
1380 | uint32_t frame_ramp, const struct dc_stream *stream) | 1379 | uint32_t frame_ramp, const struct dc_stream *stream) |
1381 | { | 1380 | { |
1382 | struct core_link *link = DC_LINK_TO_CORE(dc_link); | ||
1383 | struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc); | 1381 | struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc); |
1384 | struct core_stream *core_stream = NULL; | 1382 | struct core_stream *core_stream = NULL; |
1385 | struct abm *abm = core_dc->res_pool->abm; | 1383 | struct abm *abm = core_dc->res_pool->abm; |
@@ -1392,7 +1390,7 @@ bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level, | |||
1392 | dm_logger_write(link->ctx->logger, LOG_BACKLIGHT, | 1390 | dm_logger_write(link->ctx->logger, LOG_BACKLIGHT, |
1393 | "New Backlight level: %d (0x%X)\n", level, level); | 1391 | "New Backlight level: %d (0x%X)\n", level, level); |
1394 | 1392 | ||
1395 | if (dc_is_embedded_signal(dc_link->connector_signal)) { | 1393 | if (dc_is_embedded_signal(link->connector_signal)) { |
1396 | if (stream != NULL) { | 1394 | if (stream != NULL) { |
1397 | core_stream = DC_STREAM_TO_CORE(stream); | 1395 | core_stream = DC_STREAM_TO_CORE(stream); |
1398 | for (i = 0; i < MAX_PIPES; i++) { | 1396 | for (i = 0; i < MAX_PIPES; i++) { |
@@ -1419,9 +1417,8 @@ bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level, | |||
1419 | } | 1417 | } |
1420 | 1418 | ||
1421 | 1419 | ||
1422 | bool dc_link_set_abm_disable(const struct dc_link *dc_link) | 1420 | bool dc_link_set_abm_disable(const struct dc_link *link) |
1423 | { | 1421 | { |
1424 | struct core_link *link = DC_LINK_TO_CORE(dc_link); | ||
1425 | struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc); | 1422 | struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc); |
1426 | struct abm *abm = core_dc->res_pool->abm; | 1423 | struct abm *abm = core_dc->res_pool->abm; |
1427 | 1424 | ||
@@ -1434,11 +1431,9 @@ bool dc_link_set_abm_disable(const struct dc_link *dc_link) | |||
1434 | } | 1431 | } |
1435 | 1432 | ||
1436 | 1433 | ||
1437 | bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable) | 1434 | bool dc_link_set_psr_enable(const struct dc_link *link, bool enable) |
1438 | { | 1435 | { |
1439 | struct core_link *link = DC_LINK_TO_CORE(dc_link); | 1436 | struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc); |
1440 | struct dc_context *ctx = link->ctx; | ||
1441 | struct core_dc *core_dc = DC_TO_CORE(ctx->dc); | ||
1442 | struct dmcu *dmcu = core_dc->res_pool->dmcu; | 1437 | struct dmcu *dmcu = core_dc->res_pool->dmcu; |
1443 | 1438 | ||
1444 | if (dmcu != NULL && link->psr_enabled) | 1439 | if (dmcu != NULL && link->psr_enabled) |
@@ -1447,11 +1442,9 @@ bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable) | |||
1447 | return true; | 1442 | return true; |
1448 | } | 1443 | } |
1449 | 1444 | ||
1450 | bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state) | 1445 | bool dc_link_get_psr_state(const struct dc_link *link, uint32_t *psr_state) |
1451 | { | 1446 | { |
1452 | struct core_link *link = DC_LINK_TO_CORE(dc_link); | 1447 | struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc); |
1453 | struct dc_context *ctx = link->ctx; | ||
1454 | struct core_dc *core_dc = DC_TO_CORE(ctx->dc); | ||
1455 | struct dmcu *dmcu = core_dc->res_pool->dmcu; | 1448 | struct dmcu *dmcu = core_dc->res_pool->dmcu; |
1456 | 1449 | ||
1457 | if (dmcu != NULL && link->psr_enabled) | 1450 | if (dmcu != NULL && link->psr_enabled) |
@@ -1460,20 +1453,18 @@ bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state) | |||
1460 | return true; | 1453 | return true; |
1461 | } | 1454 | } |
1462 | 1455 | ||
1463 | bool dc_link_setup_psr(const struct dc_link *dc_link, | 1456 | bool dc_link_setup_psr(struct dc_link *link, |
1464 | const struct dc_stream *stream, struct psr_config *psr_config, | 1457 | const struct dc_stream *stream, struct psr_config *psr_config, |
1465 | struct psr_context *psr_context) | 1458 | struct psr_context *psr_context) |
1466 | { | 1459 | { |
1467 | struct core_link *link = DC_LINK_TO_CORE(dc_link); | 1460 | struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc); |
1468 | struct dc_context *ctx = link->ctx; | ||
1469 | struct core_dc *core_dc = DC_TO_CORE(ctx->dc); | ||
1470 | struct dmcu *dmcu = core_dc->res_pool->dmcu; | 1461 | struct dmcu *dmcu = core_dc->res_pool->dmcu; |
1471 | struct core_stream *core_stream = DC_STREAM_TO_CORE(stream); | 1462 | struct core_stream *core_stream = DC_STREAM_TO_CORE(stream); |
1472 | int i; | 1463 | int i; |
1473 | 1464 | ||
1474 | psr_context->controllerId = CONTROLLER_ID_UNDEFINED; | 1465 | psr_context->controllerId = CONTROLLER_ID_UNDEFINED; |
1475 | 1466 | ||
1476 | if (dc_link != NULL && | 1467 | if (link != NULL && |
1477 | dmcu != NULL) { | 1468 | dmcu != NULL) { |
1478 | /* updateSinkPsrDpcdConfig*/ | 1469 | /* updateSinkPsrDpcdConfig*/ |
1479 | union dpcd_psr_configuration psr_configuration; | 1470 | union dpcd_psr_configuration psr_configuration; |
@@ -1501,12 +1492,12 @@ bool dc_link_setup_psr(const struct dc_link *dc_link, | |||
1501 | 1492 | ||
1502 | dm_helpers_dp_write_dpcd( | 1493 | dm_helpers_dp_write_dpcd( |
1503 | link->ctx, | 1494 | link->ctx, |
1504 | dc_link, | 1495 | link, |
1505 | 368, | 1496 | 368, |
1506 | &psr_configuration.raw, | 1497 | &psr_configuration.raw, |
1507 | sizeof(psr_configuration.raw)); | 1498 | sizeof(psr_configuration.raw)); |
1508 | 1499 | ||
1509 | psr_context->channel = link->public.ddc->ddc_pin->hw_info.ddc_channel; | 1500 | psr_context->channel = link->ddc->ddc_pin->hw_info.ddc_channel; |
1510 | psr_context->transmitterId = link->link_enc->transmitter; | 1501 | psr_context->transmitterId = link->link_enc->transmitter; |
1511 | psr_context->engineId = link->link_enc->preferred_engine; | 1502 | psr_context->engineId = link->link_enc->preferred_engine; |
1512 | 1503 | ||
@@ -1584,23 +1575,21 @@ bool dc_link_setup_psr(const struct dc_link *dc_link, | |||
1584 | 1575 | ||
1585 | } | 1576 | } |
1586 | 1577 | ||
1587 | const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link) | 1578 | const struct dc_link_status *dc_link_get_status(const struct dc_link *link) |
1588 | { | 1579 | { |
1589 | struct core_link *link = DC_LINK_TO_CORE(dc_link); | ||
1590 | |||
1591 | return &link->link_status; | 1580 | return &link->link_status; |
1592 | } | 1581 | } |
1593 | 1582 | ||
1594 | void core_link_resume(struct core_link *link) | 1583 | void core_link_resume(struct dc_link *link) |
1595 | { | 1584 | { |
1596 | if (link->public.connector_signal != SIGNAL_TYPE_VIRTUAL) | 1585 | if (link->connector_signal != SIGNAL_TYPE_VIRTUAL) |
1597 | program_hpd_filter(link); | 1586 | program_hpd_filter(link); |
1598 | } | 1587 | } |
1599 | 1588 | ||
1600 | static struct fixed31_32 get_pbn_per_slot(struct core_stream *stream) | 1589 | static struct fixed31_32 get_pbn_per_slot(struct core_stream *stream) |
1601 | { | 1590 | { |
1602 | struct dc_link_settings *link_settings = | 1591 | struct dc_link_settings *link_settings = |
1603 | &stream->sink->link->public.cur_link_settings; | 1592 | &stream->sink->link->cur_link_settings; |
1604 | uint32_t link_rate_in_mbps = | 1593 | uint32_t link_rate_in_mbps = |
1605 | link_settings->link_rate * LINK_RATE_REF_FREQ_IN_MHZ; | 1594 | link_settings->link_rate * LINK_RATE_REF_FREQ_IN_MHZ; |
1606 | struct fixed31_32 mbps = dal_fixed31_32_from_int( | 1595 | struct fixed31_32 mbps = dal_fixed31_32_from_int( |
@@ -1653,7 +1642,7 @@ static struct fixed31_32 get_pbn_from_timing(struct pipe_ctx *pipe_ctx) | |||
1653 | } | 1642 | } |
1654 | 1643 | ||
1655 | static void update_mst_stream_alloc_table( | 1644 | static void update_mst_stream_alloc_table( |
1656 | struct core_link *link, | 1645 | struct dc_link *link, |
1657 | struct stream_encoder *stream_enc, | 1646 | struct stream_encoder *stream_enc, |
1658 | const struct dp_mst_stream_allocation_table *proposed_table) | 1647 | const struct dp_mst_stream_allocation_table *proposed_table) |
1659 | { | 1648 | { |
@@ -1668,7 +1657,7 @@ static void update_mst_stream_alloc_table( | |||
1668 | ASSERT(proposed_table->stream_count - | 1657 | ASSERT(proposed_table->stream_count - |
1669 | link->mst_stream_alloc_table.stream_count < 2); | 1658 | link->mst_stream_alloc_table.stream_count < 2); |
1670 | 1659 | ||
1671 | /* copy proposed_table to core_link, add stream encoder */ | 1660 | /* copy proposed_table to link, add stream encoder */ |
1672 | for (i = 0; i < proposed_table->stream_count; i++) { | 1661 | for (i = 0; i < proposed_table->stream_count; i++) { |
1673 | 1662 | ||
1674 | for (j = 0; j < link->mst_stream_alloc_table.stream_count; j++) { | 1663 | for (j = 0; j < link->mst_stream_alloc_table.stream_count; j++) { |
@@ -1707,7 +1696,7 @@ static void update_mst_stream_alloc_table( | |||
1707 | static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx) | 1696 | static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx) |
1708 | { | 1697 | { |
1709 | struct core_stream *stream = pipe_ctx->stream; | 1698 | struct core_stream *stream = pipe_ctx->stream; |
1710 | struct core_link *link = stream->sink->link; | 1699 | struct dc_link *link = stream->sink->link; |
1711 | struct link_encoder *link_encoder = link->link_enc; | 1700 | struct link_encoder *link_encoder = link->link_enc; |
1712 | struct stream_encoder *stream_encoder = pipe_ctx->stream_enc; | 1701 | struct stream_encoder *stream_encoder = pipe_ctx->stream_enc; |
1713 | struct dp_mst_stream_allocation_table proposed_table = {0}; | 1702 | struct dp_mst_stream_allocation_table proposed_table = {0}; |
@@ -1789,13 +1778,13 @@ static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx) | |||
1789 | static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx) | 1778 | static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx) |
1790 | { | 1779 | { |
1791 | struct core_stream *stream = pipe_ctx->stream; | 1780 | struct core_stream *stream = pipe_ctx->stream; |
1792 | struct core_link *link = stream->sink->link; | 1781 | struct dc_link *link = stream->sink->link; |
1793 | struct link_encoder *link_encoder = link->link_enc; | 1782 | struct link_encoder *link_encoder = link->link_enc; |
1794 | struct stream_encoder *stream_encoder = pipe_ctx->stream_enc; | 1783 | struct stream_encoder *stream_encoder = pipe_ctx->stream_enc; |
1795 | struct dp_mst_stream_allocation_table proposed_table = {0}; | 1784 | struct dp_mst_stream_allocation_table proposed_table = {0}; |
1796 | struct fixed31_32 avg_time_slots_per_mtp = dal_fixed31_32_from_int(0); | 1785 | struct fixed31_32 avg_time_slots_per_mtp = dal_fixed31_32_from_int(0); |
1797 | uint8_t i; | 1786 | uint8_t i; |
1798 | bool mst_mode = (link->public.type == dc_connection_mst_branch); | 1787 | bool mst_mode = (link->type == dc_connection_mst_branch); |
1799 | 1788 | ||
1800 | /* deallocate_mst_payload is called before disable link. When mode or | 1789 | /* deallocate_mst_payload is called before disable link. When mode or |
1801 | * disable/enable monitor, new stream is created which is not in link | 1790 | * disable/enable monitor, new stream is created which is not in link |
@@ -1875,7 +1864,7 @@ void core_link_enable_stream(struct pipe_ctx *pipe_ctx) | |||
1875 | if (status != DC_OK) { | 1864 | if (status != DC_OK) { |
1876 | dm_logger_write(pipe_ctx->stream->ctx->logger, | 1865 | dm_logger_write(pipe_ctx->stream->ctx->logger, |
1877 | LOG_WARNING, "enabling link %u failed: %d\n", | 1866 | LOG_WARNING, "enabling link %u failed: %d\n", |
1878 | pipe_ctx->stream->sink->link->public.link_index, | 1867 | pipe_ctx->stream->sink->link->link_index, |
1879 | status); | 1868 | status); |
1880 | 1869 | ||
1881 | /* Abort stream enable *unless* the failure was due to | 1870 | /* Abort stream enable *unless* the failure was due to |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c index 2f5a89c5b063..d09e539397ea 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | |||
@@ -354,7 +354,7 @@ static uint32_t defer_delay_converter_wa( | |||
354 | struct ddc_service *ddc, | 354 | struct ddc_service *ddc, |
355 | uint32_t defer_delay) | 355 | uint32_t defer_delay) |
356 | { | 356 | { |
357 | struct core_link *link = ddc->link; | 357 | struct dc_link *link = ddc->link; |
358 | 358 | ||
359 | if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_4 && | 359 | if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_4 && |
360 | !memcmp(link->dpcd_caps.branch_dev_name, | 360 | !memcmp(link->dpcd_caps.branch_dev_name, |
@@ -423,7 +423,7 @@ static bool i2c_read( | |||
423 | 423 | ||
424 | return dm_helpers_submit_i2c( | 424 | return dm_helpers_submit_i2c( |
425 | ddc->ctx, | 425 | ddc->ctx, |
426 | &ddc->link->public, | 426 | ddc->link, |
427 | &command); | 427 | &command); |
428 | } | 428 | } |
429 | 429 | ||
@@ -624,7 +624,7 @@ bool dal_ddc_service_query_ddc_data( | |||
624 | 624 | ||
625 | ret = dm_helpers_submit_i2c( | 625 | ret = dm_helpers_submit_i2c( |
626 | ddc->ctx, | 626 | ddc->ctx, |
627 | &ddc->link->public, | 627 | ddc->link, |
628 | &command); | 628 | &command); |
629 | 629 | ||
630 | dal_ddc_i2c_payloads_destroy(&payloads); | 630 | dal_ddc_i2c_payloads_destroy(&payloads); |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c index e90b3ebc8347..c7b400786121 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | |||
@@ -34,7 +34,7 @@ enum { | |||
34 | }; | 34 | }; |
35 | 35 | ||
36 | static void wait_for_training_aux_rd_interval( | 36 | static void wait_for_training_aux_rd_interval( |
37 | struct core_link* link, | 37 | struct dc_link *link, |
38 | uint32_t default_wait_in_micro_secs) | 38 | uint32_t default_wait_in_micro_secs) |
39 | { | 39 | { |
40 | union training_aux_rd_interval training_rd_interval; | 40 | union training_aux_rd_interval training_rd_interval; |
@@ -63,7 +63,7 @@ static void wait_for_training_aux_rd_interval( | |||
63 | } | 63 | } |
64 | 64 | ||
65 | static void dpcd_set_training_pattern( | 65 | static void dpcd_set_training_pattern( |
66 | struct core_link* link, | 66 | struct dc_link *link, |
67 | union dpcd_training_pattern dpcd_pattern) | 67 | union dpcd_training_pattern dpcd_pattern) |
68 | { | 68 | { |
69 | core_link_write_dpcd( | 69 | core_link_write_dpcd( |
@@ -80,7 +80,7 @@ static void dpcd_set_training_pattern( | |||
80 | } | 80 | } |
81 | 81 | ||
82 | static void dpcd_set_link_settings( | 82 | static void dpcd_set_link_settings( |
83 | struct core_link* link, | 83 | struct dc_link *link, |
84 | const struct link_training_settings *lt_settings) | 84 | const struct link_training_settings *lt_settings) |
85 | { | 85 | { |
86 | uint8_t rate = (uint8_t) | 86 | uint8_t rate = (uint8_t) |
@@ -123,7 +123,7 @@ static void dpcd_set_link_settings( | |||
123 | 123 | ||
124 | static enum dpcd_training_patterns | 124 | static enum dpcd_training_patterns |
125 | hw_training_pattern_to_dpcd_training_pattern( | 125 | hw_training_pattern_to_dpcd_training_pattern( |
126 | struct core_link* link, | 126 | struct dc_link *link, |
127 | enum hw_dp_training_pattern pattern) | 127 | enum hw_dp_training_pattern pattern) |
128 | { | 128 | { |
129 | enum dpcd_training_patterns dpcd_tr_pattern = | 129 | enum dpcd_training_patterns dpcd_tr_pattern = |
@@ -155,7 +155,7 @@ static enum dpcd_training_patterns | |||
155 | } | 155 | } |
156 | 156 | ||
157 | static void dpcd_set_lt_pattern_and_lane_settings( | 157 | static void dpcd_set_lt_pattern_and_lane_settings( |
158 | struct core_link* link, | 158 | struct dc_link *link, |
159 | const struct link_training_settings *lt_settings, | 159 | const struct link_training_settings *lt_settings, |
160 | enum hw_dp_training_pattern pattern) | 160 | enum hw_dp_training_pattern pattern) |
161 | { | 161 | { |
@@ -246,7 +246,7 @@ static void dpcd_set_lt_pattern_and_lane_settings( | |||
246 | dpcd_lt_buffer, | 246 | dpcd_lt_buffer, |
247 | size_in_bytes + sizeof(dpcd_pattern.raw) ); | 247 | size_in_bytes + sizeof(dpcd_pattern.raw) ); |
248 | 248 | ||
249 | link->public.cur_lane_setting = lt_settings->lane_settings[0]; | 249 | link->cur_lane_setting = lt_settings->lane_settings[0]; |
250 | } | 250 | } |
251 | 251 | ||
252 | static bool is_cr_done(enum dc_lane_count ln_count, | 252 | static bool is_cr_done(enum dc_lane_count ln_count, |
@@ -419,7 +419,7 @@ static void find_max_drive_settings( | |||
419 | } | 419 | } |
420 | 420 | ||
421 | static void get_lane_status_and_drive_settings( | 421 | static void get_lane_status_and_drive_settings( |
422 | struct core_link* link, | 422 | struct dc_link *link, |
423 | const struct link_training_settings *link_training_setting, | 423 | const struct link_training_settings *link_training_setting, |
424 | union lane_status *ln_status, | 424 | union lane_status *ln_status, |
425 | union lane_align_status_updated *ln_status_updated, | 425 | union lane_align_status_updated *ln_status_updated, |
@@ -500,7 +500,7 @@ static void get_lane_status_and_drive_settings( | |||
500 | } | 500 | } |
501 | 501 | ||
502 | static void dpcd_set_lane_settings( | 502 | static void dpcd_set_lane_settings( |
503 | struct core_link* link, | 503 | struct dc_link *link, |
504 | const struct link_training_settings *link_training_setting) | 504 | const struct link_training_settings *link_training_setting) |
505 | { | 505 | { |
506 | union dpcd_training_lane dpcd_lane[LANE_COUNT_DP_MAX] = {{{0}}}; | 506 | union dpcd_training_lane dpcd_lane[LANE_COUNT_DP_MAX] = {{{0}}}; |
@@ -560,7 +560,7 @@ static void dpcd_set_lane_settings( | |||
560 | dpcd_lane[0].bits.MAX_SWING_REACHED, | 560 | dpcd_lane[0].bits.MAX_SWING_REACHED, |
561 | dpcd_lane[0].bits.MAX_PRE_EMPHASIS_REACHED); | 561 | dpcd_lane[0].bits.MAX_PRE_EMPHASIS_REACHED); |
562 | 562 | ||
563 | link->public.cur_lane_setting = link_training_setting->lane_settings[0]; | 563 | link->cur_lane_setting = link_training_setting->lane_settings[0]; |
564 | 564 | ||
565 | } | 565 | } |
566 | 566 | ||
@@ -580,19 +580,18 @@ static bool is_max_vs_reached( | |||
580 | } | 580 | } |
581 | 581 | ||
582 | void dc_link_dp_set_drive_settings( | 582 | void dc_link_dp_set_drive_settings( |
583 | const struct dc_link *link, | 583 | struct dc_link *link, |
584 | struct link_training_settings *lt_settings) | 584 | struct link_training_settings *lt_settings) |
585 | { | 585 | { |
586 | struct core_link *core_link = DC_LINK_TO_CORE(link); | ||
587 | /* program ASIC PHY settings*/ | 586 | /* program ASIC PHY settings*/ |
588 | dp_set_hw_lane_settings(core_link, lt_settings); | 587 | dp_set_hw_lane_settings(link, lt_settings); |
589 | 588 | ||
590 | /* Notify DP sink the PHY settings from source */ | 589 | /* Notify DP sink the PHY settings from source */ |
591 | dpcd_set_lane_settings(core_link, lt_settings); | 590 | dpcd_set_lane_settings(link, lt_settings); |
592 | } | 591 | } |
593 | 592 | ||
594 | static bool perform_post_lt_adj_req_sequence( | 593 | static bool perform_post_lt_adj_req_sequence( |
595 | struct core_link *link, | 594 | struct dc_link *link, |
596 | struct link_training_settings *lt_settings) | 595 | struct link_training_settings *lt_settings) |
597 | { | 596 | { |
598 | enum dc_lane_count lane_count = | 597 | enum dc_lane_count lane_count = |
@@ -656,7 +655,7 @@ static bool perform_post_lt_adj_req_sequence( | |||
656 | update_drive_settings( | 655 | update_drive_settings( |
657 | lt_settings,req_settings); | 656 | lt_settings,req_settings); |
658 | 657 | ||
659 | dc_link_dp_set_drive_settings(&link->public, | 658 | dc_link_dp_set_drive_settings(link, |
660 | lt_settings); | 659 | lt_settings); |
661 | break; | 660 | break; |
662 | } | 661 | } |
@@ -682,7 +681,7 @@ static bool perform_post_lt_adj_req_sequence( | |||
682 | 681 | ||
683 | } | 682 | } |
684 | 683 | ||
685 | static enum hw_dp_training_pattern get_supported_tp(struct core_link *link) | 684 | static enum hw_dp_training_pattern get_supported_tp(struct dc_link *link) |
686 | { | 685 | { |
687 | enum hw_dp_training_pattern highest_tp = HW_DP_TRAINING_PATTERN_2; | 686 | enum hw_dp_training_pattern highest_tp = HW_DP_TRAINING_PATTERN_2; |
688 | struct encoder_feature_support *features = &link->link_enc->features; | 687 | struct encoder_feature_support *features = &link->link_enc->features; |
@@ -706,7 +705,7 @@ static enum hw_dp_training_pattern get_supported_tp(struct core_link *link) | |||
706 | } | 705 | } |
707 | 706 | ||
708 | static enum link_training_result perform_channel_equalization_sequence( | 707 | static enum link_training_result perform_channel_equalization_sequence( |
709 | struct core_link *link, | 708 | struct dc_link *link, |
710 | struct link_training_settings *lt_settings) | 709 | struct link_training_settings *lt_settings) |
711 | { | 710 | { |
712 | struct link_training_settings req_settings; | 711 | struct link_training_settings req_settings; |
@@ -768,7 +767,7 @@ static enum link_training_result perform_channel_equalization_sequence( | |||
768 | } | 767 | } |
769 | 768 | ||
770 | static bool perform_clock_recovery_sequence( | 769 | static bool perform_clock_recovery_sequence( |
771 | struct core_link *link, | 770 | struct dc_link *link, |
772 | struct link_training_settings *lt_settings) | 771 | struct link_training_settings *lt_settings) |
773 | { | 772 | { |
774 | uint32_t retries_cr; | 773 | uint32_t retries_cr; |
@@ -877,7 +876,7 @@ static bool perform_clock_recovery_sequence( | |||
877 | } | 876 | } |
878 | 877 | ||
879 | static inline bool perform_link_training_int( | 878 | static inline bool perform_link_training_int( |
880 | struct core_link *link, | 879 | struct dc_link *link, |
881 | struct link_training_settings *lt_settings, | 880 | struct link_training_settings *lt_settings, |
882 | bool status) | 881 | bool status) |
883 | { | 882 | { |
@@ -923,7 +922,6 @@ enum link_training_result dc_link_dp_perform_link_training( | |||
923 | bool skip_video_pattern) | 922 | bool skip_video_pattern) |
924 | { | 923 | { |
925 | enum link_training_result status = LINK_TRAINING_SUCCESS; | 924 | enum link_training_result status = LINK_TRAINING_SUCCESS; |
926 | struct core_link *core_link = DC_LINK_TO_CORE(link); | ||
927 | 925 | ||
928 | char *link_rate = "Unknown"; | 926 | char *link_rate = "Unknown"; |
929 | struct link_training_settings lt_settings; | 927 | struct link_training_settings lt_settings; |
@@ -945,19 +943,19 @@ enum link_training_result dc_link_dp_perform_link_training( | |||
945 | lt_settings.link_settings.link_spread = LINK_SPREAD_05_DOWNSPREAD_30KHZ; | 943 | lt_settings.link_settings.link_spread = LINK_SPREAD_05_DOWNSPREAD_30KHZ; |
946 | 944 | ||
947 | /* 1. set link rate, lane count and spread*/ | 945 | /* 1. set link rate, lane count and spread*/ |
948 | dpcd_set_link_settings(core_link, <_settings); | 946 | dpcd_set_link_settings(link, <_settings); |
949 | 947 | ||
950 | /* 2. perform link training (set link training done | 948 | /* 2. perform link training (set link training done |
951 | * to false is done as well)*/ | 949 | * to false is done as well)*/ |
952 | if (!perform_clock_recovery_sequence(core_link, <_settings)) { | 950 | if (!perform_clock_recovery_sequence(link, <_settings)) { |
953 | status = LINK_TRAINING_CR_FAIL; | 951 | status = LINK_TRAINING_CR_FAIL; |
954 | } else { | 952 | } else { |
955 | status = perform_channel_equalization_sequence(core_link, | 953 | status = perform_channel_equalization_sequence(link, |
956 | <_settings); | 954 | <_settings); |
957 | } | 955 | } |
958 | 956 | ||
959 | if ((status == LINK_TRAINING_SUCCESS) || !skip_video_pattern) { | 957 | if ((status == LINK_TRAINING_SUCCESS) || !skip_video_pattern) { |
960 | if (!perform_link_training_int(core_link, | 958 | if (!perform_link_training_int(link, |
961 | <_settings, | 959 | <_settings, |
962 | status == LINK_TRAINING_SUCCESS)) { | 960 | status == LINK_TRAINING_SUCCESS)) { |
963 | /* the next link training setting in this case | 961 | /* the next link training setting in this case |
@@ -990,7 +988,7 @@ enum link_training_result dc_link_dp_perform_link_training( | |||
990 | } | 988 | } |
991 | 989 | ||
992 | /* Connectivity log: link training */ | 990 | /* Connectivity log: link training */ |
993 | CONN_MSG_LT(core_link, "%sx%d %s VS=%d, PE=%d", | 991 | CONN_MSG_LT(link, "%sx%d %s VS=%d, PE=%d", |
994 | link_rate, | 992 | link_rate, |
995 | lt_settings.link_settings.lane_count, | 993 | lt_settings.link_settings.lane_count, |
996 | (status == LINK_TRAINING_SUCCESS) ? "pass" : | 994 | (status == LINK_TRAINING_SUCCESS) ? "pass" : |
@@ -1004,7 +1002,7 @@ enum link_training_result dc_link_dp_perform_link_training( | |||
1004 | 1002 | ||
1005 | 1003 | ||
1006 | bool perform_link_training_with_retries( | 1004 | bool perform_link_training_with_retries( |
1007 | struct core_link *link, | 1005 | struct dc_link *link, |
1008 | const struct dc_link_settings *link_setting, | 1006 | const struct dc_link_settings *link_setting, |
1009 | bool skip_video_pattern, | 1007 | bool skip_video_pattern, |
1010 | int attempts) | 1008 | int attempts) |
@@ -1015,7 +1013,7 @@ bool perform_link_training_with_retries( | |||
1015 | for (j = 0; j < attempts; ++j) { | 1013 | for (j = 0; j < attempts; ++j) { |
1016 | 1014 | ||
1017 | if (dc_link_dp_perform_link_training( | 1015 | if (dc_link_dp_perform_link_training( |
1018 | &link->public, | 1016 | link, |
1019 | link_setting, | 1017 | link_setting, |
1020 | skip_video_pattern) == LINK_TRAINING_SUCCESS) | 1018 | skip_video_pattern) == LINK_TRAINING_SUCCESS) |
1021 | return true; | 1019 | return true; |
@@ -1027,7 +1025,7 @@ bool perform_link_training_with_retries( | |||
1027 | return false; | 1025 | return false; |
1028 | } | 1026 | } |
1029 | 1027 | ||
1030 | static struct dc_link_settings get_max_link_cap(struct core_link *link) | 1028 | static struct dc_link_settings get_max_link_cap(struct dc_link *link) |
1031 | { | 1029 | { |
1032 | /* Set Default link settings */ | 1030 | /* Set Default link settings */ |
1033 | struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH, | 1031 | struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH, |
@@ -1041,21 +1039,21 @@ static struct dc_link_settings get_max_link_cap(struct core_link *link) | |||
1041 | max_link_cap.link_rate = LINK_RATE_HIGH3; | 1039 | max_link_cap.link_rate = LINK_RATE_HIGH3; |
1042 | 1040 | ||
1043 | /* Lower link settings based on sink's link cap */ | 1041 | /* Lower link settings based on sink's link cap */ |
1044 | if (link->public.reported_link_cap.lane_count < max_link_cap.lane_count) | 1042 | if (link->reported_link_cap.lane_count < max_link_cap.lane_count) |
1045 | max_link_cap.lane_count = | 1043 | max_link_cap.lane_count = |
1046 | link->public.reported_link_cap.lane_count; | 1044 | link->reported_link_cap.lane_count; |
1047 | if (link->public.reported_link_cap.link_rate < max_link_cap.link_rate) | 1045 | if (link->reported_link_cap.link_rate < max_link_cap.link_rate) |
1048 | max_link_cap.link_rate = | 1046 | max_link_cap.link_rate = |
1049 | link->public.reported_link_cap.link_rate; | 1047 | link->reported_link_cap.link_rate; |
1050 | if (link->public.reported_link_cap.link_spread < | 1048 | if (link->reported_link_cap.link_spread < |
1051 | max_link_cap.link_spread) | 1049 | max_link_cap.link_spread) |
1052 | max_link_cap.link_spread = | 1050 | max_link_cap.link_spread = |
1053 | link->public.reported_link_cap.link_spread; | 1051 | link->reported_link_cap.link_spread; |
1054 | return max_link_cap; | 1052 | return max_link_cap; |
1055 | } | 1053 | } |
1056 | 1054 | ||
1057 | bool dp_hbr_verify_link_cap( | 1055 | bool dp_hbr_verify_link_cap( |
1058 | struct core_link *link, | 1056 | struct dc_link *link, |
1059 | struct dc_link_settings *known_limit_link_setting) | 1057 | struct dc_link_settings *known_limit_link_setting) |
1060 | { | 1058 | { |
1061 | struct dc_link_settings max_link_cap = {0}; | 1059 | struct dc_link_settings max_link_cap = {0}; |
@@ -1080,7 +1078,7 @@ bool dp_hbr_verify_link_cap( | |||
1080 | * find the physical link capability | 1078 | * find the physical link capability |
1081 | */ | 1079 | */ |
1082 | /* disable PHY done possible by BIOS, will be done by driver itself */ | 1080 | /* disable PHY done possible by BIOS, will be done by driver itself */ |
1083 | dp_disable_link_phy(link, link->public.connector_signal); | 1081 | dp_disable_link_phy(link, link->connector_signal); |
1084 | 1082 | ||
1085 | dp_cs = link->dc->res_pool->dp_clock_source; | 1083 | dp_cs = link->dc->res_pool->dp_clock_source; |
1086 | 1084 | ||
@@ -1109,7 +1107,7 @@ bool dp_hbr_verify_link_cap( | |||
1109 | 1107 | ||
1110 | dp_enable_link_phy( | 1108 | dp_enable_link_phy( |
1111 | link, | 1109 | link, |
1112 | link->public.connector_signal, | 1110 | link->connector_signal, |
1113 | dp_cs_id, | 1111 | dp_cs_id, |
1114 | cur); | 1112 | cur); |
1115 | 1113 | ||
@@ -1117,7 +1115,7 @@ bool dp_hbr_verify_link_cap( | |||
1117 | success = true; | 1115 | success = true; |
1118 | else { | 1116 | else { |
1119 | status = dc_link_dp_perform_link_training( | 1117 | status = dc_link_dp_perform_link_training( |
1120 | &link->public, | 1118 | link, |
1121 | cur, | 1119 | cur, |
1122 | skip_video_pattern); | 1120 | skip_video_pattern); |
1123 | if (status == LINK_TRAINING_SUCCESS) | 1121 | if (status == LINK_TRAINING_SUCCESS) |
@@ -1125,13 +1123,13 @@ bool dp_hbr_verify_link_cap( | |||
1125 | } | 1123 | } |
1126 | 1124 | ||
1127 | if (success) | 1125 | if (success) |
1128 | link->public.verified_link_cap = *cur; | 1126 | link->verified_link_cap = *cur; |
1129 | 1127 | ||
1130 | /* always disable the link before trying another | 1128 | /* always disable the link before trying another |
1131 | * setting or before returning we'll enable it later | 1129 | * setting or before returning we'll enable it later |
1132 | * based on the actual mode we're driving | 1130 | * based on the actual mode we're driving |
1133 | */ | 1131 | */ |
1134 | dp_disable_link_phy(link, link->public.connector_signal); | 1132 | dp_disable_link_phy(link, link->connector_signal); |
1135 | } while (!success && decide_fallback_link_setting( | 1133 | } while (!success && decide_fallback_link_setting( |
1136 | initial_link_settings, cur, status)); | 1134 | initial_link_settings, cur, status)); |
1137 | 1135 | ||
@@ -1142,14 +1140,14 @@ bool dp_hbr_verify_link_cap( | |||
1142 | /* If all LT fails for all settings, | 1140 | /* If all LT fails for all settings, |
1143 | * set verified = failed safe (1 lane low) | 1141 | * set verified = failed safe (1 lane low) |
1144 | */ | 1142 | */ |
1145 | link->public.verified_link_cap.lane_count = LANE_COUNT_ONE; | 1143 | link->verified_link_cap.lane_count = LANE_COUNT_ONE; |
1146 | link->public.verified_link_cap.link_rate = LINK_RATE_LOW; | 1144 | link->verified_link_cap.link_rate = LINK_RATE_LOW; |
1147 | 1145 | ||
1148 | link->public.verified_link_cap.link_spread = | 1146 | link->verified_link_cap.link_spread = |
1149 | LINK_SPREAD_DISABLED; | 1147 | LINK_SPREAD_DISABLED; |
1150 | } | 1148 | } |
1151 | 1149 | ||
1152 | link->public.max_link_setting = link->public.verified_link_cap; | 1150 | link->max_link_setting = link->verified_link_cap; |
1153 | 1151 | ||
1154 | return success; | 1152 | return success; |
1155 | } | 1153 | } |
@@ -1391,7 +1389,7 @@ static uint32_t bandwidth_in_kbps_from_link_settings( | |||
1391 | } | 1389 | } |
1392 | 1390 | ||
1393 | bool dp_validate_mode_timing( | 1391 | bool dp_validate_mode_timing( |
1394 | struct core_link *link, | 1392 | struct dc_link *link, |
1395 | const struct dc_crtc_timing *timing) | 1393 | const struct dc_crtc_timing *timing) |
1396 | { | 1394 | { |
1397 | uint32_t req_bw; | 1395 | uint32_t req_bw; |
@@ -1406,12 +1404,12 @@ bool dp_validate_mode_timing( | |||
1406 | return true; | 1404 | return true; |
1407 | 1405 | ||
1408 | /* We always use verified link settings */ | 1406 | /* We always use verified link settings */ |
1409 | link_setting = &link->public.verified_link_cap; | 1407 | link_setting = &link->verified_link_cap; |
1410 | 1408 | ||
1411 | /* TODO: DYNAMIC_VALIDATION needs to be implemented */ | 1409 | /* TODO: DYNAMIC_VALIDATION needs to be implemented */ |
1412 | /*if (flags.DYNAMIC_VALIDATION == 1 && | 1410 | /*if (flags.DYNAMIC_VALIDATION == 1 && |
1413 | link->public.verified_link_cap.lane_count != LANE_COUNT_UNKNOWN) | 1411 | link->verified_link_cap.lane_count != LANE_COUNT_UNKNOWN) |
1414 | link_setting = &link->public.verified_link_cap; | 1412 | link_setting = &link->verified_link_cap; |
1415 | */ | 1413 | */ |
1416 | 1414 | ||
1417 | req_bw = bandwidth_in_kbps_from_timing(timing); | 1415 | req_bw = bandwidth_in_kbps_from_timing(timing); |
@@ -1444,7 +1442,7 @@ void decide_link_settings(struct core_stream *stream, | |||
1444 | LANE_COUNT_ONE, LINK_RATE_LOW, LINK_SPREAD_DISABLED}; | 1442 | LANE_COUNT_ONE, LINK_RATE_LOW, LINK_SPREAD_DISABLED}; |
1445 | struct dc_link_settings current_link_setting = | 1443 | struct dc_link_settings current_link_setting = |
1446 | initial_link_setting; | 1444 | initial_link_setting; |
1447 | struct core_link* link; | 1445 | struct dc_link *link; |
1448 | uint32_t req_bw; | 1446 | uint32_t req_bw; |
1449 | uint32_t link_bw; | 1447 | uint32_t link_bw; |
1450 | 1448 | ||
@@ -1456,11 +1454,11 @@ void decide_link_settings(struct core_stream *stream, | |||
1456 | /* if preferred is specified through AMDDP, use it, if it's enough | 1454 | /* if preferred is specified through AMDDP, use it, if it's enough |
1457 | * to drive the mode | 1455 | * to drive the mode |
1458 | */ | 1456 | */ |
1459 | if (link->public.preferred_link_setting.lane_count != | 1457 | if (link->preferred_link_setting.lane_count != |
1460 | LANE_COUNT_UNKNOWN && | 1458 | LANE_COUNT_UNKNOWN && |
1461 | link->public.preferred_link_setting.link_rate != | 1459 | link->preferred_link_setting.link_rate != |
1462 | LINK_RATE_UNKNOWN) { | 1460 | LINK_RATE_UNKNOWN) { |
1463 | *link_setting = link->public.preferred_link_setting; | 1461 | *link_setting = link->preferred_link_setting; |
1464 | return; | 1462 | return; |
1465 | } | 1463 | } |
1466 | 1464 | ||
@@ -1469,7 +1467,7 @@ void decide_link_settings(struct core_stream *stream, | |||
1469 | * 2. could support the b/w requested by the timing | 1467 | * 2. could support the b/w requested by the timing |
1470 | */ | 1468 | */ |
1471 | while (current_link_setting.link_rate <= | 1469 | while (current_link_setting.link_rate <= |
1472 | link->public.max_link_setting.link_rate) { | 1470 | link->max_link_setting.link_rate) { |
1473 | link_bw = bandwidth_in_kbps_from_link_settings( | 1471 | link_bw = bandwidth_in_kbps_from_link_settings( |
1474 | ¤t_link_setting); | 1472 | ¤t_link_setting); |
1475 | if (req_bw <= link_bw) { | 1473 | if (req_bw <= link_bw) { |
@@ -1478,7 +1476,7 @@ void decide_link_settings(struct core_stream *stream, | |||
1478 | } | 1476 | } |
1479 | 1477 | ||
1480 | if (current_link_setting.lane_count < | 1478 | if (current_link_setting.lane_count < |
1481 | link->public.max_link_setting.lane_count) { | 1479 | link->max_link_setting.lane_count) { |
1482 | current_link_setting.lane_count = | 1480 | current_link_setting.lane_count = |
1483 | increase_lane_count( | 1481 | increase_lane_count( |
1484 | current_link_setting.lane_count); | 1482 | current_link_setting.lane_count); |
@@ -1492,16 +1490,15 @@ void decide_link_settings(struct core_stream *stream, | |||
1492 | } | 1490 | } |
1493 | 1491 | ||
1494 | BREAK_TO_DEBUGGER(); | 1492 | BREAK_TO_DEBUGGER(); |
1495 | ASSERT(link->public.verified_link_cap.lane_count != | 1493 | ASSERT(link->verified_link_cap.lane_count != LANE_COUNT_UNKNOWN); |
1496 | LANE_COUNT_UNKNOWN); | ||
1497 | 1494 | ||
1498 | *link_setting = link->public.verified_link_cap; | 1495 | *link_setting = link->verified_link_cap; |
1499 | } | 1496 | } |
1500 | 1497 | ||
1501 | /*************************Short Pulse IRQ***************************/ | 1498 | /*************************Short Pulse IRQ***************************/ |
1502 | 1499 | ||
1503 | static bool hpd_rx_irq_check_link_loss_status( | 1500 | static bool hpd_rx_irq_check_link_loss_status( |
1504 | struct core_link *link, | 1501 | struct dc_link *link, |
1505 | union hpd_irq_data *hpd_irq_dpcd_data) | 1502 | union hpd_irq_data *hpd_irq_dpcd_data) |
1506 | { | 1503 | { |
1507 | uint8_t irq_reg_rx_power_state; | 1504 | uint8_t irq_reg_rx_power_state; |
@@ -1514,7 +1511,7 @@ static bool hpd_rx_irq_check_link_loss_status( | |||
1514 | sink_status_changed = false; | 1511 | sink_status_changed = false; |
1515 | return_code = false; | 1512 | return_code = false; |
1516 | 1513 | ||
1517 | if (link->public.cur_link_settings.lane_count == 0) | 1514 | if (link->cur_link_settings.lane_count == 0) |
1518 | return return_code; | 1515 | return return_code; |
1519 | /*1. Check that we can handle interrupt: Not in FS DOS, | 1516 | /*1. Check that we can handle interrupt: Not in FS DOS, |
1520 | * Not in "Display Timeout" state, Link is trained. | 1517 | * Not in "Display Timeout" state, Link is trained. |
@@ -1538,7 +1535,7 @@ static bool hpd_rx_irq_check_link_loss_status( | |||
1538 | 1535 | ||
1539 | /*parse lane status*/ | 1536 | /*parse lane status*/ |
1540 | for (lane = 0; | 1537 | for (lane = 0; |
1541 | lane < link->public.cur_link_settings.lane_count; | 1538 | lane < link->cur_link_settings.lane_count; |
1542 | lane++) { | 1539 | lane++) { |
1543 | 1540 | ||
1544 | /* check status of lanes 0,1 | 1541 | /* check status of lanes 0,1 |
@@ -1577,7 +1574,7 @@ static bool hpd_rx_irq_check_link_loss_status( | |||
1577 | } | 1574 | } |
1578 | 1575 | ||
1579 | static enum dc_status read_hpd_rx_irq_data( | 1576 | static enum dc_status read_hpd_rx_irq_data( |
1580 | struct core_link *link, | 1577 | struct dc_link *link, |
1581 | union hpd_irq_data *irq_data) | 1578 | union hpd_irq_data *irq_data) |
1582 | { | 1579 | { |
1583 | /* The HW reads 16 bytes from 200h on HPD, | 1580 | /* The HW reads 16 bytes from 200h on HPD, |
@@ -1593,7 +1590,7 @@ static enum dc_status read_hpd_rx_irq_data( | |||
1593 | sizeof(union hpd_irq_data)); | 1590 | sizeof(union hpd_irq_data)); |
1594 | } | 1591 | } |
1595 | 1592 | ||
1596 | static bool allow_hpd_rx_irq(const struct core_link *link) | 1593 | static bool allow_hpd_rx_irq(const struct dc_link *link) |
1597 | { | 1594 | { |
1598 | /* | 1595 | /* |
1599 | * Don't handle RX IRQ unless one of following is met: | 1596 | * Don't handle RX IRQ unless one of following is met: |
@@ -1602,15 +1599,15 @@ static bool allow_hpd_rx_irq(const struct core_link *link) | |||
1602 | * 3) We know we're dealing with an active dongle | 1599 | * 3) We know we're dealing with an active dongle |
1603 | */ | 1600 | */ |
1604 | 1601 | ||
1605 | if ((link->public.cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) || | 1602 | if ((link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) || |
1606 | (link->public.type == dc_connection_mst_branch) || | 1603 | (link->type == dc_connection_mst_branch) || |
1607 | is_dp_active_dongle(link)) | 1604 | is_dp_active_dongle(link)) |
1608 | return true; | 1605 | return true; |
1609 | 1606 | ||
1610 | return false; | 1607 | return false; |
1611 | } | 1608 | } |
1612 | 1609 | ||
1613 | static bool handle_hpd_irq_psr_sink(const struct core_link *link) | 1610 | static bool handle_hpd_irq_psr_sink(const struct dc_link *link) |
1614 | { | 1611 | { |
1615 | union dpcd_psr_configuration psr_configuration; | 1612 | union dpcd_psr_configuration psr_configuration; |
1616 | 1613 | ||
@@ -1619,7 +1616,7 @@ static bool handle_hpd_irq_psr_sink(const struct core_link *link) | |||
1619 | 1616 | ||
1620 | dm_helpers_dp_read_dpcd( | 1617 | dm_helpers_dp_read_dpcd( |
1621 | link->ctx, | 1618 | link->ctx, |
1622 | &link->public, | 1619 | link, |
1623 | 368,/*DpcdAddress_PSR_Enable_Cfg*/ | 1620 | 368,/*DpcdAddress_PSR_Enable_Cfg*/ |
1624 | &psr_configuration.raw, | 1621 | &psr_configuration.raw, |
1625 | sizeof(psr_configuration.raw)); | 1622 | sizeof(psr_configuration.raw)); |
@@ -1632,7 +1629,7 @@ static bool handle_hpd_irq_psr_sink(const struct core_link *link) | |||
1632 | 1629 | ||
1633 | dm_helpers_dp_read_dpcd( | 1630 | dm_helpers_dp_read_dpcd( |
1634 | link->ctx, | 1631 | link->ctx, |
1635 | &link->public, | 1632 | link, |
1636 | 0x2006, /*DpcdAddress_PSR_Error_Status*/ | 1633 | 0x2006, /*DpcdAddress_PSR_Error_Status*/ |
1637 | (unsigned char *) dpcdbuf, | 1634 | (unsigned char *) dpcdbuf, |
1638 | sizeof(dpcdbuf)); | 1635 | sizeof(dpcdbuf)); |
@@ -1647,14 +1644,14 @@ static bool handle_hpd_irq_psr_sink(const struct core_link *link) | |||
1647 | /* Acknowledge and clear error bits */ | 1644 | /* Acknowledge and clear error bits */ |
1648 | dm_helpers_dp_write_dpcd( | 1645 | dm_helpers_dp_write_dpcd( |
1649 | link->ctx, | 1646 | link->ctx, |
1650 | &link->public, | 1647 | link, |
1651 | 8198,/*DpcdAddress_PSR_Error_Status*/ | 1648 | 8198,/*DpcdAddress_PSR_Error_Status*/ |
1652 | &psr_error_status.raw, | 1649 | &psr_error_status.raw, |
1653 | sizeof(psr_error_status.raw)); | 1650 | sizeof(psr_error_status.raw)); |
1654 | 1651 | ||
1655 | /* PSR error, disable and re-enable PSR */ | 1652 | /* PSR error, disable and re-enable PSR */ |
1656 | dc_link_set_psr_enable(&link->public, false); | 1653 | dc_link_set_psr_enable(link, false); |
1657 | dc_link_set_psr_enable(&link->public, true); | 1654 | dc_link_set_psr_enable(link, true); |
1658 | 1655 | ||
1659 | return true; | 1656 | return true; |
1660 | } else if (psr_sink_psr_status.bits.SINK_SELF_REFRESH_STATUS == | 1657 | } else if (psr_sink_psr_status.bits.SINK_SELF_REFRESH_STATUS == |
@@ -1670,7 +1667,7 @@ static bool handle_hpd_irq_psr_sink(const struct core_link *link) | |||
1670 | return false; | 1667 | return false; |
1671 | } | 1668 | } |
1672 | 1669 | ||
1673 | static void dp_test_send_link_training(struct core_link *link) | 1670 | static void dp_test_send_link_training(struct dc_link *link) |
1674 | { | 1671 | { |
1675 | struct dc_link_settings link_settings = {0}; | 1672 | struct dc_link_settings link_settings = {0}; |
1676 | 1673 | ||
@@ -1686,13 +1683,13 @@ static void dp_test_send_link_training(struct core_link *link) | |||
1686 | 1); | 1683 | 1); |
1687 | 1684 | ||
1688 | /* Set preferred link settings */ | 1685 | /* Set preferred link settings */ |
1689 | link->public.verified_link_cap.lane_count = link_settings.lane_count; | 1686 | link->verified_link_cap.lane_count = link_settings.lane_count; |
1690 | link->public.verified_link_cap.link_rate = link_settings.link_rate; | 1687 | link->verified_link_cap.link_rate = link_settings.link_rate; |
1691 | 1688 | ||
1692 | dp_retrain_link_dp_test(link, &link_settings, false); | 1689 | dp_retrain_link_dp_test(link, &link_settings, false); |
1693 | } | 1690 | } |
1694 | 1691 | ||
1695 | static void dp_test_send_phy_test_pattern(struct core_link *link) | 1692 | static void dp_test_send_phy_test_pattern(struct dc_link *link) |
1696 | { | 1693 | { |
1697 | union phy_test_pattern dpcd_test_pattern; | 1694 | union phy_test_pattern dpcd_test_pattern; |
1698 | union lane_adjust dpcd_lane_adjustment[2]; | 1695 | union lane_adjust dpcd_lane_adjustment[2]; |
@@ -1771,10 +1768,10 @@ static void dp_test_send_phy_test_pattern(struct core_link *link) | |||
1771 | sizeof(test_80_bit_pattern)); | 1768 | sizeof(test_80_bit_pattern)); |
1772 | 1769 | ||
1773 | /* prepare link training settings */ | 1770 | /* prepare link training settings */ |
1774 | link_settings.link = link->public.cur_link_settings; | 1771 | link_settings.link = link->cur_link_settings; |
1775 | 1772 | ||
1776 | for (lane = 0; lane < | 1773 | for (lane = 0; lane < |
1777 | (unsigned int)(link->public.cur_link_settings.lane_count); | 1774 | (unsigned int)(link->cur_link_settings.lane_count); |
1778 | lane++) { | 1775 | lane++) { |
1779 | dpcd_lane_adjust.raw = | 1776 | dpcd_lane_adjust.raw = |
1780 | get_nibble_at_index(&dpcd_lane_adjustment[0].raw, lane); | 1777 | get_nibble_at_index(&dpcd_lane_adjustment[0].raw, lane); |
@@ -1802,7 +1799,7 @@ static void dp_test_send_phy_test_pattern(struct core_link *link) | |||
1802 | * forward request to DS | 1799 | * forward request to DS |
1803 | */ | 1800 | */ |
1804 | dc_link_dp_set_test_pattern( | 1801 | dc_link_dp_set_test_pattern( |
1805 | &link->public, | 1802 | link, |
1806 | test_pattern, | 1803 | test_pattern, |
1807 | &link_training_settings, | 1804 | &link_training_settings, |
1808 | test_80_bit_pattern, | 1805 | test_80_bit_pattern, |
@@ -1810,7 +1807,7 @@ static void dp_test_send_phy_test_pattern(struct core_link *link) | |||
1810 | DP_TEST_80BIT_CUSTOM_PATTERN_7_0)+1); | 1807 | DP_TEST_80BIT_CUSTOM_PATTERN_7_0)+1); |
1811 | } | 1808 | } |
1812 | 1809 | ||
1813 | static void dp_test_send_link_test_pattern(struct core_link *link) | 1810 | static void dp_test_send_link_test_pattern(struct dc_link *link) |
1814 | { | 1811 | { |
1815 | union link_test_pattern dpcd_test_pattern; | 1812 | union link_test_pattern dpcd_test_pattern; |
1816 | union test_misc dpcd_test_params; | 1813 | union test_misc dpcd_test_params; |
@@ -1850,14 +1847,14 @@ static void dp_test_send_link_test_pattern(struct core_link *link) | |||
1850 | } | 1847 | } |
1851 | 1848 | ||
1852 | dc_link_dp_set_test_pattern( | 1849 | dc_link_dp_set_test_pattern( |
1853 | &link->public, | 1850 | link, |
1854 | test_pattern, | 1851 | test_pattern, |
1855 | NULL, | 1852 | NULL, |
1856 | NULL, | 1853 | NULL, |
1857 | 0); | 1854 | 0); |
1858 | } | 1855 | } |
1859 | 1856 | ||
1860 | static void handle_automated_test(struct core_link *link) | 1857 | static void handle_automated_test(struct dc_link *link) |
1861 | { | 1858 | { |
1862 | union test_request test_request; | 1859 | union test_request test_request; |
1863 | union test_response test_response; | 1860 | union test_response test_response; |
@@ -1904,9 +1901,8 @@ static void handle_automated_test(struct core_link *link) | |||
1904 | sizeof(test_response)); | 1901 | sizeof(test_response)); |
1905 | } | 1902 | } |
1906 | 1903 | ||
1907 | bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link, union hpd_irq_data *out_hpd_irq_dpcd_data) | 1904 | bool dc_link_handle_hpd_rx_irq(struct dc_link *link, union hpd_irq_data *out_hpd_irq_dpcd_data) |
1908 | { | 1905 | { |
1909 | struct core_link *link = DC_LINK_TO_LINK(dc_link); | ||
1910 | union hpd_irq_data hpd_irq_dpcd_data = {{{{0}}}}; | 1906 | union hpd_irq_data hpd_irq_dpcd_data = {{{{0}}}}; |
1911 | union device_service_irq device_service_clear = { { 0 } }; | 1907 | union device_service_irq device_service_clear = { { 0 } }; |
1912 | enum dc_status result = DDC_RESULT_UNKNOWN; | 1908 | enum dc_status result = DDC_RESULT_UNKNOWN; |
@@ -1917,7 +1913,7 @@ bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link, union hpd_irq_data | |||
1917 | 1913 | ||
1918 | dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ, | 1914 | dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ, |
1919 | "%s: Got short pulse HPD on link %d\n", | 1915 | "%s: Got short pulse HPD on link %d\n", |
1920 | __func__, link->public.link_index); | 1916 | __func__, link->link_index); |
1921 | 1917 | ||
1922 | 1918 | ||
1923 | /* All the "handle_hpd_irq_xxx()" methods | 1919 | /* All the "handle_hpd_irq_xxx()" methods |
@@ -1951,7 +1947,7 @@ bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link, union hpd_irq_data | |||
1951 | if (!allow_hpd_rx_irq(link)) { | 1947 | if (!allow_hpd_rx_irq(link)) { |
1952 | dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ, | 1948 | dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ, |
1953 | "%s: skipping HPD handling on %d\n", | 1949 | "%s: skipping HPD handling on %d\n", |
1954 | __func__, link->public.link_index); | 1950 | __func__, link->link_index); |
1955 | return false; | 1951 | return false; |
1956 | } | 1952 | } |
1957 | 1953 | ||
@@ -1984,13 +1980,13 @@ bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link, union hpd_irq_data | |||
1984 | "Status: "); | 1980 | "Status: "); |
1985 | 1981 | ||
1986 | perform_link_training_with_retries(link, | 1982 | perform_link_training_with_retries(link, |
1987 | &link->public.cur_link_settings, | 1983 | &link->cur_link_settings, |
1988 | true, LINK_TRAINING_ATTEMPTS); | 1984 | true, LINK_TRAINING_ATTEMPTS); |
1989 | 1985 | ||
1990 | status = false; | 1986 | status = false; |
1991 | } | 1987 | } |
1992 | 1988 | ||
1993 | if (link->public.type == dc_connection_active_dongle && | 1989 | if (link->type == dc_connection_active_dongle && |
1994 | hpd_irq_dpcd_data.bytes.sink_cnt.bits.SINK_COUNT | 1990 | hpd_irq_dpcd_data.bytes.sink_cnt.bits.SINK_COUNT |
1995 | != link->dpcd_sink_count) | 1991 | != link->dpcd_sink_count) |
1996 | status = true; | 1992 | status = true; |
@@ -2010,7 +2006,7 @@ bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link, union hpd_irq_data | |||
2010 | } | 2006 | } |
2011 | 2007 | ||
2012 | /*query dpcd for version and mst cap addresses*/ | 2008 | /*query dpcd for version and mst cap addresses*/ |
2013 | bool is_mst_supported(struct core_link *link) | 2009 | bool is_mst_supported(struct dc_link *link) |
2014 | { | 2010 | { |
2015 | bool mst = false; | 2011 | bool mst = false; |
2016 | enum dc_status st = DC_OK; | 2012 | enum dc_status st = DC_OK; |
@@ -2034,7 +2030,7 @@ bool is_mst_supported(struct core_link *link) | |||
2034 | 2030 | ||
2035 | } | 2031 | } |
2036 | 2032 | ||
2037 | bool is_dp_active_dongle(const struct core_link *link) | 2033 | bool is_dp_active_dongle(const struct dc_link *link) |
2038 | { | 2034 | { |
2039 | enum display_dongle_type dongle_type = link->dpcd_caps.dongle_type; | 2035 | enum display_dongle_type dongle_type = link->dpcd_caps.dongle_type; |
2040 | 2036 | ||
@@ -2044,14 +2040,14 @@ bool is_dp_active_dongle(const struct core_link *link) | |||
2044 | } | 2040 | } |
2045 | 2041 | ||
2046 | static void get_active_converter_info( | 2042 | static void get_active_converter_info( |
2047 | uint8_t data, struct core_link *link) | 2043 | uint8_t data, struct dc_link *link) |
2048 | { | 2044 | { |
2049 | union dp_downstream_port_present ds_port = { .byte = data }; | 2045 | union dp_downstream_port_present ds_port = { .byte = data }; |
2050 | 2046 | ||
2051 | /* decode converter info*/ | 2047 | /* decode converter info*/ |
2052 | if (!ds_port.fields.PORT_PRESENT) { | 2048 | if (!ds_port.fields.PORT_PRESENT) { |
2053 | link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE; | 2049 | link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE; |
2054 | ddc_service_set_dongle_type(link->public.ddc, | 2050 | ddc_service_set_dongle_type(link->ddc, |
2055 | link->dpcd_caps.dongle_type); | 2051 | link->dpcd_caps.dongle_type); |
2056 | return; | 2052 | return; |
2057 | } | 2053 | } |
@@ -2121,7 +2117,7 @@ static void get_active_converter_info( | |||
2121 | } | 2117 | } |
2122 | } | 2118 | } |
2123 | 2119 | ||
2124 | ddc_service_set_dongle_type(link->public.ddc, link->dpcd_caps.dongle_type); | 2120 | ddc_service_set_dongle_type(link->ddc, link->dpcd_caps.dongle_type); |
2125 | 2121 | ||
2126 | { | 2122 | { |
2127 | struct dp_device_vendor_id dp_id; | 2123 | struct dp_device_vendor_id dp_id; |
@@ -2158,7 +2154,7 @@ static void get_active_converter_info( | |||
2158 | } | 2154 | } |
2159 | } | 2155 | } |
2160 | 2156 | ||
2161 | static void dp_wa_power_up_0010FA(struct core_link *link, uint8_t *dpcd_data, | 2157 | static void dp_wa_power_up_0010FA(struct dc_link *link, uint8_t *dpcd_data, |
2162 | int length) | 2158 | int length) |
2163 | { | 2159 | { |
2164 | int retry = 0; | 2160 | int retry = 0; |
@@ -2199,7 +2195,7 @@ static void dp_wa_power_up_0010FA(struct core_link *link, uint8_t *dpcd_data, | |||
2199 | link->wa_flags.dp_keep_receiver_powered = false; | 2195 | link->wa_flags.dp_keep_receiver_powered = false; |
2200 | } | 2196 | } |
2201 | 2197 | ||
2202 | static void retrieve_link_cap(struct core_link *link) | 2198 | static void retrieve_link_cap(struct dc_link *link) |
2203 | { | 2199 | { |
2204 | uint8_t dpcd_data[DP_TRAINING_AUX_RD_INTERVAL - DP_DPCD_REV + 1]; | 2200 | uint8_t dpcd_data[DP_TRAINING_AUX_RD_INTERVAL - DP_DPCD_REV + 1]; |
2205 | 2201 | ||
@@ -2253,11 +2249,11 @@ static void retrieve_link_cap(struct core_link *link) | |||
2253 | link->dpcd_caps.max_down_spread.raw = dpcd_data[ | 2249 | link->dpcd_caps.max_down_spread.raw = dpcd_data[ |
2254 | DP_MAX_DOWNSPREAD - DP_DPCD_REV]; | 2250 | DP_MAX_DOWNSPREAD - DP_DPCD_REV]; |
2255 | 2251 | ||
2256 | link->public.reported_link_cap.lane_count = | 2252 | link->reported_link_cap.lane_count = |
2257 | link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT; | 2253 | link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT; |
2258 | link->public.reported_link_cap.link_rate = dpcd_data[ | 2254 | link->reported_link_cap.link_rate = dpcd_data[ |
2259 | DP_MAX_LINK_RATE - DP_DPCD_REV]; | 2255 | DP_MAX_LINK_RATE - DP_DPCD_REV]; |
2260 | link->public.reported_link_cap.link_spread = | 2256 | link->reported_link_cap.link_spread = |
2261 | link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ? | 2257 | link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ? |
2262 | LINK_SPREAD_05_DOWNSPREAD_30KHZ : LINK_SPREAD_DISABLED; | 2258 | LINK_SPREAD_05_DOWNSPREAD_30KHZ : LINK_SPREAD_DISABLED; |
2263 | 2259 | ||
@@ -2266,8 +2262,8 @@ static void retrieve_link_cap(struct core_link *link) | |||
2266 | link->dpcd_caps.panel_mode_edp = | 2262 | link->dpcd_caps.panel_mode_edp = |
2267 | edp_config_cap.bits.ALT_SCRAMBLER_RESET; | 2263 | edp_config_cap.bits.ALT_SCRAMBLER_RESET; |
2268 | 2264 | ||
2269 | link->public.test_pattern_enabled = false; | 2265 | link->test_pattern_enabled = false; |
2270 | link->public.compliance_test_state.raw = 0; | 2266 | link->compliance_test_state.raw = 0; |
2271 | 2267 | ||
2272 | /* read sink count */ | 2268 | /* read sink count */ |
2273 | core_link_read_dpcd(link, | 2269 | core_link_read_dpcd(link, |
@@ -2279,7 +2275,7 @@ static void retrieve_link_cap(struct core_link *link) | |||
2279 | CONN_DATA_DETECT(link, dpcd_data, sizeof(dpcd_data), "Rx Caps: "); | 2275 | CONN_DATA_DETECT(link, dpcd_data, sizeof(dpcd_data), "Rx Caps: "); |
2280 | } | 2276 | } |
2281 | 2277 | ||
2282 | void detect_dp_sink_caps(struct core_link *link) | 2278 | void detect_dp_sink_caps(struct dc_link *link) |
2283 | { | 2279 | { |
2284 | retrieve_link_cap(link); | 2280 | retrieve_link_cap(link); |
2285 | 2281 | ||
@@ -2291,18 +2287,17 @@ void detect_dp_sink_caps(struct core_link *link) | |||
2291 | */ | 2287 | */ |
2292 | 2288 | ||
2293 | if (is_mst_supported(link)) { | 2289 | if (is_mst_supported(link)) { |
2294 | link->public.verified_link_cap = link->public.reported_link_cap; | 2290 | link->verified_link_cap = link->reported_link_cap; |
2295 | } else { | 2291 | } else { |
2296 | dp_hbr_verify_link_cap(link, | 2292 | dp_hbr_verify_link_cap(link, |
2297 | &link->public.reported_link_cap); | 2293 | &link->reported_link_cap); |
2298 | } | 2294 | } |
2299 | /* TODO save sink caps in link->sink */ | 2295 | /* TODO save sink caps in link->sink */ |
2300 | } | 2296 | } |
2301 | 2297 | ||
2302 | void dc_link_dp_enable_hpd(const struct dc_link *link) | 2298 | void dc_link_dp_enable_hpd(const struct dc_link *link) |
2303 | { | 2299 | { |
2304 | struct core_link *core_link = DC_LINK_TO_CORE(link); | 2300 | struct link_encoder *encoder = link->link_enc; |
2305 | struct link_encoder *encoder = core_link->link_enc; | ||
2306 | 2301 | ||
2307 | if (encoder != NULL && encoder->funcs->enable_hpd != NULL) | 2302 | if (encoder != NULL && encoder->funcs->enable_hpd != NULL) |
2308 | encoder->funcs->enable_hpd(encoder); | 2303 | encoder->funcs->enable_hpd(encoder); |
@@ -2310,8 +2305,7 @@ void dc_link_dp_enable_hpd(const struct dc_link *link) | |||
2310 | 2305 | ||
2311 | void dc_link_dp_disable_hpd(const struct dc_link *link) | 2306 | void dc_link_dp_disable_hpd(const struct dc_link *link) |
2312 | { | 2307 | { |
2313 | struct core_link *core_link = DC_LINK_TO_CORE(link); | 2308 | struct link_encoder *encoder = link->link_enc; |
2314 | struct link_encoder *encoder = core_link->link_enc; | ||
2315 | 2309 | ||
2316 | if (encoder != NULL && encoder->funcs->enable_hpd != NULL) | 2310 | if (encoder != NULL && encoder->funcs->enable_hpd != NULL) |
2317 | encoder->funcs->disable_hpd(encoder); | 2311 | encoder->funcs->disable_hpd(encoder); |
@@ -2327,7 +2321,7 @@ static bool is_dp_phy_pattern(enum dp_test_pattern test_pattern) | |||
2327 | return false; | 2321 | return false; |
2328 | } | 2322 | } |
2329 | 2323 | ||
2330 | static void set_crtc_test_pattern(struct core_link *link, | 2324 | static void set_crtc_test_pattern(struct dc_link *link, |
2331 | struct pipe_ctx *pipe_ctx, | 2325 | struct pipe_ctx *pipe_ctx, |
2332 | enum dp_test_pattern test_pattern) | 2326 | enum dp_test_pattern test_pattern) |
2333 | { | 2327 | { |
@@ -2402,15 +2396,13 @@ static void set_crtc_test_pattern(struct core_link *link, | |||
2402 | } | 2396 | } |
2403 | 2397 | ||
2404 | bool dc_link_dp_set_test_pattern( | 2398 | bool dc_link_dp_set_test_pattern( |
2405 | const struct dc_link *link, | 2399 | struct dc_link *link, |
2406 | enum dp_test_pattern test_pattern, | 2400 | enum dp_test_pattern test_pattern, |
2407 | const struct link_training_settings *p_link_settings, | 2401 | const struct link_training_settings *p_link_settings, |
2408 | const unsigned char *p_custom_pattern, | 2402 | const unsigned char *p_custom_pattern, |
2409 | unsigned int cust_pattern_size) | 2403 | unsigned int cust_pattern_size) |
2410 | { | 2404 | { |
2411 | struct core_link *core_link = DC_LINK_TO_CORE(link); | 2405 | struct pipe_ctx *pipes = link->dc->current_context->res_ctx.pipe_ctx; |
2412 | struct pipe_ctx *pipes = | ||
2413 | core_link->dc->current_context->res_ctx.pipe_ctx; | ||
2414 | struct pipe_ctx pipe_ctx = pipes[0]; | 2406 | struct pipe_ctx pipe_ctx = pipes[0]; |
2415 | unsigned int lane; | 2407 | unsigned int lane; |
2416 | unsigned int i; | 2408 | unsigned int i; |
@@ -2421,7 +2413,7 @@ bool dc_link_dp_set_test_pattern( | |||
2421 | memset(&training_pattern, 0, sizeof(training_pattern)); | 2413 | memset(&training_pattern, 0, sizeof(training_pattern)); |
2422 | 2414 | ||
2423 | for (i = 0; i < MAX_PIPES; i++) { | 2415 | for (i = 0; i < MAX_PIPES; i++) { |
2424 | if (pipes[i].stream->sink->link == core_link) { | 2416 | if (pipes[i].stream->sink->link == link) { |
2425 | pipe_ctx = pipes[i]; | 2417 | pipe_ctx = pipes[i]; |
2426 | break; | 2418 | break; |
2427 | } | 2419 | } |
@@ -2431,24 +2423,24 @@ bool dc_link_dp_set_test_pattern( | |||
2431 | * is VideoMode Reset DP Phy Test Pattern if it is currently running | 2423 | * is VideoMode Reset DP Phy Test Pattern if it is currently running |
2432 | * and request is VideoMode | 2424 | * and request is VideoMode |
2433 | */ | 2425 | */ |
2434 | if (core_link->public.test_pattern_enabled && test_pattern == | 2426 | if (link->test_pattern_enabled && test_pattern == |
2435 | DP_TEST_PATTERN_VIDEO_MODE) { | 2427 | DP_TEST_PATTERN_VIDEO_MODE) { |
2436 | /* Set CRTC Test Pattern */ | 2428 | /* Set CRTC Test Pattern */ |
2437 | set_crtc_test_pattern(core_link, &pipe_ctx, test_pattern); | 2429 | set_crtc_test_pattern(link, &pipe_ctx, test_pattern); |
2438 | dp_set_hw_test_pattern(core_link, test_pattern, | 2430 | dp_set_hw_test_pattern(link, test_pattern, |
2439 | (uint8_t *)p_custom_pattern, | 2431 | (uint8_t *)p_custom_pattern, |
2440 | (uint32_t)cust_pattern_size); | 2432 | (uint32_t)cust_pattern_size); |
2441 | 2433 | ||
2442 | /* Unblank Stream */ | 2434 | /* Unblank Stream */ |
2443 | core_link->dc->hwss.unblank_stream( | 2435 | link->dc->hwss.unblank_stream( |
2444 | &pipe_ctx, | 2436 | &pipe_ctx, |
2445 | &core_link->public.verified_link_cap); | 2437 | &link->verified_link_cap); |
2446 | /* TODO:m_pHwss->MuteAudioEndpoint | 2438 | /* TODO:m_pHwss->MuteAudioEndpoint |
2447 | * (pPathMode->pDisplayPath, false); | 2439 | * (pPathMode->pDisplayPath, false); |
2448 | */ | 2440 | */ |
2449 | 2441 | ||
2450 | /* Reset Test Pattern state */ | 2442 | /* Reset Test Pattern state */ |
2451 | core_link->public.test_pattern_enabled = false; | 2443 | link->test_pattern_enabled = false; |
2452 | 2444 | ||
2453 | return true; | 2445 | return true; |
2454 | } | 2446 | } |
@@ -2457,8 +2449,8 @@ bool dc_link_dp_set_test_pattern( | |||
2457 | if (is_dp_phy_pattern(test_pattern)) { | 2449 | if (is_dp_phy_pattern(test_pattern)) { |
2458 | /* Set DPCD Lane Settings before running test pattern */ | 2450 | /* Set DPCD Lane Settings before running test pattern */ |
2459 | if (p_link_settings != NULL) { | 2451 | if (p_link_settings != NULL) { |
2460 | dp_set_hw_lane_settings(core_link, p_link_settings); | 2452 | dp_set_hw_lane_settings(link, p_link_settings); |
2461 | dpcd_set_lane_settings(core_link, p_link_settings); | 2453 | dpcd_set_lane_settings(link, p_link_settings); |
2462 | } | 2454 | } |
2463 | 2455 | ||
2464 | /* Blank stream if running test pattern */ | 2456 | /* Blank stream if running test pattern */ |
@@ -2471,15 +2463,15 @@ bool dc_link_dp_set_test_pattern( | |||
2471 | pipes->stream_enc->funcs->dp_blank(pipe_ctx.stream_enc); | 2463 | pipes->stream_enc->funcs->dp_blank(pipe_ctx.stream_enc); |
2472 | } | 2464 | } |
2473 | 2465 | ||
2474 | dp_set_hw_test_pattern(core_link, test_pattern, | 2466 | dp_set_hw_test_pattern(link, test_pattern, |
2475 | (uint8_t *)p_custom_pattern, | 2467 | (uint8_t *)p_custom_pattern, |
2476 | (uint32_t)cust_pattern_size); | 2468 | (uint32_t)cust_pattern_size); |
2477 | 2469 | ||
2478 | if (test_pattern != DP_TEST_PATTERN_VIDEO_MODE) { | 2470 | if (test_pattern != DP_TEST_PATTERN_VIDEO_MODE) { |
2479 | /* Set Test Pattern state */ | 2471 | /* Set Test Pattern state */ |
2480 | core_link->public.test_pattern_enabled = true; | 2472 | link->test_pattern_enabled = true; |
2481 | if (p_link_settings != NULL) | 2473 | if (p_link_settings != NULL) |
2482 | dpcd_set_link_settings(core_link, | 2474 | dpcd_set_link_settings(link, |
2483 | p_link_settings); | 2475 | p_link_settings); |
2484 | } | 2476 | } |
2485 | 2477 | ||
@@ -2516,7 +2508,7 @@ bool dc_link_dp_set_test_pattern( | |||
2516 | /*TODO:&& !pPathMode->pDisplayPath->IsTargetPoweredOn()*/) | 2508 | /*TODO:&& !pPathMode->pDisplayPath->IsTargetPoweredOn()*/) |
2517 | return false; | 2509 | return false; |
2518 | 2510 | ||
2519 | if (core_link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { | 2511 | if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { |
2520 | /* tell receiver that we are sending qualification | 2512 | /* tell receiver that we are sending qualification |
2521 | * pattern DP 1.2 or later - DP receiver's link quality | 2513 | * pattern DP 1.2 or later - DP receiver's link quality |
2522 | * pattern is set using DPCD LINK_QUAL_LANEx_SET | 2514 | * pattern is set using DPCD LINK_QUAL_LANEx_SET |
@@ -2526,12 +2518,12 @@ bool dc_link_dp_set_test_pattern( | |||
2526 | link_qual_pattern[lane] = | 2518 | link_qual_pattern[lane] = |
2527 | (unsigned char)(pattern); | 2519 | (unsigned char)(pattern); |
2528 | 2520 | ||
2529 | core_link_write_dpcd(core_link, | 2521 | core_link_write_dpcd(link, |
2530 | DP_LINK_QUAL_LANE0_SET, | 2522 | DP_LINK_QUAL_LANE0_SET, |
2531 | link_qual_pattern, | 2523 | link_qual_pattern, |
2532 | sizeof(link_qual_pattern)); | 2524 | sizeof(link_qual_pattern)); |
2533 | } else if (core_link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 || | 2525 | } else if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 || |
2534 | core_link->dpcd_caps.dpcd_rev.raw == 0) { | 2526 | link->dpcd_caps.dpcd_rev.raw == 0) { |
2535 | /* tell receiver that we are sending qualification | 2527 | /* tell receiver that we are sending qualification |
2536 | * pattern DP 1.1a or earlier - DP receiver's link | 2528 | * pattern DP 1.1a or earlier - DP receiver's link |
2537 | * quality pattern is set using | 2529 | * quality pattern is set using |
@@ -2539,27 +2531,25 @@ bool dc_link_dp_set_test_pattern( | |||
2539 | * register (0x102). We will use v_1.3 when we are | 2531 | * register (0x102). We will use v_1.3 when we are |
2540 | * setting test pattern for DP 1.1. | 2532 | * setting test pattern for DP 1.1. |
2541 | */ | 2533 | */ |
2542 | core_link_read_dpcd(core_link, | 2534 | core_link_read_dpcd(link, DP_TRAINING_PATTERN_SET, |
2543 | DP_TRAINING_PATTERN_SET, | 2535 | &training_pattern.raw, |
2544 | &training_pattern.raw, | 2536 | sizeof(training_pattern)); |
2545 | sizeof(training_pattern)); | ||
2546 | training_pattern.v1_3.LINK_QUAL_PATTERN_SET = pattern; | 2537 | training_pattern.v1_3.LINK_QUAL_PATTERN_SET = pattern; |
2547 | core_link_write_dpcd(core_link, | 2538 | core_link_write_dpcd(link, DP_TRAINING_PATTERN_SET, |
2548 | DP_TRAINING_PATTERN_SET, | 2539 | &training_pattern.raw, |
2549 | &training_pattern.raw, | 2540 | sizeof(training_pattern)); |
2550 | sizeof(training_pattern)); | ||
2551 | } | 2541 | } |
2552 | } else { | 2542 | } else { |
2553 | /* CRTC Patterns */ | 2543 | /* CRTC Patterns */ |
2554 | set_crtc_test_pattern(core_link, &pipe_ctx, test_pattern); | 2544 | set_crtc_test_pattern(link, &pipe_ctx, test_pattern); |
2555 | /* Set Test Pattern state */ | 2545 | /* Set Test Pattern state */ |
2556 | core_link->public.test_pattern_enabled = true; | 2546 | link->test_pattern_enabled = true; |
2557 | } | 2547 | } |
2558 | 2548 | ||
2559 | return true; | 2549 | return true; |
2560 | } | 2550 | } |
2561 | 2551 | ||
2562 | void dp_enable_mst_on_sink(struct core_link *link, bool enable) | 2552 | void dp_enable_mst_on_sink(struct dc_link *link, bool enable) |
2563 | { | 2553 | { |
2564 | unsigned char mstmCntl; | 2554 | unsigned char mstmCntl; |
2565 | 2555 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c index 0092e70b9efd..aac2420caefa 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | |||
@@ -16,13 +16,13 @@ | |||
16 | #include "dpcd_defs.h" | 16 | #include "dpcd_defs.h" |
17 | 17 | ||
18 | enum dc_status core_link_read_dpcd( | 18 | enum dc_status core_link_read_dpcd( |
19 | struct core_link* link, | 19 | struct dc_link *link, |
20 | uint32_t address, | 20 | uint32_t address, |
21 | uint8_t *data, | 21 | uint8_t *data, |
22 | uint32_t size) | 22 | uint32_t size) |
23 | { | 23 | { |
24 | if (!dm_helpers_dp_read_dpcd(link->ctx, | 24 | if (!dm_helpers_dp_read_dpcd(link->ctx, |
25 | &link->public, | 25 | link, |
26 | address, data, size)) | 26 | address, data, size)) |
27 | return DC_ERROR_UNEXPECTED; | 27 | return DC_ERROR_UNEXPECTED; |
28 | 28 | ||
@@ -30,20 +30,20 @@ enum dc_status core_link_read_dpcd( | |||
30 | } | 30 | } |
31 | 31 | ||
32 | enum dc_status core_link_write_dpcd( | 32 | enum dc_status core_link_write_dpcd( |
33 | struct core_link* link, | 33 | struct dc_link *link, |
34 | uint32_t address, | 34 | uint32_t address, |
35 | const uint8_t *data, | 35 | const uint8_t *data, |
36 | uint32_t size) | 36 | uint32_t size) |
37 | { | 37 | { |
38 | if (!dm_helpers_dp_write_dpcd(link->ctx, | 38 | if (!dm_helpers_dp_write_dpcd(link->ctx, |
39 | &link->public, | 39 | link, |
40 | address, data, size)) | 40 | address, data, size)) |
41 | return DC_ERROR_UNEXPECTED; | 41 | return DC_ERROR_UNEXPECTED; |
42 | 42 | ||
43 | return DC_OK; | 43 | return DC_OK; |
44 | } | 44 | } |
45 | 45 | ||
46 | void dp_receiver_power_ctrl(struct core_link *link, bool on) | 46 | void dp_receiver_power_ctrl(struct dc_link *link, bool on) |
47 | { | 47 | { |
48 | uint8_t state; | 48 | uint8_t state; |
49 | 49 | ||
@@ -54,7 +54,7 @@ void dp_receiver_power_ctrl(struct core_link *link, bool on) | |||
54 | } | 54 | } |
55 | 55 | ||
56 | void dp_enable_link_phy( | 56 | void dp_enable_link_phy( |
57 | struct core_link *link, | 57 | struct dc_link *link, |
58 | enum signal_type signal, | 58 | enum signal_type signal, |
59 | enum clock_source_id clock_source, | 59 | enum clock_source_id clock_source, |
60 | const struct dc_link_settings *link_settings) | 60 | const struct dc_link_settings *link_settings) |
@@ -107,7 +107,7 @@ void dp_enable_link_phy( | |||
107 | dp_receiver_power_ctrl(link, true); | 107 | dp_receiver_power_ctrl(link, true); |
108 | } | 108 | } |
109 | 109 | ||
110 | void dp_disable_link_phy(struct core_link *link, enum signal_type signal) | 110 | void dp_disable_link_phy(struct dc_link *link, enum signal_type signal) |
111 | { | 111 | { |
112 | if (!link->wa_flags.dp_keep_receiver_powered) | 112 | if (!link->wa_flags.dp_keep_receiver_powered) |
113 | dp_receiver_power_ctrl(link, false); | 113 | dp_receiver_power_ctrl(link, false); |
@@ -120,11 +120,11 @@ void dp_disable_link_phy(struct core_link *link, enum signal_type signal) | |||
120 | link->link_enc->funcs->disable_output(link->link_enc, signal); | 120 | link->link_enc->funcs->disable_output(link->link_enc, signal); |
121 | 121 | ||
122 | /* Clear current link setting.*/ | 122 | /* Clear current link setting.*/ |
123 | memset(&link->public.cur_link_settings, 0, | 123 | memset(&link->cur_link_settings, 0, |
124 | sizeof(link->public.cur_link_settings)); | 124 | sizeof(link->cur_link_settings)); |
125 | } | 125 | } |
126 | 126 | ||
127 | void dp_disable_link_phy_mst(struct core_link *link, enum signal_type signal) | 127 | void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal) |
128 | { | 128 | { |
129 | /* MST disable link only when no stream use the link */ | 129 | /* MST disable link only when no stream use the link */ |
130 | if (link->mst_stream_alloc_table.stream_count > 0) | 130 | if (link->mst_stream_alloc_table.stream_count > 0) |
@@ -137,7 +137,7 @@ void dp_disable_link_phy_mst(struct core_link *link, enum signal_type signal) | |||
137 | } | 137 | } |
138 | 138 | ||
139 | bool dp_set_hw_training_pattern( | 139 | bool dp_set_hw_training_pattern( |
140 | struct core_link *link, | 140 | struct dc_link *link, |
141 | enum hw_dp_training_pattern pattern) | 141 | enum hw_dp_training_pattern pattern) |
142 | { | 142 | { |
143 | enum dp_test_pattern test_pattern = DP_TEST_PATTERN_UNSUPPORTED; | 143 | enum dp_test_pattern test_pattern = DP_TEST_PATTERN_UNSUPPORTED; |
@@ -165,7 +165,7 @@ bool dp_set_hw_training_pattern( | |||
165 | } | 165 | } |
166 | 166 | ||
167 | void dp_set_hw_lane_settings( | 167 | void dp_set_hw_lane_settings( |
168 | struct core_link *link, | 168 | struct dc_link *link, |
169 | const struct link_training_settings *link_settings) | 169 | const struct link_training_settings *link_settings) |
170 | { | 170 | { |
171 | struct link_encoder *encoder = link->link_enc; | 171 | struct link_encoder *encoder = link->link_enc; |
@@ -174,13 +174,13 @@ void dp_set_hw_lane_settings( | |||
174 | encoder->funcs->dp_set_lane_settings(encoder, link_settings); | 174 | encoder->funcs->dp_set_lane_settings(encoder, link_settings); |
175 | } | 175 | } |
176 | 176 | ||
177 | enum dp_panel_mode dp_get_panel_mode(struct core_link *link) | 177 | enum dp_panel_mode dp_get_panel_mode(struct dc_link *link) |
178 | { | 178 | { |
179 | /* We need to explicitly check that connector | 179 | /* We need to explicitly check that connector |
180 | * is not DP. Some Travis_VGA get reported | 180 | * is not DP. Some Travis_VGA get reported |
181 | * by video bios as DP. | 181 | * by video bios as DP. |
182 | */ | 182 | */ |
183 | if (link->public.connector_signal != SIGNAL_TYPE_DISPLAY_PORT) { | 183 | if (link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT) { |
184 | 184 | ||
185 | switch (link->dpcd_caps.branch_dev_id) { | 185 | switch (link->dpcd_caps.branch_dev_id) { |
186 | case DP_BRANCH_DEVICE_ID_2: | 186 | case DP_BRANCH_DEVICE_ID_2: |
@@ -215,7 +215,7 @@ enum dp_panel_mode dp_get_panel_mode(struct core_link *link) | |||
215 | } | 215 | } |
216 | 216 | ||
217 | void dp_set_hw_test_pattern( | 217 | void dp_set_hw_test_pattern( |
218 | struct core_link *link, | 218 | struct dc_link *link, |
219 | enum dp_test_pattern test_pattern, | 219 | enum dp_test_pattern test_pattern, |
220 | uint8_t *custom_pattern, | 220 | uint8_t *custom_pattern, |
221 | uint32_t custom_pattern_size) | 221 | uint32_t custom_pattern_size) |
@@ -231,7 +231,7 @@ void dp_set_hw_test_pattern( | |||
231 | encoder->funcs->dp_set_phy_pattern(encoder, &pattern_param); | 231 | encoder->funcs->dp_set_phy_pattern(encoder, &pattern_param); |
232 | } | 232 | } |
233 | 233 | ||
234 | void dp_retrain_link_dp_test(struct core_link *link, | 234 | void dp_retrain_link_dp_test(struct dc_link *link, |
235 | struct dc_link_settings *link_setting, | 235 | struct dc_link_settings *link_setting, |
236 | bool skip_video_pattern) | 236 | bool skip_video_pattern) |
237 | { | 237 | { |
@@ -263,8 +263,8 @@ void dp_retrain_link_dp_test(struct core_link *link, | |||
263 | SIGNAL_TYPE_DISPLAY_PORT); | 263 | SIGNAL_TYPE_DISPLAY_PORT); |
264 | 264 | ||
265 | /* Clear current link setting. */ | 265 | /* Clear current link setting. */ |
266 | memset(&link->public.cur_link_settings, 0, | 266 | memset(&link->cur_link_settings, 0, |
267 | sizeof(link->public.cur_link_settings)); | 267 | sizeof(link->cur_link_settings)); |
268 | 268 | ||
269 | link->link_enc->funcs->enable_dp_output( | 269 | link->link_enc->funcs->enable_dp_output( |
270 | link->link_enc, | 270 | link->link_enc, |
@@ -274,11 +274,11 @@ void dp_retrain_link_dp_test(struct core_link *link, | |||
274 | dp_receiver_power_ctrl(link, true); | 274 | dp_receiver_power_ctrl(link, true); |
275 | 275 | ||
276 | dc_link_dp_perform_link_training( | 276 | dc_link_dp_perform_link_training( |
277 | &link->public, | 277 | link, |
278 | link_setting, | 278 | link_setting, |
279 | skip_video_pattern); | 279 | skip_video_pattern); |
280 | 280 | ||
281 | link->public.cur_link_settings = *link_setting; | 281 | link->cur_link_settings = *link_setting; |
282 | 282 | ||
283 | link->dc->hwss.enable_stream(&pipes[i]); | 283 | link->dc->hwss.enable_stream(&pipes[i]); |
284 | 284 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 303c95432d5b..7a3d090f8465 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c | |||
@@ -1269,7 +1269,7 @@ static struct stream_encoder *find_first_free_match_stream_enc_for_link( | |||
1269 | { | 1269 | { |
1270 | int i; | 1270 | int i; |
1271 | int j = -1; | 1271 | int j = -1; |
1272 | struct core_link *link = stream->sink->link; | 1272 | struct dc_link *link = stream->sink->link; |
1273 | 1273 | ||
1274 | for (i = 0; i < pool->stream_enc_count; i++) { | 1274 | for (i = 0; i < pool->stream_enc_count; i++) { |
1275 | if (!res_ctx->is_stream_enc_acquired[i] && | 1275 | if (!res_ctx->is_stream_enc_acquired[i] && |
@@ -1322,9 +1322,7 @@ static void update_stream_signal(struct core_stream *stream) | |||
1322 | const struct dc_sink *dc_sink = stream->public.sink; | 1322 | const struct dc_sink *dc_sink = stream->public.sink; |
1323 | 1323 | ||
1324 | if (dc_sink->sink_signal == SIGNAL_TYPE_NONE) | 1324 | if (dc_sink->sink_signal == SIGNAL_TYPE_NONE) |
1325 | stream->signal = | 1325 | stream->signal = stream->sink->link->connector_signal; |
1326 | stream->sink->link-> | ||
1327 | public.connector_signal; | ||
1328 | else | 1326 | else |
1329 | stream->signal = dc_sink->sink_signal; | 1327 | stream->signal = dc_sink->sink_signal; |
1330 | } else { | 1328 | } else { |
@@ -1380,7 +1378,7 @@ static struct core_stream *find_pll_sharable_stream( | |||
1380 | if (resource_are_streams_timing_synchronizable( | 1378 | if (resource_are_streams_timing_synchronizable( |
1381 | stream_needs_pll, stream_has_pll) | 1379 | stream_needs_pll, stream_has_pll) |
1382 | && !dc_is_dp_signal(stream_has_pll->signal) | 1380 | && !dc_is_dp_signal(stream_has_pll->signal) |
1383 | && stream_has_pll->sink->link->public.connector_signal | 1381 | && stream_has_pll->sink->link->connector_signal |
1384 | != SIGNAL_TYPE_VIRTUAL) | 1382 | != SIGNAL_TYPE_VIRTUAL) |
1385 | return stream_has_pll; | 1383 | return stream_has_pll; |
1386 | 1384 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_sink.c b/drivers/gpu/drm/amd/display/dc/core/dc_sink.c index da9955675fbf..7f0ba7267682 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_sink.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_sink.c | |||
@@ -54,15 +54,14 @@ static void destruct(struct sink *sink) | |||
54 | static bool construct(struct sink *sink, const struct dc_sink_init_data *init_params) | 54 | static bool construct(struct sink *sink, const struct dc_sink_init_data *init_params) |
55 | { | 55 | { |
56 | 56 | ||
57 | struct core_link *core_link = DC_LINK_TO_LINK(init_params->link); | 57 | struct dc_link *link = init_params->link; |
58 | 58 | ||
59 | if (!core_link) { | 59 | if (!link) |
60 | return false; | 60 | return false; |
61 | } | ||
62 | 61 | ||
63 | sink->protected.public.sink_signal = init_params->sink_signal; | 62 | sink->protected.public.sink_signal = init_params->sink_signal; |
64 | sink->protected.link = core_link; | 63 | sink->protected.link = link; |
65 | sink->protected.ctx = core_link->ctx; | 64 | sink->protected.ctx = link->ctx; |
66 | sink->protected.public.dongle_max_pix_clk = init_params->dongle_max_pix_clk; | 65 | sink->protected.public.dongle_max_pix_clk = init_params->dongle_max_pix_clk; |
67 | sink->protected.public.converter_disable_audio = | 66 | sink->protected.public.converter_disable_audio = |
68 | init_params->converter_disable_audio; | 67 | init_params->converter_disable_audio; |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index 73712fd6f64a..a329709de360 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c | |||
@@ -91,7 +91,7 @@ static bool construct(struct core_stream *stream, | |||
91 | /* EDID CAP translation for HDMI 2.0 */ | 91 | /* EDID CAP translation for HDMI 2.0 */ |
92 | stream->public.timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble; | 92 | stream->public.timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble; |
93 | 93 | ||
94 | stream->status.link = &stream->sink->link->public; | 94 | stream->status.link = stream->sink->link; |
95 | return true; | 95 | return true; |
96 | } | 96 | } |
97 | 97 | ||
@@ -355,5 +355,5 @@ void dc_stream_log( | |||
355 | dm_logger_write(dm_logger, | 355 | dm_logger_write(dm_logger, |
356 | log_type, | 356 | log_type, |
357 | "\tlink: %d\n", | 357 | "\tlink: %d\n", |
358 | core_stream->sink->link->public.link_index); | 358 | core_stream->sink->link->link_index); |
359 | } | 359 | } |
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index b14bad10db97..e15e8fb1eefe 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h | |||
@@ -31,6 +31,7 @@ | |||
31 | #include "logger_types.h" | 31 | #include "logger_types.h" |
32 | #include "gpio_types.h" | 32 | #include "gpio_types.h" |
33 | #include "link_service_types.h" | 33 | #include "link_service_types.h" |
34 | #include "grph_object_ctrl_defs.h" | ||
34 | 35 | ||
35 | #define MAX_SURFACES 3 | 36 | #define MAX_SURFACES 3 |
36 | #define MAX_STREAMS 6 | 37 | #define MAX_STREAMS 6 |
@@ -141,11 +142,11 @@ struct dc_link_funcs { | |||
141 | bool skip_video_pattern); | 142 | bool skip_video_pattern); |
142 | void (*set_preferred_link_settings)(struct dc *dc, | 143 | void (*set_preferred_link_settings)(struct dc *dc, |
143 | struct dc_link_settings *link_setting, | 144 | struct dc_link_settings *link_setting, |
144 | const struct dc_link *link); | 145 | struct dc_link *link); |
145 | void (*enable_hpd)(const struct dc_link *link); | 146 | void (*enable_hpd)(const struct dc_link *link); |
146 | void (*disable_hpd)(const struct dc_link *link); | 147 | void (*disable_hpd)(const struct dc_link *link); |
147 | void (*set_test_pattern)( | 148 | void (*set_test_pattern)( |
148 | const struct dc_link *link, | 149 | struct dc_link *link, |
149 | enum dp_test_pattern test_pattern, | 150 | enum dp_test_pattern test_pattern, |
150 | const struct link_training_settings *p_link_settings, | 151 | const struct link_training_settings *p_link_settings, |
151 | const unsigned char *p_custom_pattern, | 152 | const unsigned char *p_custom_pattern, |
@@ -641,7 +642,7 @@ struct dc_stream_status { | |||
641 | /* | 642 | /* |
642 | * link this stream passes through | 643 | * link this stream passes through |
643 | */ | 644 | */ |
644 | const struct dc_link *link; | 645 | struct dc_link *link; |
645 | }; | 646 | }; |
646 | 647 | ||
647 | struct dc_stream_status *dc_stream_get_status( | 648 | struct dc_stream_status *dc_stream_get_status( |
@@ -662,6 +663,50 @@ void dc_release_validate_context(struct validate_context *context); | |||
662 | * Link Interfaces | 663 | * Link Interfaces |
663 | ******************************************************************************/ | 664 | ******************************************************************************/ |
664 | 665 | ||
666 | struct dpcd_caps { | ||
667 | union dpcd_rev dpcd_rev; | ||
668 | union max_lane_count max_ln_count; | ||
669 | union max_down_spread max_down_spread; | ||
670 | |||
671 | /* dongle type (DP converter, CV smart dongle) */ | ||
672 | enum display_dongle_type dongle_type; | ||
673 | /* Dongle's downstream count. */ | ||
674 | union sink_count sink_count; | ||
675 | /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER, | ||
676 | indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/ | ||
677 | struct dc_dongle_caps dongle_caps; | ||
678 | |||
679 | uint32_t sink_dev_id; | ||
680 | uint32_t branch_dev_id; | ||
681 | int8_t branch_dev_name[6]; | ||
682 | int8_t branch_hw_revision; | ||
683 | |||
684 | bool allow_invalid_MSA_timing_param; | ||
685 | bool panel_mode_edp; | ||
686 | }; | ||
687 | |||
688 | struct dc_link_status { | ||
689 | struct dpcd_caps *dpcd_caps; | ||
690 | }; | ||
691 | |||
692 | /* DP MST stream allocation (payload bandwidth number) */ | ||
693 | struct link_mst_stream_allocation { | ||
694 | /* DIG front */ | ||
695 | const struct stream_encoder *stream_enc; | ||
696 | /* associate DRM payload table with DC stream encoder */ | ||
697 | uint8_t vcp_id; | ||
698 | /* number of slots required for the DP stream in transport packet */ | ||
699 | uint8_t slot_count; | ||
700 | }; | ||
701 | |||
702 | /* DP MST stream allocation table */ | ||
703 | struct link_mst_stream_allocation_table { | ||
704 | /* number of DP video streams */ | ||
705 | int stream_count; | ||
706 | /* array of stream allocations */ | ||
707 | struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM]; | ||
708 | }; | ||
709 | |||
665 | /* | 710 | /* |
666 | * A link contains one or more sinks and their connected status. | 711 | * A link contains one or more sinks and their connected status. |
667 | * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported. | 712 | * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported. |
@@ -699,32 +744,31 @@ struct dc_link { | |||
699 | struct ddc_service *ddc; | 744 | struct ddc_service *ddc; |
700 | 745 | ||
701 | bool aux_mode; | 746 | bool aux_mode; |
702 | }; | ||
703 | 747 | ||
704 | struct dpcd_caps { | 748 | /* Private to DC core */ |
705 | union dpcd_rev dpcd_rev; | ||
706 | union max_lane_count max_ln_count; | ||
707 | union max_down_spread max_down_spread; | ||
708 | 749 | ||
709 | /* dongle type (DP converter, CV smart dongle) */ | 750 | const struct core_dc *dc; |
710 | enum display_dongle_type dongle_type; | ||
711 | /* Dongle's downstream count. */ | ||
712 | union sink_count sink_count; | ||
713 | /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER, | ||
714 | indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/ | ||
715 | struct dc_dongle_caps dongle_caps; | ||
716 | 751 | ||
717 | uint32_t sink_dev_id; | 752 | struct dc_context *ctx; |
718 | uint32_t branch_dev_id; | ||
719 | int8_t branch_dev_name[6]; | ||
720 | int8_t branch_hw_revision; | ||
721 | 753 | ||
722 | bool allow_invalid_MSA_timing_param; | 754 | struct link_encoder *link_enc; |
723 | bool panel_mode_edp; | 755 | struct graphics_object_id link_id; |
724 | }; | 756 | union ddi_channel_mapping ddi_channel_mapping; |
757 | struct connector_device_tag_info device_tag; | ||
758 | struct dpcd_caps dpcd_caps; | ||
759 | unsigned int dpcd_sink_count; | ||
760 | |||
761 | enum edp_revision edp_revision; | ||
762 | bool psr_enabled; | ||
763 | |||
764 | /* MST record stream using this link */ | ||
765 | struct link_flags { | ||
766 | bool dp_keep_receiver_powered; | ||
767 | } wa_flags; | ||
768 | struct link_mst_stream_allocation_table mst_stream_alloc_table; | ||
769 | |||
770 | struct dc_link_status link_status; | ||
725 | 771 | ||
726 | struct dc_link_status { | ||
727 | struct dpcd_caps *dpcd_caps; | ||
728 | }; | 772 | }; |
729 | 773 | ||
730 | const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link); | 774 | const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link); |
@@ -734,7 +778,7 @@ const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link); | |||
734 | * boot time. They cannot be created or destroyed. | 778 | * boot time. They cannot be created or destroyed. |
735 | * Use dc_get_caps() to get number of links. | 779 | * Use dc_get_caps() to get number of links. |
736 | */ | 780 | */ |
737 | const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index); | 781 | struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index); |
738 | 782 | ||
739 | /* Return id of physical connector represented by a dc_link at link_index.*/ | 783 | /* Return id of physical connector represented by a dc_link at link_index.*/ |
740 | const struct graphics_object_id dc_get_link_id_at_index( | 784 | const struct graphics_object_id dc_get_link_id_at_index( |
@@ -750,7 +794,7 @@ bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable); | |||
750 | 794 | ||
751 | bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state); | 795 | bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state); |
752 | 796 | ||
753 | bool dc_link_setup_psr(const struct dc_link *dc_link, | 797 | bool dc_link_setup_psr(struct dc_link *dc_link, |
754 | const struct dc_stream *stream, struct psr_config *psr_config, | 798 | const struct dc_stream *stream, struct psr_config *psr_config, |
755 | struct psr_context *psr_context); | 799 | struct psr_context *psr_context); |
756 | 800 | ||
@@ -760,7 +804,7 @@ bool dc_link_setup_psr(const struct dc_link *dc_link, | |||
760 | * true otherwise. True meaning further action is required (status update | 804 | * true otherwise. True meaning further action is required (status update |
761 | * and OS notification). | 805 | * and OS notification). |
762 | */ | 806 | */ |
763 | bool dc_link_detect(const struct dc_link *dc_link, bool boot); | 807 | bool dc_link_detect(struct dc_link *dc_link, bool boot); |
764 | 808 | ||
765 | /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt). | 809 | /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt). |
766 | * Return: | 810 | * Return: |
@@ -768,26 +812,26 @@ bool dc_link_detect(const struct dc_link *dc_link, bool boot); | |||
768 | * detection. | 812 | * detection. |
769 | * false - no change in Downstream port status. No further action required | 813 | * false - no change in Downstream port status. No further action required |
770 | * from DM. */ | 814 | * from DM. */ |
771 | bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link, | 815 | bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link, |
772 | union hpd_irq_data *hpd_irq_dpcd_data); | 816 | union hpd_irq_data *hpd_irq_dpcd_data); |
773 | 817 | ||
774 | struct dc_sink_init_data; | 818 | struct dc_sink_init_data; |
775 | 819 | ||
776 | struct dc_sink *dc_link_add_remote_sink( | 820 | struct dc_sink *dc_link_add_remote_sink( |
777 | const struct dc_link *dc_link, | 821 | struct dc_link *dc_link, |
778 | const uint8_t *edid, | 822 | const uint8_t *edid, |
779 | int len, | 823 | int len, |
780 | struct dc_sink_init_data *init_data); | 824 | struct dc_sink_init_data *init_data); |
781 | 825 | ||
782 | void dc_link_remove_remote_sink( | 826 | void dc_link_remove_remote_sink( |
783 | const struct dc_link *link, | 827 | struct dc_link *link, |
784 | const struct dc_sink *sink); | 828 | const struct dc_sink *sink); |
785 | 829 | ||
786 | /* Used by diagnostics for virtual link at the moment */ | 830 | /* Used by diagnostics for virtual link at the moment */ |
787 | void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink); | 831 | void dc_link_set_sink(struct dc_link *link, struct dc_sink *sink); |
788 | 832 | ||
789 | void dc_link_dp_set_drive_settings( | 833 | void dc_link_dp_set_drive_settings( |
790 | const struct dc_link *link, | 834 | struct dc_link *link, |
791 | struct link_training_settings *lt_settings); | 835 | struct link_training_settings *lt_settings); |
792 | 836 | ||
793 | enum link_training_result dc_link_dp_perform_link_training( | 837 | enum link_training_result dc_link_dp_perform_link_training( |
@@ -800,7 +844,7 @@ void dc_link_dp_enable_hpd(const struct dc_link *link); | |||
800 | void dc_link_dp_disable_hpd(const struct dc_link *link); | 844 | void dc_link_dp_disable_hpd(const struct dc_link *link); |
801 | 845 | ||
802 | bool dc_link_dp_set_test_pattern( | 846 | bool dc_link_dp_set_test_pattern( |
803 | const struct dc_link *link, | 847 | struct dc_link *link, |
804 | enum dp_test_pattern test_pattern, | 848 | enum dp_test_pattern test_pattern, |
805 | const struct link_training_settings *p_link_settings, | 849 | const struct link_training_settings *p_link_settings, |
806 | const unsigned char *p_custom_pattern, | 850 | const unsigned char *p_custom_pattern, |
@@ -844,7 +888,7 @@ const struct audio **dc_get_audios(struct dc *dc); | |||
844 | 888 | ||
845 | struct dc_sink_init_data { | 889 | struct dc_sink_init_data { |
846 | enum signal_type sink_signal; | 890 | enum signal_type sink_signal; |
847 | const struct dc_link *link; | 891 | struct dc_link *link; |
848 | uint32_t dongle_max_pix_clk; | 892 | uint32_t dongle_max_pix_clk; |
849 | bool converter_disable_audio; | 893 | bool converter_disable_audio; |
850 | }; | 894 | }; |
diff --git a/drivers/gpu/drm/amd/display/dc/dc_ddc_types.h b/drivers/gpu/drm/amd/display/dc/dc_ddc_types.h index b143fe88f49f..e1affeb5cc51 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_ddc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_ddc_types.h | |||
@@ -105,7 +105,7 @@ struct ddc_service { | |||
105 | enum ddc_transaction_type transaction_type; | 105 | enum ddc_transaction_type transaction_type; |
106 | enum display_dongle_type dongle_type; | 106 | enum display_dongle_type dongle_type; |
107 | struct dc_context *ctx; | 107 | struct dc_context *ctx; |
108 | struct core_link *link; | 108 | struct dc_link *link; |
109 | 109 | ||
110 | uint32_t address; | 110 | uint32_t address; |
111 | uint32_t edid_buf_len; | 111 | uint32_t edid_buf_len; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c index 0fe3ee8e29d3..aaff946a6d0a 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c | |||
@@ -142,7 +142,7 @@ static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable) | |||
142 | } | 142 | } |
143 | 143 | ||
144 | static void dce_dmcu_setup_psr(struct dmcu *dmcu, | 144 | static void dce_dmcu_setup_psr(struct dmcu *dmcu, |
145 | struct core_link *link, | 145 | struct dc_link *link, |
146 | struct psr_context *psr_context) | 146 | struct psr_context *psr_context) |
147 | { | 147 | { |
148 | struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu); | 148 | struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu); |
@@ -382,7 +382,7 @@ static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable) | |||
382 | } | 382 | } |
383 | 383 | ||
384 | static void dcn10_dmcu_setup_psr(struct dmcu *dmcu, | 384 | static void dcn10_dmcu_setup_psr(struct dmcu *dmcu, |
385 | struct core_link *link, | 385 | struct dc_link *link, |
386 | struct psr_context *psr_context) | 386 | struct psr_context *psr_context) |
387 | { | 387 | { |
388 | struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu); | 388 | struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu); |
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c index 5663d3dbd7d5..318673da189b 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | |||
@@ -1020,7 +1020,7 @@ bool dce110_link_encoder_validate_output_with_stream( | |||
1020 | case SIGNAL_TYPE_DVI_DUAL_LINK: | 1020 | case SIGNAL_TYPE_DVI_DUAL_LINK: |
1021 | is_valid = dce110_link_encoder_validate_dvi_output( | 1021 | is_valid = dce110_link_encoder_validate_dvi_output( |
1022 | enc110, | 1022 | enc110, |
1023 | stream->sink->link->public.connector_signal, | 1023 | stream->sink->link->connector_signal, |
1024 | pipe_ctx->stream->signal, | 1024 | pipe_ctx->stream->signal, |
1025 | &stream->public.timing); | 1025 | &stream->public.timing); |
1026 | break; | 1026 | break; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c index 716f664f40ce..6938158bed7f 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | |||
@@ -661,7 +661,7 @@ static enum dc_status validate_mapped_resource( | |||
661 | 661 | ||
662 | for (i = 0; i < context->stream_count; i++) { | 662 | for (i = 0; i < context->stream_count; i++) { |
663 | struct core_stream *stream = context->streams[i]; | 663 | struct core_stream *stream = context->streams[i]; |
664 | struct core_link *link = stream->sink->link; | 664 | struct dc_link *link = stream->sink->link; |
665 | 665 | ||
666 | if (old_context && resource_is_stream_unchanged(old_context, stream)) | 666 | if (old_context && resource_is_stream_unchanged(old_context, stream)) |
667 | continue; | 667 | continue; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index cf6bf2098b7c..fe8084e290a3 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | |||
@@ -700,10 +700,10 @@ void dce110_update_info_frame(struct pipe_ctx *pipe_ctx) | |||
700 | void dce110_enable_stream(struct pipe_ctx *pipe_ctx) | 700 | void dce110_enable_stream(struct pipe_ctx *pipe_ctx) |
701 | { | 701 | { |
702 | enum dc_lane_count lane_count = | 702 | enum dc_lane_count lane_count = |
703 | pipe_ctx->stream->sink->link->public.cur_link_settings.lane_count; | 703 | pipe_ctx->stream->sink->link->cur_link_settings.lane_count; |
704 | 704 | ||
705 | struct dc_crtc_timing *timing = &pipe_ctx->stream->public.timing; | 705 | struct dc_crtc_timing *timing = &pipe_ctx->stream->public.timing; |
706 | struct core_link *link = pipe_ctx->stream->sink->link; | 706 | struct dc_link *link = pipe_ctx->stream->sink->link; |
707 | 707 | ||
708 | /* 1. update AVI info frame (HDMI, DP) | 708 | /* 1. update AVI info frame (HDMI, DP) |
709 | * we always need to update info frame | 709 | * we always need to update info frame |
@@ -746,7 +746,7 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx) | |||
746 | void dce110_disable_stream(struct pipe_ctx *pipe_ctx) | 746 | void dce110_disable_stream(struct pipe_ctx *pipe_ctx) |
747 | { | 747 | { |
748 | struct core_stream *stream = pipe_ctx->stream; | 748 | struct core_stream *stream = pipe_ctx->stream; |
749 | struct core_link *link = stream->sink->link; | 749 | struct dc_link *link = stream->sink->link; |
750 | 750 | ||
751 | if (pipe_ctx->audio) { | 751 | if (pipe_ctx->audio) { |
752 | pipe_ctx->audio->funcs->az_disable(pipe_ctx->audio); | 752 | pipe_ctx->audio->funcs->az_disable(pipe_ctx->audio); |
@@ -1111,7 +1111,7 @@ static enum dc_status apply_single_controller_ctx_to_hw( | |||
1111 | dce110_update_info_frame(pipe_ctx); | 1111 | dce110_update_info_frame(pipe_ctx); |
1112 | if (dc_is_dp_signal(pipe_ctx->stream->signal)) | 1112 | if (dc_is_dp_signal(pipe_ctx->stream->signal)) |
1113 | dce110_unblank_stream(pipe_ctx, | 1113 | dce110_unblank_stream(pipe_ctx, |
1114 | &stream->sink->link->public.cur_link_settings); | 1114 | &stream->sink->link->cur_link_settings); |
1115 | } | 1115 | } |
1116 | 1116 | ||
1117 | pipe_ctx->scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; | 1117 | pipe_ctx->scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; |
@@ -2220,7 +2220,7 @@ static void init_hw(struct core_dc *dc) | |||
2220 | /* Power up AND update implementation according to the | 2220 | /* Power up AND update implementation according to the |
2221 | * required signal (which may be different from the | 2221 | * required signal (which may be different from the |
2222 | * default signal on connector). */ | 2222 | * default signal on connector). */ |
2223 | struct core_link *link = dc->links[i]; | 2223 | struct dc_link *link = dc->links[i]; |
2224 | link->link_enc->funcs->hw_init(link->link_enc); | 2224 | link->link_enc->funcs->hw_init(link->link_enc); |
2225 | } | 2225 | } |
2226 | 2226 | ||
@@ -2283,11 +2283,11 @@ void dce110_fill_display_configs( | |||
2283 | cfg->transmitter = | 2283 | cfg->transmitter = |
2284 | stream->sink->link->link_enc->transmitter; | 2284 | stream->sink->link->link_enc->transmitter; |
2285 | cfg->link_settings.lane_count = | 2285 | cfg->link_settings.lane_count = |
2286 | stream->sink->link->public.cur_link_settings.lane_count; | 2286 | stream->sink->link->cur_link_settings.lane_count; |
2287 | cfg->link_settings.link_rate = | 2287 | cfg->link_settings.link_rate = |
2288 | stream->sink->link->public.cur_link_settings.link_rate; | 2288 | stream->sink->link->cur_link_settings.link_rate; |
2289 | cfg->link_settings.link_spread = | 2289 | cfg->link_settings.link_spread = |
2290 | stream->sink->link->public.cur_link_settings.link_spread; | 2290 | stream->sink->link->cur_link_settings.link_spread; |
2291 | cfg->sym_clock = stream->phy_pix_clk; | 2291 | cfg->sym_clock = stream->phy_pix_clk; |
2292 | /* Round v_refresh*/ | 2292 | /* Round v_refresh*/ |
2293 | cfg->v_refresh = stream->public.timing.pix_clk_khz * 1000; | 2293 | cfg->v_refresh = stream->public.timing.pix_clk_khz * 1000; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index 0fcb1cf4b4ce..015306a6ef88 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | |||
@@ -781,7 +781,7 @@ static enum dc_status validate_mapped_resource( | |||
781 | 781 | ||
782 | for (i = 0; i < context->stream_count; i++) { | 782 | for (i = 0; i < context->stream_count; i++) { |
783 | struct core_stream *stream = context->streams[i]; | 783 | struct core_stream *stream = context->streams[i]; |
784 | struct core_link *link = stream->sink->link; | 784 | struct dc_link *link = stream->sink->link; |
785 | 785 | ||
786 | if (old_context && resource_is_stream_unchanged(old_context, stream)) | 786 | if (old_context && resource_is_stream_unchanged(old_context, stream)) |
787 | continue; | 787 | continue; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c index 80f067343a91..ca1e13e2a3db 100644 --- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c | |||
@@ -730,7 +730,7 @@ static enum dc_status validate_mapped_resource( | |||
730 | 730 | ||
731 | for (i = 0; i < context->stream_count; i++) { | 731 | for (i = 0; i < context->stream_count; i++) { |
732 | struct core_stream *stream = context->streams[i]; | 732 | struct core_stream *stream = context->streams[i]; |
733 | struct core_link *link = stream->sink->link; | 733 | struct dc_link *link = stream->sink->link; |
734 | 734 | ||
735 | if (old_context && resource_is_stream_unchanged(old_context, stream)) | 735 | if (old_context && resource_is_stream_unchanged(old_context, stream)) |
736 | continue; | 736 | continue; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c index 5861b3fdf7d2..b2319dbf3be3 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | |||
@@ -677,7 +677,7 @@ static enum dc_status validate_mapped_resource( | |||
677 | 677 | ||
678 | for (i = 0; i < context->stream_count; i++) { | 678 | for (i = 0; i < context->stream_count; i++) { |
679 | struct core_stream *stream = context->streams[i]; | 679 | struct core_stream *stream = context->streams[i]; |
680 | struct core_link *link = stream->sink->link; | 680 | struct dc_link *link = stream->sink->link; |
681 | 681 | ||
682 | if (old_context && resource_is_stream_unchanged(old_context, stream)) | 682 | if (old_context && resource_is_stream_unchanged(old_context, stream)) |
683 | continue; | 683 | continue; |
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 4390023ca6dc..c25a39214111 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | |||
@@ -628,7 +628,7 @@ static void dcn10_init_hw(struct core_dc *dc) | |||
628 | * required signal (which may be different from the | 628 | * required signal (which may be different from the |
629 | * default signal on connector). | 629 | * default signal on connector). |
630 | */ | 630 | */ |
631 | struct core_link *link = dc->links[i]; | 631 | struct dc_link *link = dc->links[i]; |
632 | 632 | ||
633 | link->link_enc->funcs->hw_init(link->link_enc); | 633 | link->link_enc->funcs->hw_init(link->link_enc); |
634 | } | 634 | } |
@@ -2259,7 +2259,7 @@ static void dcn10_config_stereo_parameters( | |||
2259 | timing_3d_format == TIMING_3D_FORMAT_DP_HDMI_INBAND_FA || | 2259 | timing_3d_format == TIMING_3D_FORMAT_DP_HDMI_INBAND_FA || |
2260 | timing_3d_format == TIMING_3D_FORMAT_SIDEBAND_FA) { | 2260 | timing_3d_format == TIMING_3D_FORMAT_SIDEBAND_FA) { |
2261 | enum display_dongle_type dongle = \ | 2261 | enum display_dongle_type dongle = \ |
2262 | stream->sink->link->public.ddc->dongle_type; | 2262 | stream->sink->link->ddc->dongle_type; |
2263 | if (dongle == DISPLAY_DONGLE_DP_VGA_CONVERTER || | 2263 | if (dongle == DISPLAY_DONGLE_DP_VGA_CONVERTER || |
2264 | dongle == DISPLAY_DONGLE_DP_DVI_CONVERTER || | 2264 | dongle == DISPLAY_DONGLE_DP_DVI_CONVERTER || |
2265 | dongle == DISPLAY_DONGLE_DP_HDMI_CONVERTER) | 2265 | dongle == DISPLAY_DONGLE_DP_HDMI_CONVERTER) |
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c index eec0d5b22a9f..0110a431e289 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | |||
@@ -845,7 +845,7 @@ static enum dc_status validate_mapped_resource( | |||
845 | 845 | ||
846 | for (i = 0; i < context->stream_count; i++) { | 846 | for (i = 0; i < context->stream_count; i++) { |
847 | struct core_stream *stream = context->streams[i]; | 847 | struct core_stream *stream = context->streams[i]; |
848 | struct core_link *link = stream->sink->link; | 848 | struct dc_link *link = stream->sink->link; |
849 | 849 | ||
850 | if (old_context && resource_is_stream_unchanged(old_context, stream)) { | 850 | if (old_context && resource_is_stream_unchanged(old_context, stream)) { |
851 | if (stream != NULL && old_context->streams[i] != NULL) { | 851 | if (stream != NULL && old_context->streams[i] != NULL) { |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_dc.h b/drivers/gpu/drm/amd/display/dc/inc/core_dc.h index 785236a44aee..1ecb54603e17 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_dc.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_dc.h | |||
@@ -20,7 +20,7 @@ struct core_dc { | |||
20 | struct dc_context *ctx; | 20 | struct dc_context *ctx; |
21 | 21 | ||
22 | uint8_t link_count; | 22 | uint8_t link_count; |
23 | struct core_link *links[MAX_PIPES * 2]; | 23 | struct dc_link *links[MAX_PIPES * 2]; |
24 | 24 | ||
25 | struct validate_context *current_context; | 25 | struct validate_context *current_context; |
26 | struct resource_pool *res_pool; | 26 | struct resource_pool *res_pool; |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index 07a1aec5a28b..6cdfeeba0faf 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h | |||
@@ -92,13 +92,11 @@ struct core_sink { | |||
92 | 92 | ||
93 | /** The 'protected' area - read/write access, for use only inside DC **/ | 93 | /** The 'protected' area - read/write access, for use only inside DC **/ |
94 | /* not used for now */ | 94 | /* not used for now */ |
95 | struct core_link *link; | 95 | struct dc_link *link; |
96 | struct dc_context *ctx; | 96 | struct dc_context *ctx; |
97 | }; | 97 | }; |
98 | 98 | ||
99 | /************ link *****************/ | 99 | /************ link *****************/ |
100 | #define DC_LINK_TO_CORE(dc_link) container_of(dc_link, struct core_link, public) | ||
101 | |||
102 | struct link_init_data { | 100 | struct link_init_data { |
103 | const struct core_dc *dc; | 101 | const struct core_dc *dc; |
104 | struct dc_context *ctx; /* TODO: remove 'dal' when DC is complete. */ | 102 | struct dc_context *ctx; /* TODO: remove 'dal' when DC is complete. */ |
@@ -107,61 +105,15 @@ struct link_init_data { | |||
107 | TODO: remove it when DC is complete. */ | 105 | TODO: remove it when DC is complete. */ |
108 | }; | 106 | }; |
109 | 107 | ||
110 | /* DP MST stream allocation (payload bandwidth number) */ | 108 | struct dc_link *link_create(const struct link_init_data *init_params); |
111 | struct link_mst_stream_allocation { | 109 | void link_destroy(struct dc_link **link); |
112 | /* DIG front */ | ||
113 | const struct stream_encoder *stream_enc; | ||
114 | /* associate DRM payload table with DC stream encoder */ | ||
115 | uint8_t vcp_id; | ||
116 | /* number of slots required for the DP stream in transport packet */ | ||
117 | uint8_t slot_count; | ||
118 | }; | ||
119 | |||
120 | /* DP MST stream allocation table */ | ||
121 | struct link_mst_stream_allocation_table { | ||
122 | /* number of DP video streams */ | ||
123 | int stream_count; | ||
124 | /* array of stream allocations */ | ||
125 | struct link_mst_stream_allocation | ||
126 | stream_allocations[MAX_CONTROLLER_NUM]; | ||
127 | }; | ||
128 | |||
129 | struct core_link { | ||
130 | struct dc_link public; | ||
131 | const struct core_dc *dc; | ||
132 | |||
133 | struct dc_context *ctx; /* TODO: AUTO remove 'dal' when DC is complete*/ | ||
134 | |||
135 | struct link_encoder *link_enc; | ||
136 | struct graphics_object_id link_id; | ||
137 | union ddi_channel_mapping ddi_channel_mapping; | ||
138 | struct connector_device_tag_info device_tag; | ||
139 | struct dpcd_caps dpcd_caps; | ||
140 | unsigned int dpcd_sink_count; | ||
141 | |||
142 | enum edp_revision edp_revision; | ||
143 | bool psr_enabled; | ||
144 | |||
145 | /* MST record stream using this link */ | ||
146 | struct link_flags { | ||
147 | bool dp_keep_receiver_powered; | ||
148 | } wa_flags; | ||
149 | struct link_mst_stream_allocation_table mst_stream_alloc_table; | ||
150 | |||
151 | struct dc_link_status link_status; | ||
152 | }; | ||
153 | |||
154 | #define DC_LINK_TO_LINK(dc_link) container_of(dc_link, struct core_link, public) | ||
155 | |||
156 | struct core_link *link_create(const struct link_init_data *init_params); | ||
157 | void link_destroy(struct core_link **link); | ||
158 | 110 | ||
159 | enum dc_status dc_link_validate_mode_timing( | 111 | enum dc_status dc_link_validate_mode_timing( |
160 | const struct core_stream *stream, | 112 | const struct core_stream *stream, |
161 | struct core_link *link, | 113 | struct dc_link *link, |
162 | const struct dc_crtc_timing *timing); | 114 | const struct dc_crtc_timing *timing); |
163 | 115 | ||
164 | void core_link_resume(struct core_link *link); | 116 | void core_link_resume(struct dc_link *link); |
165 | 117 | ||
166 | void core_link_enable_stream(struct pipe_ctx *pipe_ctx); | 118 | void core_link_enable_stream(struct pipe_ctx *pipe_ctx); |
167 | 119 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h index 9c2f670c3dc3..af7ea5eaf185 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h +++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h | |||
@@ -84,7 +84,7 @@ void dal_ddc_aux_payloads_add( | |||
84 | struct ddc_service_init_data { | 84 | struct ddc_service_init_data { |
85 | struct graphics_object_id id; | 85 | struct graphics_object_id id; |
86 | struct dc_context *ctx; | 86 | struct dc_context *ctx; |
87 | struct core_link *link; | 87 | struct dc_link *link; |
88 | }; | 88 | }; |
89 | 89 | ||
90 | struct ddc_service *dal_ddc_service_create( | 90 | struct ddc_service *dal_ddc_service_create( |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h index b6ef1bfd267c..d9af028a39df 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | |||
@@ -29,12 +29,12 @@ | |||
29 | #define LINK_TRAINING_ATTEMPTS 4 | 29 | #define LINK_TRAINING_ATTEMPTS 4 |
30 | #define LINK_TRAINING_RETRY_DELAY 50 /* ms */ | 30 | #define LINK_TRAINING_RETRY_DELAY 50 /* ms */ |
31 | 31 | ||
32 | struct core_link; | 32 | struct dc_link; |
33 | struct core_stream; | 33 | struct core_stream; |
34 | struct dc_link_settings; | 34 | struct dc_link_settings; |
35 | 35 | ||
36 | bool dp_hbr_verify_link_cap( | 36 | bool dp_hbr_verify_link_cap( |
37 | struct core_link *link, | 37 | struct dc_link *link, |
38 | struct dc_link_settings *known_limit_link_setting); | 38 | struct dc_link_settings *known_limit_link_setting); |
39 | 39 | ||
40 | bool decide_fallback_link_setting(struct dc_link_settings link_setting_init, | 40 | bool decide_fallback_link_setting(struct dc_link_settings link_setting_init, |
@@ -46,7 +46,7 @@ struct dc_link_settings get_common_supported_link_settings ( | |||
46 | struct dc_link_settings link_setting_b); | 46 | struct dc_link_settings link_setting_b); |
47 | 47 | ||
48 | bool dp_validate_mode_timing( | 48 | bool dp_validate_mode_timing( |
49 | struct core_link *link, | 49 | struct dc_link *link, |
50 | const struct dc_crtc_timing *timing); | 50 | const struct dc_crtc_timing *timing); |
51 | 51 | ||
52 | void decide_link_settings( | 52 | void decide_link_settings( |
@@ -54,17 +54,17 @@ void decide_link_settings( | |||
54 | struct dc_link_settings *link_setting); | 54 | struct dc_link_settings *link_setting); |
55 | 55 | ||
56 | bool perform_link_training_with_retries( | 56 | bool perform_link_training_with_retries( |
57 | struct core_link *link, | 57 | struct dc_link *link, |
58 | const struct dc_link_settings *link_setting, | 58 | const struct dc_link_settings *link_setting, |
59 | bool skip_video_pattern, | 59 | bool skip_video_pattern, |
60 | int attempts); | 60 | int attempts); |
61 | 61 | ||
62 | bool is_mst_supported(struct core_link *link); | 62 | bool is_mst_supported(struct dc_link *link); |
63 | 63 | ||
64 | void detect_dp_sink_caps(struct core_link *link); | 64 | void detect_dp_sink_caps(struct dc_link *link); |
65 | 65 | ||
66 | bool is_dp_active_dongle(const struct core_link *link); | 66 | bool is_dp_active_dongle(const struct dc_link *link); |
67 | 67 | ||
68 | void dp_enable_mst_on_sink(struct core_link *link, bool enable); | 68 | void dp_enable_mst_on_sink(struct dc_link *link, bool enable); |
69 | 69 | ||
70 | #endif /* __DC_LINK_DP_H__ */ | 70 | #endif /* __DC_LINK_DP_H__ */ |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h index 6067f464d805..e34b25939a98 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h | |||
@@ -39,7 +39,7 @@ struct dmcu_funcs { | |||
39 | unsigned int bytes); | 39 | unsigned int bytes); |
40 | void (*set_psr_enable)(struct dmcu *dmcu, bool enable); | 40 | void (*set_psr_enable)(struct dmcu *dmcu, bool enable); |
41 | void (*setup_psr)(struct dmcu *dmcu, | 41 | void (*setup_psr)(struct dmcu *dmcu, |
42 | struct core_link *link, | 42 | struct dc_link *link, |
43 | struct psr_context *psr_context); | 43 | struct psr_context *psr_context); |
44 | void (*get_psr_state)(struct dmcu *dmcu, uint32_t *psr_state); | 44 | void (*get_psr_state)(struct dmcu *dmcu, uint32_t *psr_state); |
45 | void (*set_psr_wait_loop)(struct dmcu *dmcu, | 45 | void (*set_psr_wait_loop)(struct dmcu *dmcu, |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h index 75d10e93b002..f7994cfc850d 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h +++ b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h | |||
@@ -29,46 +29,46 @@ | |||
29 | #include "inc/core_status.h" | 29 | #include "inc/core_status.h" |
30 | 30 | ||
31 | enum dc_status core_link_read_dpcd( | 31 | enum dc_status core_link_read_dpcd( |
32 | struct core_link* link, | 32 | struct dc_link *link, |
33 | uint32_t address, | 33 | uint32_t address, |
34 | uint8_t *data, | 34 | uint8_t *data, |
35 | uint32_t size); | 35 | uint32_t size); |
36 | 36 | ||
37 | enum dc_status core_link_write_dpcd( | 37 | enum dc_status core_link_write_dpcd( |
38 | struct core_link* link, | 38 | struct dc_link *link, |
39 | uint32_t address, | 39 | uint32_t address, |
40 | const uint8_t *data, | 40 | const uint8_t *data, |
41 | uint32_t size); | 41 | uint32_t size); |
42 | 42 | ||
43 | void dp_enable_link_phy( | 43 | void dp_enable_link_phy( |
44 | struct core_link *link, | 44 | struct dc_link *link, |
45 | enum signal_type signal, | 45 | enum signal_type signal, |
46 | enum clock_source_id clock_source, | 46 | enum clock_source_id clock_source, |
47 | const struct dc_link_settings *link_settings); | 47 | const struct dc_link_settings *link_settings); |
48 | 48 | ||
49 | void dp_receiver_power_ctrl(struct core_link *link, bool on); | 49 | void dp_receiver_power_ctrl(struct dc_link *link, bool on); |
50 | 50 | ||
51 | void dp_disable_link_phy(struct core_link *link, enum signal_type signal); | 51 | void dp_disable_link_phy(struct dc_link *link, enum signal_type signal); |
52 | 52 | ||
53 | void dp_disable_link_phy_mst(struct core_link *link, enum signal_type signal); | 53 | void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal); |
54 | 54 | ||
55 | bool dp_set_hw_training_pattern( | 55 | bool dp_set_hw_training_pattern( |
56 | struct core_link *link, | 56 | struct dc_link *link, |
57 | enum hw_dp_training_pattern pattern); | 57 | enum hw_dp_training_pattern pattern); |
58 | 58 | ||
59 | void dp_set_hw_lane_settings( | 59 | void dp_set_hw_lane_settings( |
60 | struct core_link *link, | 60 | struct dc_link *link, |
61 | const struct link_training_settings *link_settings); | 61 | const struct link_training_settings *link_settings); |
62 | 62 | ||
63 | void dp_set_hw_test_pattern( | 63 | void dp_set_hw_test_pattern( |
64 | struct core_link *link, | 64 | struct dc_link *link, |
65 | enum dp_test_pattern test_pattern, | 65 | enum dp_test_pattern test_pattern, |
66 | uint8_t *custom_pattern, | 66 | uint8_t *custom_pattern, |
67 | uint32_t custom_pattern_size); | 67 | uint32_t custom_pattern_size); |
68 | 68 | ||
69 | enum dp_panel_mode dp_get_panel_mode(struct core_link *link); | 69 | enum dp_panel_mode dp_get_panel_mode(struct dc_link *link); |
70 | 70 | ||
71 | void dp_retrain_link_dp_test(struct core_link *link, | 71 | void dp_retrain_link_dp_test(struct dc_link *link, |
72 | struct dc_link_settings *link_setting, | 72 | struct dc_link_settings *link_setting, |
73 | bool skip_video_pattern); | 73 | bool skip_video_pattern); |
74 | 74 | ||
diff --git a/drivers/gpu/drm/amd/display/include/logger_interface.h b/drivers/gpu/drm/amd/display/include/logger_interface.h index 6e6fd4e8fc00..3adf3cfc7aba 100644 --- a/drivers/gpu/drm/amd/display/include/logger_interface.h +++ b/drivers/gpu/drm/amd/display/include/logger_interface.h | |||
@@ -140,19 +140,19 @@ void context_clock_trace( | |||
140 | */ | 140 | */ |
141 | 141 | ||
142 | #define CONN_DATA_DETECT(link, hex_data, hex_len, ...) \ | 142 | #define CONN_DATA_DETECT(link, hex_data, hex_len, ...) \ |
143 | dc_conn_log(link->ctx, &link->public, hex_data, hex_len, \ | 143 | dc_conn_log(link->ctx, link, hex_data, hex_len, \ |
144 | LOG_EVENT_DETECTION, ##__VA_ARGS__) | 144 | LOG_EVENT_DETECTION, ##__VA_ARGS__) |
145 | 145 | ||
146 | #define CONN_DATA_LINK_LOSS(link, hex_data, hex_len, ...) \ | 146 | #define CONN_DATA_LINK_LOSS(link, hex_data, hex_len, ...) \ |
147 | dc_conn_log(link->ctx, &link->public, hex_data, hex_len, \ | 147 | dc_conn_log(link->ctx, link, hex_data, hex_len, \ |
148 | LOG_EVENT_LINK_LOSS, ##__VA_ARGS__) | 148 | LOG_EVENT_LINK_LOSS, ##__VA_ARGS__) |
149 | 149 | ||
150 | #define CONN_MSG_LT(link, ...) \ | 150 | #define CONN_MSG_LT(link, ...) \ |
151 | dc_conn_log(link->ctx, &link->public, NULL, 0, \ | 151 | dc_conn_log(link->ctx, link, NULL, 0, \ |
152 | LOG_EVENT_LINK_TRAINING, ##__VA_ARGS__) | 152 | LOG_EVENT_LINK_TRAINING, ##__VA_ARGS__) |
153 | 153 | ||
154 | #define CONN_MSG_MODE(link, ...) \ | 154 | #define CONN_MSG_MODE(link, ...) \ |
155 | dc_conn_log(link->ctx, &link->public, NULL, 0, \ | 155 | dc_conn_log(link->ctx, link, NULL, 0, \ |
156 | LOG_EVENT_MODE_SET, ##__VA_ARGS__) | 156 | LOG_EVENT_MODE_SET, ##__VA_ARGS__) |
157 | 157 | ||
158 | #endif /* __DAL_LOGGER_INTERFACE_H__ */ | 158 | #endif /* __DAL_LOGGER_INTERFACE_H__ */ |