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authorChristian König <christian.koenig@amd.com>2018-08-27 12:23:11 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-09-10 23:44:41 -0400
commitc3e1b43c2c1ef9d0eb735cc5e0675100c95b91fa (patch)
tree93e94e597f893b664b9c8c168639185033efefbc /drivers/gpu/drm
parent03a1c08d003bd9354f522d45a6e3dcd529f409c2 (diff)
drm/amdgpu: enable AGP aperture for GMC9 v2
Enable the old AGP aperture to avoid GART mappings. v2: don't enable it for SRIOV Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c10
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c10
3 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 3403ded39d13..ffd0ec9586d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -65,16 +65,16 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
65{ 65{
66 uint64_t value; 66 uint64_t value;
67 67
68 /* Disable AGP. */ 68 /* Program the AGP BAR */
69 WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0); 69 WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0);
70 WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0); 70 WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
71 WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFFFF); 71 WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
72 72
73 /* Program the system aperture low logical page number. */ 73 /* Program the system aperture low logical page number. */
74 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, 74 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
75 adev->gmc.vram_start >> 18); 75 min(adev->gmc.vram_start, adev->gmc.agp_start) >> 18);
76 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 76 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
77 adev->gmc.vram_end >> 18); 77 max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);
78 78
79 /* Set default page address. */ 79 /* Set default page address. */
80 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start 80 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index f467638eb49d..3529c55ab52d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -772,6 +772,8 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
772 base = mmhub_v1_0_get_fb_location(adev); 772 base = mmhub_v1_0_get_fb_location(adev);
773 amdgpu_gmc_vram_location(adev, &adev->gmc, base); 773 amdgpu_gmc_vram_location(adev, &adev->gmc, base);
774 amdgpu_gmc_gart_location(adev, mc); 774 amdgpu_gmc_gart_location(adev, mc);
775 if (!amdgpu_sriov_vf(adev))
776 amdgpu_gmc_agp_location(adev, mc);
775 /* base offset of vram pages */ 777 /* base offset of vram pages */
776 adev->vm_manager.vram_base_offset = gfxhub_v1_0_get_mc_fb_offset(adev); 778 adev->vm_manager.vram_base_offset = gfxhub_v1_0_get_mc_fb_offset(adev);
777} 779}
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 5f6a9c85488f..73d7c075dd33 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -76,16 +76,16 @@ static void mmhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
76 uint64_t value; 76 uint64_t value;
77 uint32_t tmp; 77 uint32_t tmp;
78 78
79 /* Disable AGP. */ 79 /* Program the AGP BAR */
80 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0); 80 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0);
81 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, 0); 81 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
82 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, 0x00FFFFFF); 82 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
83 83
84 /* Program the system aperture low logical page number. */ 84 /* Program the system aperture low logical page number. */
85 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, 85 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
86 adev->gmc.vram_start >> 18); 86 min(adev->gmc.vram_start, adev->gmc.agp_start) >> 18);
87 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 87 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
88 adev->gmc.vram_end >> 18); 88 max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);
89 89
90 /* Set default page address. */ 90 /* Set default page address. */
91 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start + 91 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +