aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm
diff options
context:
space:
mode:
authorGary Bisson <gary.bisson@boundarydevices.com>2015-06-10 12:44:23 -0400
committerThierry Reding <treding@nvidia.com>2015-08-14 15:35:35 -0400
commita99fb6269d1af432c051ed552aaea807f9f906c9 (patch)
treed99c086801ab5547afcc49b214053d0950c7573e /drivers/gpu/drm
parent58c948d8c4145d354457bdfd654b828007722c44 (diff)
drm/panel: Add display timing for Okaya RS800480T-7X0GP
Add support for the Okaya RS800480T-7X0GP to the DRM simple panel driver. The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel LCD interface. It supports pixel clocks in the range of 30-40 MHz. This panel details can be found at: http://boundarydevices.com/product/7-800x480-display/ Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/panel/panel-simple.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 57eceb24912d..f97b73ec4713 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -973,6 +973,36 @@ static const struct panel_desc nec_nl4827hc19_05b = {
973 .bus_format = MEDIA_BUS_FMT_RGB888_1X24 973 .bus_format = MEDIA_BUS_FMT_RGB888_1X24
974}; 974};
975 975
976static const struct display_timing okaya_rs800480t_7x0gp_timing = {
977 .pixelclock = { 30000000, 30000000, 40000000 },
978 .hactive = { 800, 800, 800 },
979 .hfront_porch = { 40, 40, 40 },
980 .hback_porch = { 40, 40, 40 },
981 .hsync_len = { 1, 48, 48 },
982 .vactive = { 480, 480, 480 },
983 .vfront_porch = { 13, 13, 13 },
984 .vback_porch = { 29, 29, 29 },
985 .vsync_len = { 3, 3, 3 },
986 .flags = DISPLAY_FLAGS_DE_HIGH,
987};
988
989static const struct panel_desc okaya_rs800480t_7x0gp = {
990 .timings = &okaya_rs800480t_7x0gp_timing,
991 .num_timings = 1,
992 .bpc = 6,
993 .size = {
994 .width = 154,
995 .height = 87,
996 },
997 .delay = {
998 .prepare = 41,
999 .enable = 50,
1000 .unprepare = 41,
1001 .disable = 50,
1002 },
1003 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1004};
1005
976static const struct drm_display_mode ortustech_com43h4m85ulc_mode = { 1006static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
977 .clock = 25000, 1007 .clock = 25000,
978 .hdisplay = 480, 1008 .hdisplay = 480,
@@ -1146,6 +1176,9 @@ static const struct of_device_id platform_of_match[] = {
1146 .compatible = "nec,nl4827hc19-05b", 1176 .compatible = "nec,nl4827hc19-05b",
1147 .data = &nec_nl4827hc19_05b, 1177 .data = &nec_nl4827hc19_05b,
1148 }, { 1178 }, {
1179 .compatible = "okaya,rs800480t-7x0gp",
1180 .data = &okaya_rs800480t_7x0gp,
1181 }, {
1149 .compatible = "ortustech,com43h4m85ulc", 1182 .compatible = "ortustech,com43h4m85ulc",
1150 .data = &ortustech_com43h4m85ulc, 1183 .data = &ortustech_com43h4m85ulc,
1151 }, { 1184 }, {