diff options
author | Dave Airlie <airlied@redhat.com> | 2017-05-01 14:46:01 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2017-05-01 14:46:01 -0400 |
commit | 8b03d1ed2c43a2ba5ef3381322ee4515b97381bf (patch) | |
tree | 901e917a8183f84c039011ffec4bbcd06ac5cad0 /drivers/gpu/drm | |
parent | 73ba2d5c2bd4ecfec8fe37f20e962889b8a4c972 (diff) | |
parent | 271393ba6e2ac384a14e581d34d5d72c5953e3c6 (diff) |
Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-next
Some nouveau regression fixes.
* 'linux-4.12' of git://github.com/skeggsb/linux:
drm/nouveau/fb/gf100-: Fix 32 bit wraparound in new ram detection
drm/nouveau/secboot/gm20b: fix the error return code in gm20b_secboot_tegra_read_wpr()
drm/nouveau/kms: Increase max retries in scanout position queries.
drm/nouveau/bios/bitP: check that table is long enough for optional pointers
drm/nouveau/fifo/nv40: no ctxsw for pre-nv44 mpeg engine
Diffstat (limited to 'drivers/gpu/drm')
9 files changed, 10 insertions, 8 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 6104f61b00fc..21b10f9840c9 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c | |||
@@ -111,7 +111,7 @@ nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, | |||
111 | }; | 111 | }; |
112 | struct nouveau_display *disp = nouveau_display(crtc->dev); | 112 | struct nouveau_display *disp = nouveau_display(crtc->dev); |
113 | struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)]; | 113 | struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)]; |
114 | int ret, retry = 1; | 114 | int ret, retry = 20; |
115 | 115 | ||
116 | do { | 116 | do { |
117 | ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args)); | 117 | ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args)); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c index 0ec179fc40a1..5f722c6e8a2f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c | |||
@@ -44,6 +44,8 @@ nv40_fifo_dma_engine(struct nvkm_engine *engine, u32 *reg, u32 *ctx) | |||
44 | *ctx = 0x38; | 44 | *ctx = 0x38; |
45 | return true; | 45 | return true; |
46 | case NVKM_ENGINE_MPEG: | 46 | case NVKM_ENGINE_MPEG: |
47 | if (engine->subdev.device->chipset < 0x44) | ||
48 | return false; | ||
47 | *reg = 0x00330c; | 49 | *reg = 0x00330c; |
48 | *ctx = 0x54; | 50 | *ctx = 0x54; |
49 | return true; | 51 | return true; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.c index eaf74eb72983..8ab896dd4e92 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.c | |||
@@ -33,7 +33,7 @@ nvbios_boostTe(struct nvkm_bios *bios, | |||
33 | u32 boost = 0; | 33 | u32 boost = 0; |
34 | 34 | ||
35 | if (!bit_entry(bios, 'P', &bit_P)) { | 35 | if (!bit_entry(bios, 'P', &bit_P)) { |
36 | if (bit_P.version == 2) | 36 | if (bit_P.version == 2 && bit_P.length >= 0x34) |
37 | boost = nvbios_rd32(bios, bit_P.offset + 0x30); | 37 | boost = nvbios_rd32(bios, bit_P.offset + 0x30); |
38 | 38 | ||
39 | if (boost) { | 39 | if (boost) { |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.c index 5063382d8a6c..7c8c36054f71 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.c | |||
@@ -33,7 +33,7 @@ nvbios_cstepTe(struct nvkm_bios *bios, | |||
33 | u32 cstep = 0; | 33 | u32 cstep = 0; |
34 | 34 | ||
35 | if (!bit_entry(bios, 'P', &bit_P)) { | 35 | if (!bit_entry(bios, 'P', &bit_P)) { |
36 | if (bit_P.version == 2) | 36 | if (bit_P.version == 2 && bit_P.length >= 0x38) |
37 | cstep = nvbios_rd32(bios, bit_P.offset + 0x34); | 37 | cstep = nvbios_rd32(bios, bit_P.offset + 0x34); |
38 | 38 | ||
39 | if (cstep) { | 39 | if (cstep) { |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.c index 456f9ea920dc..0dfb15a27e4e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.c | |||
@@ -32,7 +32,7 @@ nvbios_fan_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) | |||
32 | u32 fan = 0; | 32 | u32 fan = 0; |
33 | 33 | ||
34 | if (!bit_entry(bios, 'P', &bit_P)) { | 34 | if (!bit_entry(bios, 'P', &bit_P)) { |
35 | if (bit_P.version == 2 && bit_P.length >= 0x5a) | 35 | if (bit_P.version == 2 && bit_P.length >= 0x5c) |
36 | fan = nvbios_rd32(bios, bit_P.offset + 0x58); | 36 | fan = nvbios_rd32(bios, bit_P.offset + 0x58); |
37 | 37 | ||
38 | if (fan) { | 38 | if (fan) { |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/power_budget.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/power_budget.c index 617bfffce4ad..03d2f970a29f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/power_budget.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/power_budget.c | |||
@@ -33,7 +33,7 @@ nvbios_power_budget_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, | |||
33 | u32 power_budget; | 33 | u32 power_budget; |
34 | 34 | ||
35 | if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || | 35 | if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || |
36 | bit_P.length < 0x2c) | 36 | bit_P.length < 0x30) |
37 | return 0; | 37 | return 0; |
38 | 38 | ||
39 | power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); | 39 | power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.c index f199270163d2..20b6fc8243e0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.c | |||
@@ -31,7 +31,7 @@ nvbios_vpstate_offset(struct nvkm_bios *b) | |||
31 | struct bit_entry bit_P; | 31 | struct bit_entry bit_P; |
32 | 32 | ||
33 | if (!bit_entry(b, 'P', &bit_P)) { | 33 | if (!bit_entry(b, 'P', &bit_P)) { |
34 | if (bit_P.version == 2) | 34 | if (bit_P.version == 2 && bit_P.length >= 0x3c) |
35 | return nvbios_rd32(b, bit_P.offset + 0x38); | 35 | return nvbios_rd32(b, bit_P.offset + 0x38); |
36 | } | 36 | } |
37 | 37 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c index 53c32fc694e9..c63975907c90 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c | |||
@@ -589,7 +589,7 @@ gf100_ram_ctor(const struct nvkm_ram_func *func, struct nvkm_fb *fb, | |||
589 | nvkm_debug(subdev, "FBP %d: %4d MiB, %d LTC(s)\n", | 589 | nvkm_debug(subdev, "FBP %d: %4d MiB, %d LTC(s)\n", |
590 | fbp, size, ltcs); | 590 | fbp, size, ltcs); |
591 | lcomm = min(lcomm, (u64)(size / ltcs) << 20); | 591 | lcomm = min(lcomm, (u64)(size / ltcs) << 20); |
592 | total += size << 20; | 592 | total += (u64) size << 20; |
593 | ltcn += ltcs; | 593 | ltcn += ltcs; |
594 | } else { | 594 | } else { |
595 | nvkm_debug(subdev, "FBP %d: disabled\n", fbp); | 595 | nvkm_debug(subdev, "FBP %d: disabled\n", fbp); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c index b10ed59a4911..30491d132d59 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | |||
@@ -48,7 +48,7 @@ gm20b_secboot_tegra_read_wpr(struct gm200_secboot *gsb, u32 mc_base) | |||
48 | mc = ioremap(mc_base, 0xd00); | 48 | mc = ioremap(mc_base, 0xd00); |
49 | if (!mc) { | 49 | if (!mc) { |
50 | nvkm_error(&sb->subdev, "Cannot map Tegra MC registers\n"); | 50 | nvkm_error(&sb->subdev, "Cannot map Tegra MC registers\n"); |
51 | return PTR_ERR(mc); | 51 | return -ENOMEM; |
52 | } | 52 | } |
53 | sb->wpr_addr = ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_0) | | 53 | sb->wpr_addr = ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_0) | |
54 | ((u64)ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_HI_0) << 32); | 54 | ((u64)ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_HI_0) << 32); |