diff options
author | Christian König <christian.koenig@amd.com> | 2018-01-19 08:21:47 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-02-19 14:18:21 -0500 |
commit | 1b9d17db1cb103f56a69d8610d7339fb0a2a90cc (patch) | |
tree | 35b7d9d247a12a662e800d1b00cc2347130a9999 /drivers/gpu/drm | |
parent | 698825653fdf1a696e1b9458ed9fc4aa2c6587d4 (diff) |
drm/amdgpu: fallback to generic HDP operation
When ring special operations aren't available we can fallback to the
generic ASIC operations.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index a162d87ca0c8..e87c9952c901 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | |||
@@ -184,12 +184,15 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, | |||
184 | if (ring->funcs->init_cond_exec) | 184 | if (ring->funcs->init_cond_exec) |
185 | patch_offset = amdgpu_ring_init_cond_exec(ring); | 185 | patch_offset = amdgpu_ring_init_cond_exec(ring); |
186 | 186 | ||
187 | if (ring->funcs->emit_hdp_flush | ||
188 | #ifdef CONFIG_X86_64 | 187 | #ifdef CONFIG_X86_64 |
189 | && !(adev->flags & AMD_IS_APU) | 188 | if (!(adev->flags & AMD_IS_APU)) |
190 | #endif | 189 | #endif |
191 | ) | 190 | { |
192 | amdgpu_ring_emit_hdp_flush(ring); | 191 | if (ring->funcs->emit_hdp_flush) |
192 | amdgpu_ring_emit_hdp_flush(ring); | ||
193 | else | ||
194 | amdgpu_asic_flush_hdp(adev, ring); | ||
195 | } | ||
193 | 196 | ||
194 | skip_preamble = ring->current_ctx == fence_ctx; | 197 | skip_preamble = ring->current_ctx == fence_ctx; |
195 | need_ctx_switch = ring->current_ctx != fence_ctx; | 198 | need_ctx_switch = ring->current_ctx != fence_ctx; |
@@ -219,12 +222,15 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, | |||
219 | if (ring->funcs->emit_tmz) | 222 | if (ring->funcs->emit_tmz) |
220 | amdgpu_ring_emit_tmz(ring, false); | 223 | amdgpu_ring_emit_tmz(ring, false); |
221 | 224 | ||
222 | if (ring->funcs->emit_hdp_invalidate | ||
223 | #ifdef CONFIG_X86_64 | 225 | #ifdef CONFIG_X86_64 |
224 | && !(adev->flags & AMD_IS_APU) | 226 | if (!(adev->flags & AMD_IS_APU)) |
225 | #endif | 227 | #endif |
226 | ) | 228 | { |
227 | amdgpu_ring_emit_hdp_invalidate(ring); | 229 | if (ring->funcs->emit_hdp_invalidate) |
230 | amdgpu_ring_emit_hdp_invalidate(ring); | ||
231 | else | ||
232 | amdgpu_asic_invalidate_hdp(adev, ring); | ||
233 | } | ||
228 | 234 | ||
229 | r = amdgpu_fence_emit(ring, f); | 235 | r = amdgpu_fence_emit(ring, f); |
230 | if (r) { | 236 | if (r) { |