diff options
author | Dave Airlie <airlied@redhat.com> | 2018-09-27 19:31:03 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2018-09-27 19:36:48 -0400 |
commit | 156e60bc71aa31a3b42b1d66a822c2999bd0994c (patch) | |
tree | dbc2fa3c30c78b1465aa29ca37fefbb8a16bde8e /drivers/gpu/drm/virtio/virtgpu_vq.c | |
parent | bf78296ab1cb215d0609ac6cff4e43e941e51265 (diff) | |
parent | c2b70ffcd34eca60013d90bd6cd56e60b07adef8 (diff) |
Merge tag 'drm-misc-next-2018-09-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for 4.20:
UAPI Changes:
- None
Cross-subsystem Changes:
- MAINTAINERS: Move udl, mxsfb, and fsl-dcu into drm-misc (Stefan, Sean)
Core Changes:
- syncobj: Check condition before returning timeout in schedule() (Chris)
Driver Changes:
- various: First wave of drm_fbdev_generic_setup() conversions (Noralf)
- bochs/virtio: More format byte-order improvements (Gerd)
- mxsfb: A couple fixes + add runtime pm support (Leonard)
- virtio: Add vmap support for prime objects (Ezequiel)
Cc: Stefan Agner <stefan@agner.ch>
Cc: Sean Paul <sean@poorly.run>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Gerd Hoffman <kraxel@redhat.com>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927093950.GA180365@art_vandelay
Diffstat (limited to 'drivers/gpu/drm/virtio/virtgpu_vq.c')
-rw-r--r-- | drivers/gpu/drm/virtio/virtgpu_vq.c | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/drivers/gpu/drm/virtio/virtgpu_vq.c b/drivers/gpu/drm/virtio/virtgpu_vq.c index df32811f2c3e..4e2e037aed34 100644 --- a/drivers/gpu/drm/virtio/virtgpu_vq.c +++ b/drivers/gpu/drm/virtio/virtgpu_vq.c | |||
@@ -483,28 +483,26 @@ void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, | |||
483 | } | 483 | } |
484 | 484 | ||
485 | void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, | 485 | void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, |
486 | uint32_t resource_id, uint64_t offset, | 486 | struct virtio_gpu_object *bo, |
487 | uint64_t offset, | ||
487 | __le32 width, __le32 height, | 488 | __le32 width, __le32 height, |
488 | __le32 x, __le32 y, | 489 | __le32 x, __le32 y, |
489 | struct virtio_gpu_fence **fence) | 490 | struct virtio_gpu_fence **fence) |
490 | { | 491 | { |
491 | struct virtio_gpu_transfer_to_host_2d *cmd_p; | 492 | struct virtio_gpu_transfer_to_host_2d *cmd_p; |
492 | struct virtio_gpu_vbuffer *vbuf; | 493 | struct virtio_gpu_vbuffer *vbuf; |
493 | struct virtio_gpu_fbdev *vgfbdev = vgdev->vgfbdev; | ||
494 | struct virtio_gpu_framebuffer *fb = &vgfbdev->vgfb; | ||
495 | struct virtio_gpu_object *obj = gem_to_virtio_gpu_obj(fb->base.obj[0]); | ||
496 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); | 494 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); |
497 | 495 | ||
498 | if (use_dma_api) | 496 | if (use_dma_api) |
499 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, | 497 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, |
500 | obj->pages->sgl, obj->pages->nents, | 498 | bo->pages->sgl, bo->pages->nents, |
501 | DMA_TO_DEVICE); | 499 | DMA_TO_DEVICE); |
502 | 500 | ||
503 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); | 501 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); |
504 | memset(cmd_p, 0, sizeof(*cmd_p)); | 502 | memset(cmd_p, 0, sizeof(*cmd_p)); |
505 | 503 | ||
506 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D); | 504 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D); |
507 | cmd_p->resource_id = cpu_to_le32(resource_id); | 505 | cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle); |
508 | cmd_p->offset = cpu_to_le64(offset); | 506 | cmd_p->offset = cpu_to_le64(offset); |
509 | cmd_p->r.width = width; | 507 | cmd_p->r.width = width; |
510 | cmd_p->r.height = height; | 508 | cmd_p->r.height = height; |
@@ -791,21 +789,19 @@ virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, | |||
791 | } | 789 | } |
792 | 790 | ||
793 | void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, | 791 | void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, |
794 | uint32_t resource_id, uint32_t ctx_id, | 792 | struct virtio_gpu_object *bo, |
793 | uint32_t ctx_id, | ||
795 | uint64_t offset, uint32_t level, | 794 | uint64_t offset, uint32_t level, |
796 | struct virtio_gpu_box *box, | 795 | struct virtio_gpu_box *box, |
797 | struct virtio_gpu_fence **fence) | 796 | struct virtio_gpu_fence **fence) |
798 | { | 797 | { |
799 | struct virtio_gpu_transfer_host_3d *cmd_p; | 798 | struct virtio_gpu_transfer_host_3d *cmd_p; |
800 | struct virtio_gpu_vbuffer *vbuf; | 799 | struct virtio_gpu_vbuffer *vbuf; |
801 | struct virtio_gpu_fbdev *vgfbdev = vgdev->vgfbdev; | ||
802 | struct virtio_gpu_framebuffer *fb = &vgfbdev->vgfb; | ||
803 | struct virtio_gpu_object *obj = gem_to_virtio_gpu_obj(fb->base.obj[0]); | ||
804 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); | 800 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); |
805 | 801 | ||
806 | if (use_dma_api) | 802 | if (use_dma_api) |
807 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, | 803 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, |
808 | obj->pages->sgl, obj->pages->nents, | 804 | bo->pages->sgl, bo->pages->nents, |
809 | DMA_TO_DEVICE); | 805 | DMA_TO_DEVICE); |
810 | 806 | ||
811 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); | 807 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); |
@@ -813,7 +809,7 @@ void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, | |||
813 | 809 | ||
814 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D); | 810 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D); |
815 | cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id); | 811 | cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id); |
816 | cmd_p->resource_id = cpu_to_le32(resource_id); | 812 | cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle); |
817 | cmd_p->box = *box; | 813 | cmd_p->box = *box; |
818 | cmd_p->offset = cpu_to_le64(offset); | 814 | cmd_p->offset = cpu_to_le64(offset); |
819 | cmd_p->level = cpu_to_le32(level); | 815 | cmd_p->level = cpu_to_le32(level); |