drm/ttm: add support for different pool sizes

Correctly handle different page sizes in the memory accounting.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c
index 74f465ea914b..e11fd76e06f4 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c
@@ -882,7 +882,8 @@ int ttm_pool_populate(struct ttm_tt *ttm)
                         return -ENOMEM;
                 }
 
-                ret = ttm_mem_global_alloc_page(mem_glob, ttm->pages[i]);
+                ret = ttm_mem_global_alloc_page(mem_glob, ttm->pages[i],
+                                                PAGE_SIZE);
                 if (unlikely(ret != 0)) {
                         ttm_pool_unpopulate(ttm);
                         return -ENOMEM;
@@ -909,7 +910,7 @@ void ttm_pool_unpopulate(struct ttm_tt *ttm)
         for (i = 0; i < ttm->num_pages; ++i) {
                 if (ttm->pages[i]) {
                         ttm_mem_global_free_page(ttm->glob->mem_glob,
-                                                 ttm->pages[i]);
+                                                 ttm->pages[i], PAGE_SIZE);
                         ttm_put_pages(&ttm->pages[i], 1,
                                       ttm->page_flags,
                                       ttm->caching_state);