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authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-23 21:58:18 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-23 21:58:18 -0500
commitef96152e6a36e0510387cb174178b7982c1ae879 (patch)
treef2b881feb97893dd6e73380fe206bbfd5110559e /drivers/gpu/drm/radeon
parentd5500a074741b78b7f778b4ab3415d5ecdcda0a7 (diff)
parent64a577196d66b44e37384bc5c4d78c61f59d5b2a (diff)
Merge tag 'drm-for-v4.11-less-shouty' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main drm pull request for v4.11. Nothing too major, the tinydrm and mmu-less support should make writing smaller drivers easier for some of the simpler platforms, and there are a bunch of documentation updates. Intel grew displayport MST audio support which is hopefully useful to people, and FBC is on by default for GEN9+ (so people know where to look for regressions). AMDGPU has a lot of fixes that would like new firmware files installed for some GPUs. Other than that it's pretty scattered all over. I may have a follow up pull request as I know BenH has a bunch of AST rework and fixes and I'd like to get those in once they've been tested by AST, and I've got at least one pull request I'm just trying to get the author to fix up. Core: - drm_mm reworked - Connector list locking and iterators - Documentation updates - Format handling rework - MMU-less support for fbdev helpers - drm_crtc_from_index helper - Core CRC API - Remove drm_framebuffer_unregister_private - Debugfs cleanup - EDID/Infoframe fixes - Release callback - Tinydrm support (smaller drivers for simple hw) panel: - Add support for some new simple panels i915: - FBC by default for gen9+ - Shared dpll cleanups and docs - GEN8 powerdomain cleanup - DMC support on GLK - DP MST audio support - HuC loading support - GVT init ordering fixes - GVT IOMMU workaround fix amdgpu/radeon: - Power/clockgating improvements - Preliminary SR-IOV support - TTM buffer priority and eviction fixes - SI DPM quirks removed due to firmware fixes - Powerplay improvements - VCE/UVD powergating fixes - Cleanup SI GFX code to match CI/VI - Support for > 2 displays on 3/5 crtc asics - SI headless fixes nouveau: - Rework securre boot code in prep for GP10x secure boot - Channel recovery improvements - Initial power budget code - MMU rework preperation vmwgfx: - Bunch of fixes and cleanups exynos: - Runtime PM support for MIC driver - Cleanups to use atomic helpers - UHD Support for TM2/TM2E boards - Trigger mode fix for Rinato board etnaviv: - Shader performance fix - Command stream validator fixes - Command buffer suballocator rockchip: - CDN DisplayPort support - IOMMU support for arm64 platform imx-drm: - Fix i.MX5 TV encoder probing - Remove lower fb size limits msm: - Support for HW cursor on MDP5 devices - DSI encoder cleanup - GPU DT bindings cleanup sti: - stih410 cleanups - Create fbdev at binding - HQVDP fixes - Remove stih416 chip functionality - DVI/HDMI mode selection fixes - FPS statistic reporting omapdrm: - IRQ code cleanup dwi-hdmi bridge: - Cleanups and fixes adv-bridge: - Updates for nexus sii8520 bridge: - Add interlace mode support - Rework HDMI and lots of fixes qxl: - probing/teardown cleanups ZTE drm: - HDMI audio via SPDIF interface - Video Layer overlay plane support - Add TV encoder output device atmel-hlcdc: - Rework fbdev creation logic tegra: - OF node fix fsl-dcu: - Minor fixes mali-dp: - Assorted fixes sunxi: - Minor fix" [ This was the "fixed" pull, that still had build warnings due to people not even having build tested the result. I'm not a happy camper I've fixed the things I noticed up in this merge. - Linus ] * tag 'drm-for-v4.11-less-shouty' of git://people.freedesktop.org/~airlied/linux: (1177 commits) lib/Kconfig: make PRIME_NUMBERS not user selectable drm/tinydrm: helpers: Properly fix backlight dependency drm/tinydrm: mipi-dbi: Fix field width specifier warning drm/tinydrm: mipi-dbi: Silence: ‘cmd’ may be used uninitialized drm/sti: fix build warnings in sti_drv.c and sti_vtg.c files drm/amd/powerplay: fix PSI feature on Polars12 drm/amdgpu: refuse to reserve io mem for split VRAM buffers drm/ttm: fix use-after-free races in vm fault handling drm/tinydrm: Add support for Multi-Inno MI0283QT display dt-bindings: Add Multi-Inno MI0283QT binding dt-bindings: display/panel: Add common rotation property of: Add vendor prefix for Multi-Inno drm/tinydrm: Add MIPI DBI support drm/tinydrm: Add helper functions drm: Add DRM support for tiny LCD displays drm/amd/amdgpu: post card if there is real hw resetting performed drm/nouveau/tmr: provide backtrace when a timeout is hit drm/nouveau/pci/g92: Fix rearm drm/nouveau/drm/therm/fan: add a fallback if no fan control is specified in the vbios drm/nouveau/hwmon: expose power_max and power_crit ..
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c19
-rw-r--r--drivers/gpu/drm/radeon/r100.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c64
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c16
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_dp_mst.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq_kms.c12
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c16
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c10
-rw-r--r--drivers/gpu/drm/radeon/si_dpm.c47
-rw-r--r--drivers/gpu/drm/radeon/vce_v1_0.c2
18 files changed, 87 insertions, 139 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 05f4ebe31ce2..3c492a0aa6bd 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1195,7 +1195,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1195 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); 1195 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
1196 radeon_bo_unreserve(rbo); 1196 radeon_bo_unreserve(rbo);
1197 1197
1198 switch (target_fb->pixel_format) { 1198 switch (target_fb->format->format) {
1199 case DRM_FORMAT_C8: 1199 case DRM_FORMAT_C8:
1200 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_8BPP) | 1200 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_8BPP) |
1201 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_INDEXED)); 1201 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_INDEXED));
@@ -1261,7 +1261,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1261 break; 1261 break;
1262 default: 1262 default:
1263 DRM_ERROR("Unsupported screen format %s\n", 1263 DRM_ERROR("Unsupported screen format %s\n",
1264 drm_get_format_name(target_fb->pixel_format, &format_name)); 1264 drm_get_format_name(target_fb->format->format, &format_name));
1265 return -EINVAL; 1265 return -EINVAL;
1266 } 1266 }
1267 1267
@@ -1277,7 +1277,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1277 1277
1278 /* Calculate the macrotile mode index. */ 1278 /* Calculate the macrotile mode index. */
1279 tile_split_bytes = 64 << tile_split; 1279 tile_split_bytes = 64 << tile_split;
1280 tileb = 8 * 8 * target_fb->bits_per_pixel / 8; 1280 tileb = 8 * 8 * target_fb->format->cpp[0];
1281 tileb = min(tile_split_bytes, tileb); 1281 tileb = min(tile_split_bytes, tileb);
1282 1282
1283 for (index = 0; tileb > 64; index++) 1283 for (index = 0; tileb > 64; index++)
@@ -1285,13 +1285,14 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1285 1285
1286 if (index >= 16) { 1286 if (index >= 16) {
1287 DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n", 1287 DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n",
1288 target_fb->bits_per_pixel, tile_split); 1288 target_fb->format->cpp[0] * 8,
1289 tile_split);
1289 return -EINVAL; 1290 return -EINVAL;
1290 } 1291 }
1291 1292
1292 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; 1293 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3;
1293 } else { 1294 } else {
1294 switch (target_fb->bits_per_pixel) { 1295 switch (target_fb->format->cpp[0] * 8) {
1295 case 8: 1296 case 8:
1296 index = 10; 1297 index = 10;
1297 break; 1298 break;
@@ -1414,7 +1415,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1414 WREG32(EVERGREEN_GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width); 1415 WREG32(EVERGREEN_GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);
1415 WREG32(EVERGREEN_GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height); 1416 WREG32(EVERGREEN_GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);
1416 1417
1417 fb_pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8); 1418 fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
1418 WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels); 1419 WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);
1419 WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1); 1420 WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
1420 1421
@@ -1510,7 +1511,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1510 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); 1511 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
1511 radeon_bo_unreserve(rbo); 1512 radeon_bo_unreserve(rbo);
1512 1513
1513 switch (target_fb->pixel_format) { 1514 switch (target_fb->format->format) {
1514 case DRM_FORMAT_C8: 1515 case DRM_FORMAT_C8:
1515 fb_format = 1516 fb_format =
1516 AVIVO_D1GRPH_CONTROL_DEPTH_8BPP | 1517 AVIVO_D1GRPH_CONTROL_DEPTH_8BPP |
@@ -1563,7 +1564,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1563 break; 1564 break;
1564 default: 1565 default:
1565 DRM_ERROR("Unsupported screen format %s\n", 1566 DRM_ERROR("Unsupported screen format %s\n",
1566 drm_get_format_name(target_fb->pixel_format, &format_name)); 1567 drm_get_format_name(target_fb->format->format, &format_name));
1567 return -EINVAL; 1568 return -EINVAL;
1568 } 1569 }
1569 1570
@@ -1621,7 +1622,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1621 WREG32(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width); 1622 WREG32(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);
1622 WREG32(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height); 1623 WREG32(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);
1623 1624
1624 fb_pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8); 1625 fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
1625 WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels); 1626 WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);
1626 WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1); 1627 WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
1627 1628
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index f5e84f4b58e6..e3399310d41d 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3225,13 +3225,19 @@ void r100_bandwidth_update(struct radeon_device *rdev)
3225 radeon_update_display_priority(rdev); 3225 radeon_update_display_priority(rdev);
3226 3226
3227 if (rdev->mode_info.crtcs[0]->base.enabled) { 3227 if (rdev->mode_info.crtcs[0]->base.enabled) {
3228 const struct drm_framebuffer *fb =
3229 rdev->mode_info.crtcs[0]->base.primary->fb;
3230
3228 mode1 = &rdev->mode_info.crtcs[0]->base.mode; 3231 mode1 = &rdev->mode_info.crtcs[0]->base.mode;
3229 pixel_bytes1 = rdev->mode_info.crtcs[0]->base.primary->fb->bits_per_pixel / 8; 3232 pixel_bytes1 = fb->format->cpp[0];
3230 } 3233 }
3231 if (!(rdev->flags & RADEON_SINGLE_CRTC)) { 3234 if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
3232 if (rdev->mode_info.crtcs[1]->base.enabled) { 3235 if (rdev->mode_info.crtcs[1]->base.enabled) {
3236 const struct drm_framebuffer *fb =
3237 rdev->mode_info.crtcs[1]->base.primary->fb;
3238
3233 mode2 = &rdev->mode_info.crtcs[1]->base.mode; 3239 mode2 = &rdev->mode_info.crtcs[1]->base.mode;
3234 pixel_bytes2 = rdev->mode_info.crtcs[1]->base.primary->fb->bits_per_pixel / 8; 3240 pixel_bytes2 = fb->format->cpp[0];
3235 } 3241 }
3236 } 3242 }
3237 3243
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index c829cfb02fc4..04c0ed41374f 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -596,52 +596,56 @@ static bool radeon_read_disabled_bios(struct radeon_device *rdev)
596#ifdef CONFIG_ACPI 596#ifdef CONFIG_ACPI
597static bool radeon_acpi_vfct_bios(struct radeon_device *rdev) 597static bool radeon_acpi_vfct_bios(struct radeon_device *rdev)
598{ 598{
599 bool ret = false;
600 struct acpi_table_header *hdr; 599 struct acpi_table_header *hdr;
601 acpi_size tbl_size; 600 acpi_size tbl_size;
602 UEFI_ACPI_VFCT *vfct; 601 UEFI_ACPI_VFCT *vfct;
603 GOP_VBIOS_CONTENT *vbios; 602 unsigned offset;
604 VFCT_IMAGE_HEADER *vhdr;
605 603
606 if (!ACPI_SUCCESS(acpi_get_table("VFCT", 1, &hdr))) 604 if (!ACPI_SUCCESS(acpi_get_table("VFCT", 1, &hdr)))
607 return false; 605 return false;
608 tbl_size = hdr->length; 606 tbl_size = hdr->length;
609 if (tbl_size < sizeof(UEFI_ACPI_VFCT)) { 607 if (tbl_size < sizeof(UEFI_ACPI_VFCT)) {
610 DRM_ERROR("ACPI VFCT table present but broken (too short #1)\n"); 608 DRM_ERROR("ACPI VFCT table present but broken (too short #1)\n");
611 goto out_unmap; 609 return false;
612 } 610 }
613 611
614 vfct = (UEFI_ACPI_VFCT *)hdr; 612 vfct = (UEFI_ACPI_VFCT *)hdr;
615 if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) > tbl_size) { 613 offset = vfct->VBIOSImageOffset;
616 DRM_ERROR("ACPI VFCT table present but broken (too short #2)\n");
617 goto out_unmap;
618 }
619 614
620 vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + vfct->VBIOSImageOffset); 615 while (offset < tbl_size) {
621 vhdr = &vbios->VbiosHeader; 616 GOP_VBIOS_CONTENT *vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + offset);
622 DRM_INFO("ACPI VFCT contains a BIOS for %02x:%02x.%d %04x:%04x, size %d\n", 617 VFCT_IMAGE_HEADER *vhdr = &vbios->VbiosHeader;
623 vhdr->PCIBus, vhdr->PCIDevice, vhdr->PCIFunction,
624 vhdr->VendorID, vhdr->DeviceID, vhdr->ImageLength);
625
626 if (vhdr->PCIBus != rdev->pdev->bus->number ||
627 vhdr->PCIDevice != PCI_SLOT(rdev->pdev->devfn) ||
628 vhdr->PCIFunction != PCI_FUNC(rdev->pdev->devfn) ||
629 vhdr->VendorID != rdev->pdev->vendor ||
630 vhdr->DeviceID != rdev->pdev->device) {
631 DRM_INFO("ACPI VFCT table is not for this card\n");
632 goto out_unmap;
633 }
634 618
635 if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) + vhdr->ImageLength > tbl_size) { 619 offset += sizeof(VFCT_IMAGE_HEADER);
636 DRM_ERROR("ACPI VFCT image truncated\n"); 620 if (offset > tbl_size) {
637 goto out_unmap; 621 DRM_ERROR("ACPI VFCT image header truncated\n");
638 } 622 return false;
623 }
639 624
640 rdev->bios = kmemdup(&vbios->VbiosContent, vhdr->ImageLength, GFP_KERNEL); 625 offset += vhdr->ImageLength;
641 ret = !!rdev->bios; 626 if (offset > tbl_size) {
627 DRM_ERROR("ACPI VFCT image truncated\n");
628 return false;
629 }
630
631 if (vhdr->ImageLength &&
632 vhdr->PCIBus == rdev->pdev->bus->number &&
633 vhdr->PCIDevice == PCI_SLOT(rdev->pdev->devfn) &&
634 vhdr->PCIFunction == PCI_FUNC(rdev->pdev->devfn) &&
635 vhdr->VendorID == rdev->pdev->vendor &&
636 vhdr->DeviceID == rdev->pdev->device) {
637 rdev->bios = kmemdup(&vbios->VbiosContent,
638 vhdr->ImageLength,
639 GFP_KERNEL);
640
641 if (!rdev->bios)
642 return false;
643 return true;
644 }
645 }
642 646
643out_unmap: 647 DRM_ERROR("ACPI VFCT table present but broken (too short #2)\n");
644 return ret; 648 return false;
645} 649}
646#else 650#else
647static inline bool radeon_acpi_vfct_bios(struct radeon_device *rdev) 651static inline bool radeon_acpi_vfct_bios(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 510ea371dacc..a8442f7196d6 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -121,7 +121,8 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
121 VRAM, also but everything into VRAM on AGP cards and older 121 VRAM, also but everything into VRAM on AGP cards and older
122 IGP chips to avoid image corruptions */ 122 IGP chips to avoid image corruptions */
123 if (p->ring == R600_RING_TYPE_UVD_INDEX && 123 if (p->ring == R600_RING_TYPE_UVD_INDEX &&
124 (i == 0 || drm_pci_device_is_agp(p->rdev->ddev) || 124 (i == 0 || pci_find_capability(p->rdev->ddev->pdev,
125 PCI_CAP_ID_AGP) ||
125 p->rdev->family == CHIP_RS780 || 126 p->rdev->family == CHIP_RS780 ||
126 p->rdev->family == CHIP_RS880)) { 127 p->rdev->family == CHIP_RS880)) {
127 128
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 8a1df2a1afbd..4b0c388be3f5 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1549,8 +1549,6 @@ failed:
1549 return r; 1549 return r;
1550} 1550}
1551 1551
1552static void radeon_debugfs_remove_files(struct radeon_device *rdev);
1553
1554/** 1552/**
1555 * radeon_device_fini - tear down the driver 1553 * radeon_device_fini - tear down the driver
1556 * 1554 *
@@ -1577,7 +1575,6 @@ void radeon_device_fini(struct radeon_device *rdev)
1577 rdev->rmmio = NULL; 1575 rdev->rmmio = NULL;
1578 if (rdev->family >= CHIP_BONAIRE) 1576 if (rdev->family >= CHIP_BONAIRE)
1579 radeon_doorbell_fini(rdev); 1577 radeon_doorbell_fini(rdev);
1580 radeon_debugfs_remove_files(rdev);
1581} 1578}
1582 1579
1583 1580
@@ -1954,16 +1951,3 @@ int radeon_debugfs_add_files(struct radeon_device *rdev,
1954#endif 1951#endif
1955 return 0; 1952 return 0;
1956} 1953}
1957
1958static void radeon_debugfs_remove_files(struct radeon_device *rdev)
1959{
1960#if defined(CONFIG_DEBUG_FS)
1961 unsigned i;
1962
1963 for (i = 0; i < rdev->debugfs_count; i++) {
1964 drm_debugfs_remove_files(rdev->debugfs[i].files,
1965 rdev->debugfs[i].num_files,
1966 rdev->ddev->primary);
1967 }
1968#endif
1969}
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index e7409e8a9f87..aea8b62835a4 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -549,19 +549,19 @@ static int radeon_crtc_page_flip_target(struct drm_crtc *crtc,
549 if (!ASIC_IS_AVIVO(rdev)) { 549 if (!ASIC_IS_AVIVO(rdev)) {
550 /* crtc offset is from display base addr not FB location */ 550 /* crtc offset is from display base addr not FB location */
551 base -= radeon_crtc->legacy_display_base_addr; 551 base -= radeon_crtc->legacy_display_base_addr;
552 pitch_pixels = fb->pitches[0] / (fb->bits_per_pixel / 8); 552 pitch_pixels = fb->pitches[0] / fb->format->cpp[0];
553 553
554 if (tiling_flags & RADEON_TILING_MACRO) { 554 if (tiling_flags & RADEON_TILING_MACRO) {
555 if (ASIC_IS_R300(rdev)) { 555 if (ASIC_IS_R300(rdev)) {
556 base &= ~0x7ff; 556 base &= ~0x7ff;
557 } else { 557 } else {
558 int byteshift = fb->bits_per_pixel >> 4; 558 int byteshift = fb->format->cpp[0] * 8 >> 4;
559 int tile_addr = (((crtc->y >> 3) * pitch_pixels + crtc->x) >> (8 - byteshift)) << 11; 559 int tile_addr = (((crtc->y >> 3) * pitch_pixels + crtc->x) >> (8 - byteshift)) << 11;
560 base += tile_addr + ((crtc->x << byteshift) % 256) + ((crtc->y % 8) << 8); 560 base += tile_addr + ((crtc->x << byteshift) % 256) + ((crtc->y % 8) << 8);
561 } 561 }
562 } else { 562 } else {
563 int offset = crtc->y * pitch_pixels + crtc->x; 563 int offset = crtc->y * pitch_pixels + crtc->x;
564 switch (fb->bits_per_pixel) { 564 switch (fb->format->cpp[0] * 8) {
565 case 8: 565 case 8:
566 default: 566 default:
567 offset *= 1; 567 offset *= 1;
@@ -1327,7 +1327,7 @@ radeon_framebuffer_init(struct drm_device *dev,
1327{ 1327{
1328 int ret; 1328 int ret;
1329 rfb->obj = obj; 1329 rfb->obj = obj;
1330 drm_helper_mode_fill_fb_struct(&rfb->base, mode_cmd); 1330 drm_helper_mode_fill_fb_struct(dev, &rfb->base, mode_cmd);
1331 ret = drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs); 1331 ret = drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs);
1332 if (ret) { 1332 if (ret) {
1333 rfb->obj = NULL; 1333 rfb->obj = NULL;
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index 6d1237d6e1b8..7d5ada3980dc 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -667,7 +667,7 @@ radeon_dp_mst_init(struct radeon_connector *radeon_connector)
667 return 0; 667 return 0;
668 668
669 radeon_connector->mst_mgr.cbs = &mst_cbs; 669 radeon_connector->mst_mgr.cbs = &mst_cbs;
670 return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev, 670 return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev,
671 &radeon_connector->ddc_bus->aux, 16, 6, 671 &radeon_connector->ddc_bus->aux, 16, 6,
672 radeon_connector->base.base.id); 672 radeon_connector->base.base.id);
673} 673}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 30bd4a6a9d46..956c425e639e 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -103,7 +103,7 @@
103#define KMS_DRIVER_MINOR 49 103#define KMS_DRIVER_MINOR 49
104#define KMS_DRIVER_PATCHLEVEL 0 104#define KMS_DRIVER_PATCHLEVEL 0
105int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 105int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
106int radeon_driver_unload_kms(struct drm_device *dev); 106void radeon_driver_unload_kms(struct drm_device *dev);
107void radeon_driver_lastclose_kms(struct drm_device *dev); 107void radeon_driver_lastclose_kms(struct drm_device *dev);
108int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 108int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
109void radeon_driver_postclose_kms(struct drm_device *dev, 109void radeon_driver_postclose_kms(struct drm_device *dev,
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 899b6a1644bd..2be4fe9c7217 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -263,7 +263,7 @@ static int radeonfb_create(struct drm_fb_helper *helper,
263 263
264 strcpy(info->fix.id, "radeondrmfb"); 264 strcpy(info->fix.id, "radeondrmfb");
265 265
266 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth); 266 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth);
267 267
268 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; 268 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
269 info->fbops = &radeonfb_ops; 269 info->fbops = &radeonfb_ops;
@@ -290,7 +290,7 @@ static int radeonfb_create(struct drm_fb_helper *helper,
290 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); 290 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
291 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); 291 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
292 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo)); 292 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
293 DRM_INFO("fb depth is %d\n", fb->depth); 293 DRM_INFO("fb depth is %d\n", fb->format->depth);
294 DRM_INFO(" pitch is %d\n", fb->pitches[0]); 294 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
295 295
296 vga_switcheroo_client_fb_set(rdev->ddev->pdev, info); 296 vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
@@ -366,7 +366,6 @@ int radeon_fbdev_init(struct radeon_device *rdev)
366 &radeon_fb_helper_funcs); 366 &radeon_fb_helper_funcs);
367 367
368 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper, 368 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
369 rdev->num_crtc,
370 RADEONFB_CONN_LIMIT); 369 RADEONFB_CONN_LIMIT);
371 if (ret) 370 if (ret)
372 goto free; 371 goto free;
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index c084cadcbf21..1b7528df7f7f 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -85,10 +85,8 @@ static void radeon_hotplug_work_func(struct work_struct *work)
85 return; 85 return;
86 86
87 mutex_lock(&mode_config->mutex); 87 mutex_lock(&mode_config->mutex);
88 if (mode_config->num_connector) { 88 list_for_each_entry(connector, &mode_config->connector_list, head)
89 list_for_each_entry(connector, &mode_config->connector_list, head) 89 radeon_connector_hotplug(connector);
90 radeon_connector_hotplug(connector);
91 }
92 mutex_unlock(&mode_config->mutex); 90 mutex_unlock(&mode_config->mutex);
93 /* Just fire off a uevent and let userspace tell us what to do */ 91 /* Just fire off a uevent and let userspace tell us what to do */
94 drm_helper_hpd_irq_event(dev); 92 drm_helper_hpd_irq_event(dev);
@@ -103,10 +101,8 @@ static void radeon_dp_work_func(struct work_struct *work)
103 struct drm_connector *connector; 101 struct drm_connector *connector;
104 102
105 /* this should take a mutex */ 103 /* this should take a mutex */
106 if (mode_config->num_connector) { 104 list_for_each_entry(connector, &mode_config->connector_list, head)
107 list_for_each_entry(connector, &mode_config->connector_list, head) 105 radeon_connector_hotplug(connector);
108 radeon_connector_hotplug(connector);
109 }
110} 106}
111/** 107/**
112 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback 108 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 4388ddeec8d2..56f35c06742c 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -53,12 +53,12 @@ static inline bool radeon_has_atpx(void) { return false; }
53 * the rest of the device (CP, writeback, etc.). 53 * the rest of the device (CP, writeback, etc.).
54 * Returns 0 on success. 54 * Returns 0 on success.
55 */ 55 */
56int radeon_driver_unload_kms(struct drm_device *dev) 56void radeon_driver_unload_kms(struct drm_device *dev)
57{ 57{
58 struct radeon_device *rdev = dev->dev_private; 58 struct radeon_device *rdev = dev->dev_private;
59 59
60 if (rdev == NULL) 60 if (rdev == NULL)
61 return 0; 61 return;
62 62
63 if (rdev->rmmio == NULL) 63 if (rdev->rmmio == NULL)
64 goto done_free; 64 goto done_free;
@@ -78,7 +78,6 @@ int radeon_driver_unload_kms(struct drm_device *dev)
78done_free: 78done_free:
79 kfree(rdev); 79 kfree(rdev);
80 dev->dev_private = NULL; 80 dev->dev_private = NULL;
81 return 0;
82} 81}
83 82
84/** 83/**
@@ -106,7 +105,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
106 dev->dev_private = (void *)rdev; 105 dev->dev_private = (void *)rdev;
107 106
108 /* update BUS flag */ 107 /* update BUS flag */
109 if (drm_pci_device_is_agp(dev)) { 108 if (pci_find_capability(dev->pdev, PCI_CAP_ID_AGP)) {
110 flags |= RADEON_IS_AGP; 109 flags |= RADEON_IS_AGP;
111 } else if (pci_is_pcie(dev->pdev)) { 110 } else if (pci_is_pcie(dev->pdev)) {
112 flags |= RADEON_IS_PCIE; 111 flags |= RADEON_IS_PCIE;
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index d0de4022fff9..ce6cb6666212 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -402,7 +402,7 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc,
402 target_fb = crtc->primary->fb; 402 target_fb = crtc->primary->fb;
403 } 403 }
404 404
405 switch (target_fb->bits_per_pixel) { 405 switch (target_fb->format->cpp[0] * 8) {
406 case 8: 406 case 8:
407 format = 2; 407 format = 2;
408 break; 408 break;
@@ -476,10 +476,9 @@ retry:
476 476
477 crtc_offset_cntl = 0; 477 crtc_offset_cntl = 0;
478 478
479 pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8); 479 pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
480 crtc_pitch = (((pitch_pixels * target_fb->bits_per_pixel) + 480 crtc_pitch = DIV_ROUND_UP(pitch_pixels * target_fb->format->cpp[0] * 8,
481 ((target_fb->bits_per_pixel * 8) - 1)) / 481 target_fb->format->cpp[0] * 8 * 8);
482 (target_fb->bits_per_pixel * 8));
483 crtc_pitch |= crtc_pitch << 16; 482 crtc_pitch |= crtc_pitch << 16;
484 483
485 crtc_offset_cntl |= RADEON_CRTC_GUI_TRIG_OFFSET_LEFT_EN; 484 crtc_offset_cntl |= RADEON_CRTC_GUI_TRIG_OFFSET_LEFT_EN;
@@ -504,14 +503,14 @@ retry:
504 crtc_tile_x0_y0 = x | (y << 16); 503 crtc_tile_x0_y0 = x | (y << 16);
505 base &= ~0x7ff; 504 base &= ~0x7ff;
506 } else { 505 } else {
507 int byteshift = target_fb->bits_per_pixel >> 4; 506 int byteshift = target_fb->format->cpp[0] * 8 >> 4;
508 int tile_addr = (((y >> 3) * pitch_pixels + x) >> (8 - byteshift)) << 11; 507 int tile_addr = (((y >> 3) * pitch_pixels + x) >> (8 - byteshift)) << 11;
509 base += tile_addr + ((x << byteshift) % 256) + ((y % 8) << 8); 508 base += tile_addr + ((x << byteshift) % 256) + ((y % 8) << 8);
510 crtc_offset_cntl |= (y % 16); 509 crtc_offset_cntl |= (y % 16);
511 } 510 }
512 } else { 511 } else {
513 int offset = y * pitch_pixels + x; 512 int offset = y * pitch_pixels + x;
514 switch (target_fb->bits_per_pixel) { 513 switch (target_fb->format->cpp[0] * 8) {
515 case 8: 514 case 8:
516 offset *= 1; 515 offset *= 1;
517 break; 516 break;
@@ -579,6 +578,7 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
579 struct drm_device *dev = crtc->dev; 578 struct drm_device *dev = crtc->dev;
580 struct radeon_device *rdev = dev->dev_private; 579 struct radeon_device *rdev = dev->dev_private;
581 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 580 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
581 const struct drm_framebuffer *fb = crtc->primary->fb;
582 struct drm_encoder *encoder; 582 struct drm_encoder *encoder;
583 int format; 583 int format;
584 int hsync_start; 584 int hsync_start;
@@ -602,7 +602,7 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
602 } 602 }
603 } 603 }
604 604
605 switch (crtc->primary->fb->bits_per_pixel) { 605 switch (fb->format->cpp[0] * 8) {
606 case 8: 606 case 8:
607 format = 2; 607 format = 2;
608 break; 608 break;
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index f1da484864a9..ad282648fc8b 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -32,6 +32,7 @@
32 32
33#include <drm/drm_crtc.h> 33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h> 34#include <drm/drm_edid.h>
35#include <drm/drm_encoder.h>
35#include <drm/drm_dp_helper.h> 36#include <drm/drm_dp_helper.h>
36#include <drm/drm_dp_mst_helper.h> 37#include <drm/drm_dp_mst_helper.h>
37#include <drm/drm_fixed.h> 38#include <drm/drm_fixed.h>
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 41b72ce6613f..74b276060c20 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -765,6 +765,7 @@ int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
765} 765}
766 766
767void radeon_bo_move_notify(struct ttm_buffer_object *bo, 767void radeon_bo_move_notify(struct ttm_buffer_object *bo,
768 bool evict,
768 struct ttm_mem_reg *new_mem) 769 struct ttm_mem_reg *new_mem)
769{ 770{
770 struct radeon_bo *rbo; 771 struct radeon_bo *rbo;
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
index a10bb3deee54..9ffd8215d38a 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -150,6 +150,7 @@ extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
150extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved, 150extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
151 bool force_drop); 151 bool force_drop);
152extern void radeon_bo_move_notify(struct ttm_buffer_object *bo, 152extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
153 bool evict,
153 struct ttm_mem_reg *new_mem); 154 struct ttm_mem_reg *new_mem);
154extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo); 155extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
155extern int radeon_bo_get_surface_reg(struct radeon_bo *bo); 156extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 0cf03ccbf0a7..7a10b3852970 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -502,6 +502,8 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
502 mem->bus.addr = 502 mem->bus.addr =
503 ioremap_nocache(mem->bus.base + mem->bus.offset, 503 ioremap_nocache(mem->bus.base + mem->bus.offset,
504 mem->bus.size); 504 mem->bus.size);
505 if (!mem->bus.addr)
506 return -ENOMEM;
505 507
506 /* 508 /*
507 * Alpha: Use just the bus offset plus 509 * Alpha: Use just the bus offset plus
@@ -871,8 +873,6 @@ static struct ttm_bo_driver radeon_bo_driver = {
871 .fault_reserve_notify = &radeon_bo_fault_reserve_notify, 873 .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
872 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 874 .io_mem_reserve = &radeon_ttm_io_mem_reserve,
873 .io_mem_free = &radeon_ttm_io_mem_free, 875 .io_mem_free = &radeon_ttm_io_mem_free,
874 .lru_tail = &ttm_bo_default_lru_tail,
875 .swap_lru_tail = &ttm_bo_default_swap_lru_tail,
876}; 876};
877 877
878int radeon_ttm_init(struct radeon_device *rdev) 878int radeon_ttm_init(struct radeon_device *rdev)
@@ -1033,13 +1033,13 @@ static int radeon_mm_dump_table(struct seq_file *m, void *data)
1033 struct drm_device *dev = node->minor->dev; 1033 struct drm_device *dev = node->minor->dev;
1034 struct radeon_device *rdev = dev->dev_private; 1034 struct radeon_device *rdev = dev->dev_private;
1035 struct drm_mm *mm = (struct drm_mm *)rdev->mman.bdev.man[ttm_pl].priv; 1035 struct drm_mm *mm = (struct drm_mm *)rdev->mman.bdev.man[ttm_pl].priv;
1036 int ret;
1037 struct ttm_bo_global *glob = rdev->mman.bdev.glob; 1036 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
1037 struct drm_printer p = drm_seq_file_printer(m);
1038 1038
1039 spin_lock(&glob->lru_lock); 1039 spin_lock(&glob->lru_lock);
1040 ret = drm_mm_dump_table(m, mm); 1040 drm_mm_print(mm, &p);
1041 spin_unlock(&glob->lru_lock); 1041 spin_unlock(&glob->lru_lock);
1042 return ret; 1042 return 0;
1043} 1043}
1044 1044
1045static int ttm_pl_vram = TTM_PL_VRAM; 1045static int ttm_pl_vram = TTM_PL_VRAM;
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 2944916f7102..d12b8978142f 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2912,29 +2912,6 @@ static int si_init_smc_spll_table(struct radeon_device *rdev)
2912 return ret; 2912 return ret;
2913} 2913}
2914 2914
2915struct si_dpm_quirk {
2916 u32 chip_vendor;
2917 u32 chip_device;
2918 u32 subsys_vendor;
2919 u32 subsys_device;
2920 u32 max_sclk;
2921 u32 max_mclk;
2922};
2923
2924/* cards with dpm stability problems */
2925static struct si_dpm_quirk si_dpm_quirk_list[] = {
2926 /* PITCAIRN - https://bugs.freedesktop.org/show_bug.cgi?id=76490 */
2927 { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 },
2928 { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 },
2929 { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0x2015, 0, 120000 },
2930 { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 },
2931 { PCI_VENDOR_ID_ATI, 0x6811, 0x1462, 0x2015, 0, 120000 },
2932 { PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 },
2933 { PCI_VENDOR_ID_ATI, 0x6811, 0x148c, 0x2015, 0, 120000 },
2934 { PCI_VENDOR_ID_ATI, 0x6810, 0x1682, 0x9275, 0, 120000 },
2935 { 0, 0, 0, 0 },
2936};
2937
2938static u16 si_get_lower_of_leakage_and_vce_voltage(struct radeon_device *rdev, 2915static u16 si_get_lower_of_leakage_and_vce_voltage(struct radeon_device *rdev,
2939 u16 vce_voltage) 2916 u16 vce_voltage)
2940{ 2917{
@@ -2997,18 +2974,8 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
2997 u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; 2974 u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
2998 u32 max_sclk = 0, max_mclk = 0; 2975 u32 max_sclk = 0, max_mclk = 0;
2999 int i; 2976 int i;
3000 struct si_dpm_quirk *p = si_dpm_quirk_list;
3001 2977
3002 /* limit all SI kickers */ 2978 if (rdev->family == CHIP_HAINAN) {
3003 if (rdev->family == CHIP_PITCAIRN) {
3004 if ((rdev->pdev->revision == 0x81) ||
3005 (rdev->pdev->device == 0x6810) ||
3006 (rdev->pdev->device == 0x6811) ||
3007 (rdev->pdev->device == 0x6816) ||
3008 (rdev->pdev->device == 0x6817) ||
3009 (rdev->pdev->device == 0x6806))
3010 max_mclk = 120000;
3011 } else if (rdev->family == CHIP_HAINAN) {
3012 if ((rdev->pdev->revision == 0x81) || 2979 if ((rdev->pdev->revision == 0x81) ||
3013 (rdev->pdev->revision == 0x83) || 2980 (rdev->pdev->revision == 0x83) ||
3014 (rdev->pdev->revision == 0xC3) || 2981 (rdev->pdev->revision == 0xC3) ||
@@ -3018,18 +2985,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
3018 max_sclk = 75000; 2985 max_sclk = 75000;
3019 } 2986 }
3020 } 2987 }
3021 /* Apply dpm quirks */
3022 while (p && p->chip_device != 0) {
3023 if (rdev->pdev->vendor == p->chip_vendor &&
3024 rdev->pdev->device == p->chip_device &&
3025 rdev->pdev->subsystem_vendor == p->subsys_vendor &&
3026 rdev->pdev->subsystem_device == p->subsys_device) {
3027 max_sclk = p->max_sclk;
3028 max_mclk = p->max_mclk;
3029 break;
3030 }
3031 ++p;
3032 }
3033 2988
3034 if (rps->vce_active) { 2989 if (rps->vce_active) {
3035 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; 2990 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
diff --git a/drivers/gpu/drm/radeon/vce_v1_0.c b/drivers/gpu/drm/radeon/vce_v1_0.c
index a01efe39a820..f541a4b5ac51 100644
--- a/drivers/gpu/drm/radeon/vce_v1_0.c
+++ b/drivers/gpu/drm/radeon/vce_v1_0.c
@@ -196,7 +196,7 @@ int vce_v1_0_load_fw(struct radeon_device *rdev, uint32_t *data)
196 memset(&data[5], 0, 44); 196 memset(&data[5], 0, 44);
197 memcpy(&data[16], &sign[1], rdev->vce_fw->size - sizeof(*sign)); 197 memcpy(&data[16], &sign[1], rdev->vce_fw->size - sizeof(*sign));
198 198
199 data += le32_to_cpu(data[4]) / 4; 199 data += (le32_to_cpu(sign->len) + 64) / 4;
200 data[0] = sign->val[i].sigval[0]; 200 data[0] = sign->val[i].sigval[0];
201 data[1] = sign->val[i].sigval[1]; 201 data[1] = sign->val[i].sigval[1];
202 data[2] = sign->val[i].sigval[2]; 202 data[2] = sign->val[i].sigval[2];