drm/radeon: allow TA_CS_BC_BASE_ADDR on SI

Required for border colors in compute shaders.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 7ee9aafbdf74..e402be8821c4 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -4431,6 +4431,7 @@ static bool si_vm_reg_valid(u32 reg)
         case SPI_CONFIG_CNTL:
         case SPI_CONFIG_CNTL_1:
         case TA_CNTL_AUX:
+        case TA_CS_BC_BASE_ADDR:
                 return true;
         default:
                 DRM_ERROR("Invalid register 0x%x in CS\n", reg);