drm/radeon/kms/r6xx+: add query for tile config (v2)

Userspace needs this information to access tiled
buffers via the CPU.

v2: rebased on evergreen accel changes

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 836c15ab84d1..236fe6681922 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -674,8 +674,9 @@ static void rv770_gpu_init(struct radeon_device *rdev)
                                                                  r600_count_pipe_bits((cc_rb_backend_disable &
                                                                                        R7XX_MAX_BACKENDS_MASK) >> 16)),
                                                                 (cc_rb_backend_disable >> 16));
-        gb_tiling_config |= BACKEND_MAP(backend_map);
 
+        rdev->config.rv770.tile_config = gb_tiling_config;
+        gb_tiling_config |= BACKEND_MAP(backend_map);
 
         WREG32(GB_TILING_CONFIG, gb_tiling_config);
         WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));