aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/r100.c
diff options
context:
space:
mode:
authorJerome Glisse <jglisse@redhat.com>2009-11-20 08:29:23 -0500
committerDave Airlie <airlied@redhat.com>2009-12-01 23:00:18 -0500
commit4c7886791264f03428d5424befb1b96f08fc90f4 (patch)
tree2c644931001b06969fb3038e7beb68db436c4872 /drivers/gpu/drm/radeon/r100.c
parent1614f8b17b8cc3ad143541d41569623d30dbc9ec (diff)
drm/radeon/kms: Rework radeon object handling
The locking & protection of radeon object was somewhat messy. This patch completely rework it to now use ttm reserve as a protection for the radeon object structure member. It also shrink down the various radeon object structure by removing field which were redondant with the ttm information. Last it converts few simple functions to inline which should with performances. airlied: rebase on top of r600 and other changes. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r--drivers/gpu/drm/radeon/r100.c90
1 files changed, 52 insertions, 38 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 04d4b4ca0ef3..9b2ac9d69c0f 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -261,24 +261,27 @@ int r100_wb_init(struct radeon_device *rdev)
261 int r; 261 int r;
262 262
263 if (rdev->wb.wb_obj == NULL) { 263 if (rdev->wb.wb_obj == NULL) {
264 r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, 264 r = radeon_bo_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true,
265 true, 265 RADEON_GEM_DOMAIN_GTT,
266 RADEON_GEM_DOMAIN_GTT, 266 &rdev->wb.wb_obj);
267 false, &rdev->wb.wb_obj);
268 if (r) { 267 if (r) {
269 DRM_ERROR("radeon: failed to create WB buffer (%d).\n", r); 268 dev_err(rdev->dev, "(%d) create WB buffer failed\n", r);
270 return r; 269 return r;
271 } 270 }
272 r = radeon_object_pin(rdev->wb.wb_obj, 271 r = radeon_bo_reserve(rdev->wb.wb_obj, false);
273 RADEON_GEM_DOMAIN_GTT, 272 if (unlikely(r != 0))
274 &rdev->wb.gpu_addr); 273 return r;
274 r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT,
275 &rdev->wb.gpu_addr);
275 if (r) { 276 if (r) {
276 DRM_ERROR("radeon: failed to pin WB buffer (%d).\n", r); 277 dev_err(rdev->dev, "(%d) pin WB buffer failed\n", r);
278 radeon_bo_unreserve(rdev->wb.wb_obj);
277 return r; 279 return r;
278 } 280 }
279 r = radeon_object_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb); 281 r = radeon_bo_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb);
282 radeon_bo_unreserve(rdev->wb.wb_obj);
280 if (r) { 283 if (r) {
281 DRM_ERROR("radeon: failed to map WB buffer (%d).\n", r); 284 dev_err(rdev->dev, "(%d) map WB buffer failed\n", r);
282 return r; 285 return r;
283 } 286 }
284 } 287 }
@@ -296,11 +299,19 @@ void r100_wb_disable(struct radeon_device *rdev)
296 299
297void r100_wb_fini(struct radeon_device *rdev) 300void r100_wb_fini(struct radeon_device *rdev)
298{ 301{
302 int r;
303
299 r100_wb_disable(rdev); 304 r100_wb_disable(rdev);
300 if (rdev->wb.wb_obj) { 305 if (rdev->wb.wb_obj) {
301 radeon_object_kunmap(rdev->wb.wb_obj); 306 r = radeon_bo_reserve(rdev->wb.wb_obj, false);
302 radeon_object_unpin(rdev->wb.wb_obj); 307 if (unlikely(r != 0)) {
303 radeon_object_unref(&rdev->wb.wb_obj); 308 dev_err(rdev->dev, "(%d) can't finish WB\n", r);
309 return;
310 }
311 radeon_bo_kunmap(rdev->wb.wb_obj);
312 radeon_bo_unpin(rdev->wb.wb_obj);
313 radeon_bo_unreserve(rdev->wb.wb_obj);
314 radeon_bo_unref(&rdev->wb.wb_obj);
304 rdev->wb.wb = NULL; 315 rdev->wb.wb = NULL;
305 rdev->wb.wb_obj = NULL; 316 rdev->wb.wb_obj = NULL;
306 } 317 }
@@ -1294,17 +1305,17 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1294 1305
1295int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, 1306int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
1296 struct radeon_cs_packet *pkt, 1307 struct radeon_cs_packet *pkt,
1297 struct radeon_object *robj) 1308 struct radeon_bo *robj)
1298{ 1309{
1299 unsigned idx; 1310 unsigned idx;
1300 u32 value; 1311 u32 value;
1301 idx = pkt->idx + 1; 1312 idx = pkt->idx + 1;
1302 value = radeon_get_ib_value(p, idx + 2); 1313 value = radeon_get_ib_value(p, idx + 2);
1303 if ((value + 1) > radeon_object_size(robj)) { 1314 if ((value + 1) > radeon_bo_size(robj)) {
1304 DRM_ERROR("[drm] Buffer too small for PACKET3 INDX_BUFFER " 1315 DRM_ERROR("[drm] Buffer too small for PACKET3 INDX_BUFFER "
1305 "(need %u have %lu) !\n", 1316 "(need %u have %lu) !\n",
1306 value + 1, 1317 value + 1,
1307 radeon_object_size(robj)); 1318 radeon_bo_size(robj));
1308 return -EINVAL; 1319 return -EINVAL;
1309 } 1320 }
1310 return 0; 1321 return 0;
@@ -2608,7 +2619,7 @@ static int r100_cs_track_cube(struct radeon_device *rdev,
2608 struct r100_cs_track *track, unsigned idx) 2619 struct r100_cs_track *track, unsigned idx)
2609{ 2620{
2610 unsigned face, w, h; 2621 unsigned face, w, h;
2611 struct radeon_object *cube_robj; 2622 struct radeon_bo *cube_robj;
2612 unsigned long size; 2623 unsigned long size;
2613 2624
2614 for (face = 0; face < 5; face++) { 2625 for (face = 0; face < 5; face++) {
@@ -2621,9 +2632,9 @@ static int r100_cs_track_cube(struct radeon_device *rdev,
2621 2632
2622 size += track->textures[idx].cube_info[face].offset; 2633 size += track->textures[idx].cube_info[face].offset;
2623 2634
2624 if (size > radeon_object_size(cube_robj)) { 2635 if (size > radeon_bo_size(cube_robj)) {
2625 DRM_ERROR("Cube texture offset greater than object size %lu %lu\n", 2636 DRM_ERROR("Cube texture offset greater than object size %lu %lu\n",
2626 size, radeon_object_size(cube_robj)); 2637 size, radeon_bo_size(cube_robj));
2627 r100_cs_track_texture_print(&track->textures[idx]); 2638 r100_cs_track_texture_print(&track->textures[idx]);
2628 return -1; 2639 return -1;
2629 } 2640 }
@@ -2634,7 +2645,7 @@ static int r100_cs_track_cube(struct radeon_device *rdev,
2634static int r100_cs_track_texture_check(struct radeon_device *rdev, 2645static int r100_cs_track_texture_check(struct radeon_device *rdev,
2635 struct r100_cs_track *track) 2646 struct r100_cs_track *track)
2636{ 2647{
2637 struct radeon_object *robj; 2648 struct radeon_bo *robj;
2638 unsigned long size; 2649 unsigned long size;
2639 unsigned u, i, w, h; 2650 unsigned u, i, w, h;
2640 int ret; 2651 int ret;
@@ -2690,9 +2701,9 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev,
2690 "%u\n", track->textures[u].tex_coord_type, u); 2701 "%u\n", track->textures[u].tex_coord_type, u);
2691 return -EINVAL; 2702 return -EINVAL;
2692 } 2703 }
2693 if (size > radeon_object_size(robj)) { 2704 if (size > radeon_bo_size(robj)) {
2694 DRM_ERROR("Texture of unit %u needs %lu bytes but is " 2705 DRM_ERROR("Texture of unit %u needs %lu bytes but is "
2695 "%lu\n", u, size, radeon_object_size(robj)); 2706 "%lu\n", u, size, radeon_bo_size(robj));
2696 r100_cs_track_texture_print(&track->textures[u]); 2707 r100_cs_track_texture_print(&track->textures[u]);
2697 return -EINVAL; 2708 return -EINVAL;
2698 } 2709 }
@@ -2714,10 +2725,10 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)
2714 } 2725 }
2715 size = track->cb[i].pitch * track->cb[i].cpp * track->maxy; 2726 size = track->cb[i].pitch * track->cb[i].cpp * track->maxy;
2716 size += track->cb[i].offset; 2727 size += track->cb[i].offset;
2717 if (size > radeon_object_size(track->cb[i].robj)) { 2728 if (size > radeon_bo_size(track->cb[i].robj)) {
2718 DRM_ERROR("[drm] Buffer too small for color buffer %d " 2729 DRM_ERROR("[drm] Buffer too small for color buffer %d "
2719 "(need %lu have %lu) !\n", i, size, 2730 "(need %lu have %lu) !\n", i, size,
2720 radeon_object_size(track->cb[i].robj)); 2731 radeon_bo_size(track->cb[i].robj));
2721 DRM_ERROR("[drm] color buffer %d (%u %u %u %u)\n", 2732 DRM_ERROR("[drm] color buffer %d (%u %u %u %u)\n",
2722 i, track->cb[i].pitch, track->cb[i].cpp, 2733 i, track->cb[i].pitch, track->cb[i].cpp,
2723 track->cb[i].offset, track->maxy); 2734 track->cb[i].offset, track->maxy);
@@ -2731,10 +2742,10 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)
2731 } 2742 }
2732 size = track->zb.pitch * track->zb.cpp * track->maxy; 2743 size = track->zb.pitch * track->zb.cpp * track->maxy;
2733 size += track->zb.offset; 2744 size += track->zb.offset;
2734 if (size > radeon_object_size(track->zb.robj)) { 2745 if (size > radeon_bo_size(track->zb.robj)) {
2735 DRM_ERROR("[drm] Buffer too small for z buffer " 2746 DRM_ERROR("[drm] Buffer too small for z buffer "
2736 "(need %lu have %lu) !\n", size, 2747 "(need %lu have %lu) !\n", size,
2737 radeon_object_size(track->zb.robj)); 2748 radeon_bo_size(track->zb.robj));
2738 DRM_ERROR("[drm] zbuffer (%u %u %u %u)\n", 2749 DRM_ERROR("[drm] zbuffer (%u %u %u %u)\n",
2739 track->zb.pitch, track->zb.cpp, 2750 track->zb.pitch, track->zb.cpp,
2740 track->zb.offset, track->maxy); 2751 track->zb.offset, track->maxy);
@@ -2752,11 +2763,12 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)
2752 "bound\n", prim_walk, i); 2763 "bound\n", prim_walk, i);
2753 return -EINVAL; 2764 return -EINVAL;
2754 } 2765 }
2755 if (size > radeon_object_size(track->arrays[i].robj)) { 2766 if (size > radeon_bo_size(track->arrays[i].robj)) {
2756 DRM_ERROR("(PW %u) Vertex array %u need %lu dwords " 2767 dev_err(rdev->dev, "(PW %u) Vertex array %u "
2757 "have %lu dwords\n", prim_walk, i, 2768 "need %lu dwords have %lu dwords\n",
2758 size >> 2, 2769 prim_walk, i, size >> 2,
2759 radeon_object_size(track->arrays[i].robj) >> 2); 2770 radeon_bo_size(track->arrays[i].robj)
2771 >> 2);
2760 DRM_ERROR("Max indices %u\n", track->max_indx); 2772 DRM_ERROR("Max indices %u\n", track->max_indx);
2761 return -EINVAL; 2773 return -EINVAL;
2762 } 2774 }
@@ -2770,10 +2782,12 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)
2770 "bound\n", prim_walk, i); 2782 "bound\n", prim_walk, i);
2771 return -EINVAL; 2783 return -EINVAL;
2772 } 2784 }
2773 if (size > radeon_object_size(track->arrays[i].robj)) { 2785 if (size > radeon_bo_size(track->arrays[i].robj)) {
2774 DRM_ERROR("(PW %u) Vertex array %u need %lu dwords " 2786 dev_err(rdev->dev, "(PW %u) Vertex array %u "
2775 "have %lu dwords\n", prim_walk, i, size >> 2, 2787 "need %lu dwords have %lu dwords\n",
2776 radeon_object_size(track->arrays[i].robj) >> 2); 2788 prim_walk, i, size >> 2,
2789 radeon_bo_size(track->arrays[i].robj)
2790 >> 2);
2777 return -EINVAL; 2791 return -EINVAL;
2778 } 2792 }
2779 } 2793 }
@@ -3188,7 +3202,7 @@ void r100_fini(struct radeon_device *rdev)
3188 r100_pci_gart_fini(rdev); 3202 r100_pci_gart_fini(rdev);
3189 radeon_irq_kms_fini(rdev); 3203 radeon_irq_kms_fini(rdev);
3190 radeon_fence_driver_fini(rdev); 3204 radeon_fence_driver_fini(rdev);
3191 radeon_object_fini(rdev); 3205 radeon_bo_fini(rdev);
3192 radeon_atombios_fini(rdev); 3206 radeon_atombios_fini(rdev);
3193 kfree(rdev->bios); 3207 kfree(rdev->bios);
3194 rdev->bios = NULL; 3208 rdev->bios = NULL;
@@ -3276,7 +3290,7 @@ int r100_init(struct radeon_device *rdev)
3276 if (r) 3290 if (r)
3277 return r; 3291 return r;
3278 /* Memory manager */ 3292 /* Memory manager */
3279 r = radeon_object_init(rdev); 3293 r = radeon_bo_init(rdev);
3280 if (r) 3294 if (r)
3281 return r; 3295 return r;
3282 if (rdev->flags & RADEON_IS_PCI) { 3296 if (rdev->flags & RADEON_IS_PCI) {