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authorPhilipp Zabel <p.zabel@pengutronix.de>2018-05-23 05:25:04 -0400
committerThierry Reding <treding@nvidia.com>2018-07-10 11:59:05 -0400
commit0ca0c827efdf248dfb4bbd4b9066acb6337e07ac (patch)
treea15c2204d051f7cf441c4a06a3eac3ee625dfff9 /drivers/gpu/drm/panel
parent7a6aca49358a8b678304f7444ec615dbb1175ce8 (diff)
drm/panel: simple: Add DLC DLC0700YZG-1 panel
This patch adds support for DLC DLC0700YZG-1 1024x600 LVDS panels to the simple-panel driver. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> [m.felsch@pengutronix.de: fix typo in compatible dt-binding] [m.felsch@pengutronix.de: add property bindings] Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180523092504.5142-3-m.felsch@pengutronix.de
Diffstat (limited to 'drivers/gpu/drm/panel')
-rw-r--r--drivers/gpu/drm/panel/panel-simple.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 5eb506256d42..230f030d1ea9 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -884,6 +884,35 @@ static const struct panel_desc chunghwa_claa101wb01 = {
884 }, 884 },
885}; 885};
886 886
887static const struct display_timing dlc_dlc0700yzg_1_timing = {
888 .pixelclock = { 45000000, 51200000, 57000000 },
889 .hactive = { 1024, 1024, 1024 },
890 .hfront_porch = { 100, 106, 113 },
891 .hback_porch = { 100, 106, 113 },
892 .hsync_len = { 100, 108, 114 },
893 .vactive = { 600, 600, 600 },
894 .vfront_porch = { 8, 11, 15 },
895 .vback_porch = { 8, 11, 15 },
896 .vsync_len = { 9, 13, 15 },
897 .flags = DISPLAY_FLAGS_DE_HIGH,
898};
899
900static const struct panel_desc dlc_dlc0700yzg_1 = {
901 .timings = &dlc_dlc0700yzg_1_timing,
902 .num_timings = 1,
903 .bpc = 6,
904 .size = {
905 .width = 154,
906 .height = 86,
907 },
908 .delay = {
909 .prepare = 30,
910 .enable = 200,
911 .disable = 200,
912 },
913 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
914};
915
887static const struct drm_display_mode edt_et057090dhu_mode = { 916static const struct drm_display_mode edt_et057090dhu_mode = {
888 .clock = 25175, 917 .clock = 25175,
889 .hdisplay = 640, 918 .hdisplay = 640,
@@ -2221,6 +2250,9 @@ static const struct of_device_id platform_of_match[] = {
2221 .compatible = "chunghwa,claa101wb01", 2250 .compatible = "chunghwa,claa101wb01",
2222 .data = &chunghwa_claa101wb01 2251 .data = &chunghwa_claa101wb01
2223 }, { 2252 }, {
2253 .compatible = "dlc,dlc0700yzg-1",
2254 .data = &dlc_dlc0700yzg_1,
2255 }, {
2224 .compatible = "edt,et057090dhu", 2256 .compatible = "edt,et057090dhu",
2225 .data = &edt_et057090dhu, 2257 .data = &edt_et057090dhu,
2226 }, { 2258 }, {