Merge airlied/drm-next into drm-misc-next

Backmerge the main pull request to sync up with all the newly landed
drivers. Otherwise we'll have chaos even before 4.12 started in
earnest.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

3 files changed, 35 insertions, 9 deletions

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 5554b72cf56a..d956e6266368 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -2506,6 +2506,25 @@ static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk,
                 return -EINVAL;
         }
 
+        if (*decim_x > 4 && color_mode != OMAP_DSS_COLOR_NV12) {
+                /*
+                 * Let's disable all scaling that requires horizontal
+                 * decimation with higher factor than 4, until we have
+                 * better estimates of what we can and can not
+                 * do. However, NV12 color format appears to work Ok
+                 * with all decimation factors.
+                 *
+                 * When decimating horizontally by more that 4 the dss
+                 * is not able to fetch the data in burst mode. When
+                 * this happens it is hard to tell if there enough
+                 * bandwidth. Despite what theory says this appears to
+                 * be true also for 16-bit color formats.
+                 */
+                DSSERR("Not enough bandwidth, too much downscaling (x-decimation factor %d > 4)", *decim_x);
+
+                return -EINVAL;
+        }
+
         *core_clk = dispc.feat->calc_core_clk(pclk, in_width, in_height,
                                 out_width, out_height, mem_to_mem);
         return 0;
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index bd18e8c4f1d0..2fe735c269fc 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -410,13 +410,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
                 dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
         }
 
-        /*
-         * Only flush the CRTC if it is currently enabled. CRTCs that require a
-         * mode set are disabled prior plane updates and enabled afterwards.
-         * They are thus not active (regardless of what their CRTC core state
-         * reports) and the DRM core could thus call this function even though
-         * the CRTC is currently disabled. Do nothing in that case.
-         */
+        /* Only flush the CRTC if it is currently enabled. */
         if (!omap_crtc->enabled)
                 return;
 
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index 586ed630d458..79a4aad35e0f 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -96,9 +96,22 @@ static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
         dispc_runtime_get();
 
         drm_atomic_helper_commit_modeset_disables(dev, old_state);
-        drm_atomic_helper_commit_planes(dev, old_state,
-                                        DRM_PLANE_COMMIT_ACTIVE_ONLY);
+
+        /* With the current dss dispc implementation we have to enable
+         * the new modeset before we can commit planes. The dispc ovl
+         * configuration relies on the video mode configuration been
+         * written into the HW when the ovl configuration is
+         * calculated.
+         *
+         * This approach is not ideal because after a mode change the
+         * plane update is executed only after the first vblank
+         * interrupt. The dispc implementation should be fixed so that
+         * it is able use uncommitted drm state information.
+         */
         drm_atomic_helper_commit_modeset_enables(dev, old_state);
+        omap_atomic_wait_for_completion(dev, old_state);
+
+        drm_atomic_helper_commit_planes(dev, old_state, 0);
 
         omap_atomic_wait_for_completion(dev, old_state);