diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-05-17 10:07:46 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-05-19 13:19:07 -0400 |
commit | 86c9305c864cc90e715edb29f1e708c9d494f8f8 (patch) | |
tree | 07727bad871382ab53b5fc7d5172129db86ec6a7 /drivers/gpu/drm/omapdrm | |
parent | 13ece4d309b339501bd4ed563a4754a8b43e721f (diff) |
drm/omap: HDMI PLL: use runtime pm
To make it possible to use HDMI PLL for other video outputs than HDMI,
the HDMI PLL code needs to do runtime_get/put for the HDMI IP, so that
the IP (include the PLL) is enabled.
To do that we also need to store the HDMI pdev in the hdmi_pll_data.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm')
-rw-r--r-- | drivers/gpu/drm/omapdrm/dss/hdmi.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/omapdrm/dss/hdmi_pll.c | 9 |
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi.h b/drivers/gpu/drm/omapdrm/dss/hdmi.h index 53616b02b613..d8757abfa175 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi.h +++ b/drivers/gpu/drm/omapdrm/dss/hdmi.h | |||
@@ -240,6 +240,7 @@ struct hdmi_pll_data { | |||
240 | 240 | ||
241 | void __iomem *base; | 241 | void __iomem *base; |
242 | 242 | ||
243 | struct platform_device *pdev; | ||
243 | struct hdmi_wp_data *wp; | 244 | struct hdmi_wp_data *wp; |
244 | }; | 245 | }; |
245 | 246 | ||
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c index 110ed50d5ce1..a9896e7454c5 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/clk.h> | 18 | #include <linux/clk.h> |
19 | #include <linux/pm_runtime.h> | ||
19 | 20 | ||
20 | #include <video/omapdss.h> | 21 | #include <video/omapdss.h> |
21 | 22 | ||
@@ -104,6 +105,9 @@ static int hdmi_pll_enable(struct dss_pll *dsspll) | |||
104 | struct hdmi_wp_data *wp = pll->wp; | 105 | struct hdmi_wp_data *wp = pll->wp; |
105 | int r; | 106 | int r; |
106 | 107 | ||
108 | r = pm_runtime_get_sync(&pll->pdev->dev); | ||
109 | WARN_ON(r < 0); | ||
110 | |||
107 | dss_ctrl_pll_enable(DSS_PLL_HDMI, true); | 111 | dss_ctrl_pll_enable(DSS_PLL_HDMI, true); |
108 | 112 | ||
109 | r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); | 113 | r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); |
@@ -117,10 +121,14 @@ static void hdmi_pll_disable(struct dss_pll *dsspll) | |||
117 | { | 121 | { |
118 | struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll); | 122 | struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll); |
119 | struct hdmi_wp_data *wp = pll->wp; | 123 | struct hdmi_wp_data *wp = pll->wp; |
124 | int r; | ||
120 | 125 | ||
121 | hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); | 126 | hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); |
122 | 127 | ||
123 | dss_ctrl_pll_enable(DSS_PLL_HDMI, false); | 128 | dss_ctrl_pll_enable(DSS_PLL_HDMI, false); |
129 | |||
130 | r = pm_runtime_put_sync(&pll->pdev->dev); | ||
131 | WARN_ON(r < 0 && r != -ENOSYS); | ||
124 | } | 132 | } |
125 | 133 | ||
126 | static const struct dss_pll_ops dsi_pll_ops = { | 134 | static const struct dss_pll_ops dsi_pll_ops = { |
@@ -228,6 +236,7 @@ int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll, | |||
228 | int r; | 236 | int r; |
229 | struct resource *res; | 237 | struct resource *res; |
230 | 238 | ||
239 | pll->pdev = pdev; | ||
231 | pll->wp = wp; | 240 | pll->wp = wp; |
232 | 241 | ||
233 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pll"); | 242 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pll"); |