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authorTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-17 09:08:54 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-19 13:19:07 -0400
commit331e6078457e0d774ecdf092829aaa19b59fb2b6 (patch)
tree3b05c6fa5a6a4616694d044b7c14165744ba51f5 /drivers/gpu/drm/omapdrm
parentef03b401266b687dab522dcf9a4e411074262898 (diff)
drm/omap: cleanup DPI clock source handling
We can clean up the DPI driver's clock source handling by using the dss_clk_source instead of only a dss_pll pointer. This will also make it possible to use additional clock sources, like PLL1_3 or HDMI_PLL, which the code did not support earlier. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm')
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dpi.c48
1 files changed, 18 insertions, 30 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c b/drivers/gpu/drm/omapdrm/dss/dpi.c
index d4fbc46536d9..5a5065691cad 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -45,6 +45,7 @@ struct dpi_data {
45 struct platform_device *pdev; 45 struct platform_device *pdev;
46 46
47 struct regulator *vdds_dsi_reg; 47 struct regulator *vdds_dsi_reg;
48 enum dss_clk_source clk_src;
48 struct dss_pll *pll; 49 struct dss_pll *pll;
49 50
50 struct mutex lock; 51 struct mutex lock;
@@ -69,7 +70,7 @@ static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
69 return dev_get_drvdata(&pdev->dev); 70 return dev_get_drvdata(&pdev->dev);
70} 71}
71 72
72static struct dss_pll *dpi_get_pll(enum omap_channel channel) 73static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel)
73{ 74{
74 /* 75 /*
75 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL 76 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
@@ -83,58 +84,44 @@ static struct dss_pll *dpi_get_pll(enum omap_channel channel)
83 case OMAPDSS_VER_OMAP3630: 84 case OMAPDSS_VER_OMAP3630:
84 case OMAPDSS_VER_AM35xx: 85 case OMAPDSS_VER_AM35xx:
85 case OMAPDSS_VER_AM43xx: 86 case OMAPDSS_VER_AM43xx:
86 return NULL; 87 return DSS_CLK_SRC_FCK;
87 88
88 case OMAPDSS_VER_OMAP4430_ES1: 89 case OMAPDSS_VER_OMAP4430_ES1:
89 case OMAPDSS_VER_OMAP4430_ES2: 90 case OMAPDSS_VER_OMAP4430_ES2:
90 case OMAPDSS_VER_OMAP4: 91 case OMAPDSS_VER_OMAP4:
91 switch (channel) { 92 switch (channel) {
92 case OMAP_DSS_CHANNEL_LCD: 93 case OMAP_DSS_CHANNEL_LCD:
93 return dss_pll_find("dsi0"); 94 return DSS_CLK_SRC_PLL1_1;
94 case OMAP_DSS_CHANNEL_LCD2: 95 case OMAP_DSS_CHANNEL_LCD2:
95 return dss_pll_find("dsi1"); 96 return DSS_CLK_SRC_PLL2_1;
96 default: 97 default:
97 return NULL; 98 return DSS_CLK_SRC_FCK;
98 } 99 }
99 100
100 case OMAPDSS_VER_OMAP5: 101 case OMAPDSS_VER_OMAP5:
101 switch (channel) { 102 switch (channel) {
102 case OMAP_DSS_CHANNEL_LCD: 103 case OMAP_DSS_CHANNEL_LCD:
103 return dss_pll_find("dsi0"); 104 return DSS_CLK_SRC_PLL1_1;
104 case OMAP_DSS_CHANNEL_LCD3: 105 case OMAP_DSS_CHANNEL_LCD3:
105 return dss_pll_find("dsi1"); 106 return DSS_CLK_SRC_PLL2_1;
107 case OMAP_DSS_CHANNEL_LCD2:
106 default: 108 default:
107 return NULL; 109 return DSS_CLK_SRC_FCK;
108 } 110 }
109 111
110 case OMAPDSS_VER_DRA7xx: 112 case OMAPDSS_VER_DRA7xx:
111 switch (channel) { 113 switch (channel) {
112 case OMAP_DSS_CHANNEL_LCD: 114 case OMAP_DSS_CHANNEL_LCD:
115 return DSS_CLK_SRC_PLL1_1;
113 case OMAP_DSS_CHANNEL_LCD2: 116 case OMAP_DSS_CHANNEL_LCD2:
114 return dss_pll_find("video0"); 117 return DSS_CLK_SRC_PLL1_3;
115 case OMAP_DSS_CHANNEL_LCD3: 118 case OMAP_DSS_CHANNEL_LCD3:
116 return dss_pll_find("video1"); 119 return DSS_CLK_SRC_PLL2_1;
117 default: 120 default:
118 return NULL; 121 return DSS_CLK_SRC_FCK;
119 } 122 }
120 123
121 default: 124 default:
122 return NULL;
123 }
124}
125
126static enum dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
127{
128 switch (channel) {
129 case OMAP_DSS_CHANNEL_LCD:
130 return DSS_CLK_SRC_PLL1_1;
131 case OMAP_DSS_CHANNEL_LCD2:
132 return DSS_CLK_SRC_PLL2_1;
133 case OMAP_DSS_CHANNEL_LCD3:
134 return DSS_CLK_SRC_PLL2_1;
135 default:
136 /* this shouldn't happen */
137 WARN_ON(1);
138 return DSS_CLK_SRC_FCK; 125 return DSS_CLK_SRC_FCK;
139 } 126 }
140} 127}
@@ -295,8 +282,7 @@ static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
295 if (r) 282 if (r)
296 return r; 283 return r;
297 284
298 dss_select_lcd_clk_source(channel, 285 dss_select_lcd_clk_source(channel, dpi->clk_src);
299 dpi_get_alt_clk_src(channel));
300 286
301 dpi->mgr_config.clock_info = ctx.dispc_cinfo; 287 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
302 288
@@ -602,7 +588,9 @@ static void dpi_init_pll(struct dpi_data *dpi)
602 if (dpi->pll) 588 if (dpi->pll)
603 return; 589 return;
604 590
605 pll = dpi_get_pll(dpi->output.dispc_channel); 591 dpi->clk_src = dpi_get_clk_src(dpi->output.dispc_channel);
592
593 pll = dss_pll_find_by_src(dpi->clk_src);
606 if (!pll) 594 if (!pll)
607 return; 595 return;
608 596