aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/nouveau
diff options
context:
space:
mode:
authorBen Skeggs <bskeggs@redhat.com>2012-01-12 00:34:54 -0500
committerBen Skeggs <bskeggs@redhat.com>2012-03-13 03:14:06 -0400
commit990449c77cafb77e7468722262c049675ab03e30 (patch)
treed6ed4aea5b2ce93eb294dfae870be30c7418527a /drivers/gpu/drm/nouveau
parent4abb410a13eec3f49863be2e84ad062fef00dac0 (diff)
drm/nv50-nvc0/vm: support unsnooped system memory
v2 (Emil Velikov <emil.l.velikov@gmail.com>): - Fixed a regression on certain nv50 IGP due to not passing the correct target type to nv50_vm_addr() Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Tested-by: Johannes Obermayr <johannesobermayr@gmx.de>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h1
-rw-r--r--drivers/gpu/drm/nouveau/nv50_vm.c29
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_vm.c4
3 files changed, 17 insertions, 17 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 63e77fc282f2..3a69a4aabd35 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1759,6 +1759,7 @@ nv44_graph_class(struct drm_device *dev)
1759#define NV_MEM_ACCESS_RW (NV_MEM_ACCESS_RO | NV_MEM_ACCESS_WO) 1759#define NV_MEM_ACCESS_RW (NV_MEM_ACCESS_RO | NV_MEM_ACCESS_WO)
1760#define NV_MEM_ACCESS_SYS 4 1760#define NV_MEM_ACCESS_SYS 4
1761#define NV_MEM_ACCESS_VM 8 1761#define NV_MEM_ACCESS_VM 8
1762#define NV_MEM_ACCESS_NOSNOOP 16
1762 1763
1763#define NV_MEM_TARGET_VRAM 0 1764#define NV_MEM_TARGET_VRAM 0
1764#define NV_MEM_TARGET_PCI 1 1765#define NV_MEM_TARGET_PCI 1
diff --git a/drivers/gpu/drm/nouveau/nv50_vm.c b/drivers/gpu/drm/nouveau/nv50_vm.c
index 6f38ceae3aa4..44fbac9c7d93 100644
--- a/drivers/gpu/drm/nouveau/nv50_vm.c
+++ b/drivers/gpu/drm/nouveau/nv50_vm.c
@@ -57,27 +57,15 @@ nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,
57} 57}
58 58
59static inline u64 59static inline u64
60nv50_vm_addr(struct nouveau_vma *vma, u64 phys, u32 memtype, u32 target) 60vm_addr(struct nouveau_vma *vma, u64 phys, u32 memtype, u32 target)
61{ 61{
62 struct drm_nouveau_private *dev_priv = vma->vm->dev->dev_private;
63
64 phys |= 1; /* present */ 62 phys |= 1; /* present */
65 phys |= (u64)memtype << 40; 63 phys |= (u64)memtype << 40;
66
67 /* IGPs don't have real VRAM, re-target to stolen system memory */
68 if (target == 0 && dev_priv->vram_sys_base) {
69 phys += dev_priv->vram_sys_base;
70 target = 3;
71 }
72
73 phys |= target << 4; 64 phys |= target << 4;
74
75 if (vma->access & NV_MEM_ACCESS_SYS) 65 if (vma->access & NV_MEM_ACCESS_SYS)
76 phys |= (1 << 6); 66 phys |= (1 << 6);
77
78 if (!(vma->access & NV_MEM_ACCESS_WO)) 67 if (!(vma->access & NV_MEM_ACCESS_WO))
79 phys |= (1 << 3); 68 phys |= (1 << 3);
80
81 return phys; 69 return phys;
82} 70}
83 71
@@ -85,11 +73,19 @@ void
85nv50_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt, 73nv50_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
86 struct nouveau_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta) 74 struct nouveau_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
87{ 75{
76 struct drm_nouveau_private *dev_priv = vma->vm->dev->dev_private;
88 u32 comp = (mem->memtype & 0x180) >> 7; 77 u32 comp = (mem->memtype & 0x180) >> 7;
89 u32 block; 78 u32 block, target;
90 int i; 79 int i;
91 80
92 phys = nv50_vm_addr(vma, phys, mem->memtype, 0); 81 /* IGPs don't have real VRAM, re-target to stolen system memory */
82 target = 0;
83 if (dev_priv->vram_sys_base) {
84 phys += dev_priv->vram_sys_base;
85 target = 3;
86 }
87
88 phys = vm_addr(vma, phys, mem->memtype, target);
93 pte <<= 3; 89 pte <<= 3;
94 cnt <<= 3; 90 cnt <<= 3;
95 91
@@ -125,9 +121,10 @@ void
125nv50_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt, 121nv50_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
126 struct nouveau_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) 122 struct nouveau_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
127{ 123{
124 u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 3 : 2;
128 pte <<= 3; 125 pte <<= 3;
129 while (cnt--) { 126 while (cnt--) {
130 u64 phys = nv50_vm_addr(vma, (u64)*list++, mem->memtype, 2); 127 u64 phys = vm_addr(vma, (u64)*list++, mem->memtype, target);
131 nv_wo32(pgt, pte + 0, lower_32_bits(phys)); 128 nv_wo32(pgt, pte + 0, lower_32_bits(phys));
132 nv_wo32(pgt, pte + 4, upper_32_bits(phys)); 129 nv_wo32(pgt, pte + 4, upper_32_bits(phys));
133 pte += 8; 130 pte += 8;
diff --git a/drivers/gpu/drm/nouveau/nvc0_vm.c b/drivers/gpu/drm/nouveau/nvc0_vm.c
index 9e352944a35a..30d2bd58828f 100644
--- a/drivers/gpu/drm/nouveau/nvc0_vm.c
+++ b/drivers/gpu/drm/nouveau/nvc0_vm.c
@@ -77,9 +77,11 @@ void
77nvc0_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt, 77nvc0_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
78 struct nouveau_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) 78 struct nouveau_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
79{ 79{
80 u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 7 : 5;
81
80 pte <<= 3; 82 pte <<= 3;
81 while (cnt--) { 83 while (cnt--) {
82 u64 phys = nvc0_vm_addr(vma, *list++, mem->memtype, 5); 84 u64 phys = nvc0_vm_addr(vma, *list++, mem->memtype, target);
83 nv_wo32(pgt, pte + 0, lower_32_bits(phys)); 85 nv_wo32(pgt, pte + 0, lower_32_bits(phys));
84 nv_wo32(pgt, pte + 4, upper_32_bits(phys)); 86 nv_wo32(pgt, pte + 4, upper_32_bits(phys));
85 pte += 8; 87 pte += 8;