diff options
author | Sean Paul <seanpaul@chromium.org> | 2018-09-12 09:54:54 -0400 |
---|---|---|
committer | Rob Clark <robdclark@gmail.com> | 2018-10-03 20:24:52 -0400 |
commit | 8df14b3e6ab367bdd939d52871ad80faf70ae8db (patch) | |
tree | d8da41634fb2d87a860eb647d8a7fa94e76bdafb /drivers/gpu/drm/msm | |
parent | 3d04dc1444be774d8b474962d01b65306756ec54 (diff) |
drm/msm: dpu: Move atomic_check_plane_state() call to atomic_check
src/dst rects are checked in both atomic_check and atomic_update, with
the more comprehensive check occurring in atomic_update, which is
backwards. So consolodate the checks in atomic_check.
Changes in v2:
- Use the correct crtc state (Jeykumar)
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm')
-rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 57 |
1 files changed, 17 insertions, 40 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 2c63c2693750..244b47f023bd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | |||
@@ -1081,13 +1081,27 @@ static bool dpu_plane_validate_src(struct drm_rect *src, | |||
1081 | static int dpu_plane_sspp_atomic_check(struct drm_plane *plane, | 1081 | static int dpu_plane_sspp_atomic_check(struct drm_plane *plane, |
1082 | struct drm_plane_state *state) | 1082 | struct drm_plane_state *state) |
1083 | { | 1083 | { |
1084 | int ret = 0; | 1084 | int ret = 0, min_scale; |
1085 | struct dpu_plane *pdpu = to_dpu_plane(plane); | 1085 | struct dpu_plane *pdpu = to_dpu_plane(plane); |
1086 | const struct drm_crtc_state *crtc_state = NULL; | ||
1086 | const struct dpu_format *fmt; | 1087 | const struct dpu_format *fmt; |
1087 | struct drm_rect src, dst, fb_rect = { 0 }; | 1088 | struct drm_rect src, dst, fb_rect = { 0 }; |
1088 | uint32_t max_upscale = 1, max_downscale = 1; | ||
1089 | uint32_t min_src_size, max_linewidth; | 1089 | uint32_t min_src_size, max_linewidth; |
1090 | int hscale = 1, vscale = 1; | 1090 | |
1091 | if (state->crtc) | ||
1092 | crtc_state = drm_atomic_get_new_crtc_state(state->state, | ||
1093 | state->crtc); | ||
1094 | |||
1095 | min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxdwnscale); | ||
1096 | ret = drm_atomic_helper_check_plane_state(state, crtc_state, min_scale, | ||
1097 | pdpu->pipe_sblk->maxupscale << 16, | ||
1098 | true, true); | ||
1099 | if (ret) { | ||
1100 | DPU_ERROR_PLANE(pdpu, "Check plane state failed (%d)\n", ret); | ||
1101 | return ret; | ||
1102 | } | ||
1103 | if (!state->visible) | ||
1104 | return 0; | ||
1091 | 1105 | ||
1092 | src.x1 = state->src_x >> 16; | 1106 | src.x1 = state->src_x >> 16; |
1093 | src.y1 = state->src_y >> 16; | 1107 | src.y1 = state->src_y >> 16; |
@@ -1101,25 +1115,6 @@ static int dpu_plane_sspp_atomic_check(struct drm_plane *plane, | |||
1101 | 1115 | ||
1102 | max_linewidth = pdpu->pipe_sblk->common->maxlinewidth; | 1116 | max_linewidth = pdpu->pipe_sblk->common->maxlinewidth; |
1103 | 1117 | ||
1104 | if (pdpu->features & DPU_SSPP_SCALER) { | ||
1105 | max_downscale = pdpu->pipe_sblk->maxdwnscale; | ||
1106 | max_upscale = pdpu->pipe_sblk->maxupscale; | ||
1107 | } | ||
1108 | if (drm_rect_width(&src) < drm_rect_width(&dst)) | ||
1109 | hscale = drm_rect_calc_hscale(&src, &dst, 1, max_upscale); | ||
1110 | else | ||
1111 | hscale = drm_rect_calc_hscale(&dst, &src, 1, max_downscale); | ||
1112 | if (drm_rect_height(&src) < drm_rect_height(&dst)) | ||
1113 | vscale = drm_rect_calc_vscale(&src, &dst, 1, max_upscale); | ||
1114 | else | ||
1115 | vscale = drm_rect_calc_vscale(&dst, &src, 1, max_downscale); | ||
1116 | |||
1117 | DPU_DEBUG_PLANE(pdpu, "check %d -> %d\n", | ||
1118 | dpu_plane_enabled(plane->state), dpu_plane_enabled(state)); | ||
1119 | |||
1120 | if (!dpu_plane_enabled(state)) | ||
1121 | goto exit; | ||
1122 | |||
1123 | fmt = to_dpu_format(msm_framebuffer_format(state->fb)); | 1118 | fmt = to_dpu_format(msm_framebuffer_format(state->fb)); |
1124 | 1119 | ||
1125 | min_src_size = DPU_FORMAT_IS_YUV(fmt) ? 2 : 1; | 1120 | min_src_size = DPU_FORMAT_IS_YUV(fmt) ? 2 : 1; |
@@ -1158,16 +1153,8 @@ static int dpu_plane_sspp_atomic_check(struct drm_plane *plane, | |||
1158 | DPU_ERROR_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", | 1153 | DPU_ERROR_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", |
1159 | DRM_RECT_ARG(&src), max_linewidth); | 1154 | DRM_RECT_ARG(&src), max_linewidth); |
1160 | ret = -E2BIG; | 1155 | ret = -E2BIG; |
1161 | |||
1162 | /* check scaler capability */ | ||
1163 | } else if (hscale < 0 || vscale < 0) { | ||
1164 | DPU_ERROR_PLANE(pdpu, "invalid scaling requested src=" | ||
1165 | DRM_RECT_FMT " dst=" DRM_RECT_FMT "\n", | ||
1166 | DRM_RECT_ARG(&src), DRM_RECT_ARG(&dst)); | ||
1167 | ret = -E2BIG; | ||
1168 | } | 1156 | } |
1169 | 1157 | ||
1170 | exit: | ||
1171 | return ret; | 1158 | return ret; |
1172 | } | 1159 | } |
1173 | 1160 | ||
@@ -1239,7 +1226,6 @@ static int dpu_plane_sspp_atomic_update(struct drm_plane *plane, | |||
1239 | const struct dpu_format *fmt; | 1226 | const struct dpu_format *fmt; |
1240 | struct drm_crtc *crtc; | 1227 | struct drm_crtc *crtc; |
1241 | struct drm_framebuffer *fb; | 1228 | struct drm_framebuffer *fb; |
1242 | int ret, min_scale; | ||
1243 | 1229 | ||
1244 | if (!plane) { | 1230 | if (!plane) { |
1245 | DPU_ERROR("invalid plane\n"); | 1231 | DPU_ERROR("invalid plane\n"); |
@@ -1278,15 +1264,6 @@ static int dpu_plane_sspp_atomic_update(struct drm_plane *plane, | |||
1278 | pdpu->is_rt_pipe = (dpu_crtc_get_client_type(crtc) != NRT_CLIENT); | 1264 | pdpu->is_rt_pipe = (dpu_crtc_get_client_type(crtc) != NRT_CLIENT); |
1279 | _dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL); | 1265 | _dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL); |
1280 | 1266 | ||
1281 | min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxdwnscale); | ||
1282 | ret = drm_atomic_helper_check_plane_state(state, crtc->state, min_scale, | ||
1283 | pdpu->pipe_sblk->maxupscale << 16, | ||
1284 | true, false); | ||
1285 | if (ret) { | ||
1286 | DPU_ERROR_PLANE(pdpu, "Check plane state failed (%d)\n", ret); | ||
1287 | return ret; | ||
1288 | } | ||
1289 | |||
1290 | DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT | 1267 | DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT |
1291 | ", %4.4s ubwc %d\n", fb->base.id, DRM_RECT_FP_ARG(&state->src), | 1268 | ", %4.4s ubwc %d\n", fb->base.id, DRM_RECT_FP_ARG(&state->src), |
1292 | crtc->base.id, DRM_RECT_ARG(&state->dst), | 1269 | crtc->base.id, DRM_RECT_ARG(&state->dst), |