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authorLinus Torvalds <torvalds@linux-foundation.org>2015-09-04 18:49:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-09-04 18:49:32 -0400
commitf377ea88b862bf7151be96d276f4cb740f8e1c41 (patch)
tree6205913431c012e285316281b6221a20d4a92128 /drivers/gpu/drm/msm/dsi/pll
parent51e771c0d25b43d0f12b2c7c01939942becbbe28 (diff)
parent73bf1b7be7aab60d7c651402441dd0b0b4991098 (diff)
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main pull request for the drm for 4.3. Nouveau is probably the biggest amount of changes in here, since it missed 4.2. Highlights below, along with the usual bunch of fixes. All stuff outside drm should have applicable acks. Highlights: - new drivers: freescale dcu kms driver - core: more atomic fixes disable some dri1 interfaces on kms drivers drop fb panic handling, this was just getting more broken, as more locking was required. new core fbdev Kconfig support - instead of each driver enable/disabling it struct_mutex cleanups - panel: more new panels cleanup Kconfig - i915: Skylake support enabled by default legacy modesetting using atomic infrastructure Skylake fixes GEN9 workarounds - amdgpu: Fiji support CGS support for amdgpu Initial GPU scheduler - off by default Lots of bug fixes and optimisations. - radeon: DP fixes misc fixes - amdkfd: Add Carrizo support for amdkfd using amdgpu. - nouveau: long pending cleanup to complete driver, fully bisectable which makes it larger, perfmon work more reclocking improvements maxwell displayport fixes - vmwgfx: new DX device support, supports OpenGL 3.3 screen targets support - mgag200: G200eW support G200e new revision support - msm: dragonboard 410c support, msm8x94 support, msm8x74v1 support yuv format support dma plane support mdp5 rotation initial hdcp - sti: atomic support - exynos: lots of cleanups atomic modesetting/pageflipping support render node support - tegra: tegra210 support (dc, dsi, dp/hdmi) dpms with atomic modesetting support - atmel: support for 3 more atmel SoCs new input formats, PRIME support. - dwhdmi: preparing to add audio support - rockchip: yuv plane support" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1369 commits) drm/amdgpu: rename gmc_v8_0_init_compute_vmid drm/amdgpu: fix vce3 instance handling drm/amdgpu: remove ib test for the second VCE Ring drm/amdgpu: properly enable VM fault interrupts drm/amdgpu: fix warning in scheduler drm/amdgpu: fix buffer placement under memory pressure drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logic drm/amdgpu: fix typo in dce11 watermark setup drm/amdgpu: fix typo in dce10 watermark setup drm/amdgpu: use top down allocation for non-CPU accessible vram drm/amdgpu: be explicit about cpu vram access for driver BOs (v2) drm/amdgpu: set MEC doorbell range for Fiji drm/amdgpu: implement burst NOP for SDMA drm/amdgpu: add insert_nop ring func and default implementation drm/amdgpu: add amdgpu_get_sdma_instance helper function drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES drm/amdgpu: add burst_nop flag for sdma drm/amdgpu: add count field for the SDMA NOP packet v2 drm/amdgpu: use PT for VM sync on unmap drm/amdgpu: make wait_event uninterruptible in push_job ...
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/pll')
-rw-r--r--drivers/gpu/drm/msm/dsi/pll/dsi_pll.c42
-rw-r--r--drivers/gpu/drm/msm/dsi/pll/dsi_pll.h9
-rw-r--r--drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c31
3 files changed, 46 insertions, 36 deletions
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
index 509376fdd112..5104fc9f9a53 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
@@ -72,31 +72,14 @@ long msm_dsi_pll_helper_clk_round_rate(struct clk_hw *hw,
72int msm_dsi_pll_helper_clk_prepare(struct clk_hw *hw) 72int msm_dsi_pll_helper_clk_prepare(struct clk_hw *hw)
73{ 73{
74 struct msm_dsi_pll *pll = hw_clk_to_pll(hw); 74 struct msm_dsi_pll *pll = hw_clk_to_pll(hw);
75 int ret;
76
77 /*
78 * Certain PLLs need to update the same VCO rate and registers
79 * after resume in suspend/resume scenario.
80 */
81 if (pll->restore_state) {
82 ret = pll->restore_state(pll);
83 if (ret)
84 goto error;
85 }
86 75
87 ret = dsi_pll_enable(pll); 76 return dsi_pll_enable(pll);
88
89error:
90 return ret;
91} 77}
92 78
93void msm_dsi_pll_helper_clk_unprepare(struct clk_hw *hw) 79void msm_dsi_pll_helper_clk_unprepare(struct clk_hw *hw)
94{ 80{
95 struct msm_dsi_pll *pll = hw_clk_to_pll(hw); 81 struct msm_dsi_pll *pll = hw_clk_to_pll(hw);
96 82
97 if (pll->save_state)
98 pll->save_state(pll);
99
100 dsi_pll_disable(pll); 83 dsi_pll_disable(pll);
101} 84}
102 85
@@ -134,6 +117,29 @@ void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
134 pll->destroy(pll); 117 pll->destroy(pll);
135} 118}
136 119
120void msm_dsi_pll_save_state(struct msm_dsi_pll *pll)
121{
122 if (pll->save_state) {
123 pll->save_state(pll);
124 pll->state_saved = true;
125 }
126}
127
128int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
129{
130 int ret;
131
132 if (pll->restore_state && pll->state_saved) {
133 ret = pll->restore_state(pll);
134 if (ret)
135 return ret;
136
137 pll->state_saved = false;
138 }
139
140 return 0;
141}
142
137struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 143struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
138 enum msm_dsi_phy_type type, int id) 144 enum msm_dsi_phy_type type, int id)
139{ 145{
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h
index 5a3bb241c039..063caa2c5740 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h
@@ -27,6 +27,7 @@ struct msm_dsi_pll {
27 27
28 struct clk_hw clk_hw; 28 struct clk_hw clk_hw;
29 bool pll_on; 29 bool pll_on;
30 bool state_saved;
30 31
31 unsigned long min_rate; 32 unsigned long min_rate;
32 unsigned long max_rate; 33 unsigned long max_rate;
@@ -82,8 +83,16 @@ void msm_dsi_pll_helper_unregister_clks(struct platform_device *pdev,
82/* 83/*
83 * Initialization for Each PLL Type 84 * Initialization for Each PLL Type
84 */ 85 */
86#ifdef CONFIG_DRM_MSM_DSI_28NM_PHY
85struct msm_dsi_pll *msm_dsi_pll_28nm_init(struct platform_device *pdev, 87struct msm_dsi_pll *msm_dsi_pll_28nm_init(struct platform_device *pdev,
86 enum msm_dsi_phy_type type, int id); 88 enum msm_dsi_phy_type type, int id);
89#else
90static inline struct msm_dsi_pll *msm_dsi_pll_28nm_init(
91 struct platform_device *pdev, enum msm_dsi_phy_type type, int id)
92{
93 return ERR_PTR(-ENODEV);
94}
95#endif
87 96
88#endif /* __DSI_PLL_H__ */ 97#endif /* __DSI_PLL_H__ */
89 98
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
index 18b7727bdc57..598fdaff0a41 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
@@ -465,26 +465,21 @@ static int dsi_pll_28nm_restore_state(struct msm_dsi_pll *pll)
465 void __iomem *base = pll_28nm->mmio; 465 void __iomem *base = pll_28nm->mmio;
466 int ret; 466 int ret;
467 467
468 if ((cached_state->vco_rate != 0) && 468 ret = dsi_pll_28nm_clk_set_rate(&pll->clk_hw,
469 (cached_state->vco_rate == clk_hw_get_rate(&pll->clk_hw))) { 469 cached_state->vco_rate, 0);
470 ret = dsi_pll_28nm_clk_set_rate(&pll->clk_hw, 470 if (ret) {
471 cached_state->vco_rate, 0); 471 dev_err(&pll_28nm->pdev->dev,
472 if (ret) { 472 "restore vco rate failed. ret=%d\n", ret);
473 dev_err(&pll_28nm->pdev->dev, 473 return ret;
474 "restore vco rate failed. ret=%d\n", ret);
475 return ret;
476 }
477
478 pll_write(base + REG_DSI_28nm_PHY_PLL_POSTDIV3_CFG,
479 cached_state->postdiv3);
480 pll_write(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG,
481 cached_state->postdiv1);
482 pll_write(base + REG_DSI_28nm_PHY_PLL_VREG_CFG,
483 cached_state->byte_mux);
484
485 cached_state->vco_rate = 0;
486 } 474 }
487 475
476 pll_write(base + REG_DSI_28nm_PHY_PLL_POSTDIV3_CFG,
477 cached_state->postdiv3);
478 pll_write(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG,
479 cached_state->postdiv1);
480 pll_write(base + REG_DSI_28nm_PHY_PLL_VREG_CFG,
481 cached_state->byte_mux);
482
488 return 0; 483 return 0;
489} 484}
490 485