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authorDaniel Vetter <daniel.vetter@ffwll.ch>2017-02-26 15:34:42 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2017-02-26 15:34:42 -0500
commit8e22e1b3499a446df48c2b26667ca36c55bf864c (patch)
tree5329f98b3eb3c95a9dcbab0fa4f9b6e62f0e788d /drivers/gpu/drm/msm/adreno/adreno_device.c
parent00d3c14f14d51babd8aeafd5fa734ccf04f5ca3d (diff)
parent64a577196d66b44e37384bc5c4d78c61f59d5b2a (diff)
Merge airlied/drm-next into drm-misc-next
Backmerge the main pull request to sync up with all the newly landed drivers. Otherwise we'll have chaos even before 4.12 started in earnest. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_device.c')
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_device.c62
1 files changed, 46 insertions, 16 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 893eb2b2531b..ece39b16a864 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -75,12 +75,14 @@ static const struct adreno_info gpulist[] = {
75 .gmem = (SZ_1M + SZ_512K), 75 .gmem = (SZ_1M + SZ_512K),
76 .init = a4xx_gpu_init, 76 .init = a4xx_gpu_init,
77 }, { 77 }, {
78 .rev = ADRENO_REV(5, 3, 0, ANY_ID), 78 .rev = ADRENO_REV(5, 3, 0, 2),
79 .revn = 530, 79 .revn = 530,
80 .name = "A530", 80 .name = "A530",
81 .pm4fw = "a530_pm4.fw", 81 .pm4fw = "a530_pm4.fw",
82 .pfpfw = "a530_pfp.fw", 82 .pfpfw = "a530_pfp.fw",
83 .gmem = SZ_1M, 83 .gmem = SZ_1M,
84 .quirks = ADRENO_QUIRK_TWO_PASS_USE_WFI |
85 ADRENO_QUIRK_FAULT_DETECT_MASK,
84 .init = a5xx_gpu_init, 86 .init = a5xx_gpu_init,
85 .gpmufw = "a530v3_gpmu.fw2", 87 .gpmufw = "a530v3_gpmu.fw2",
86 }, 88 },
@@ -181,22 +183,51 @@ static void set_gpu_pdev(struct drm_device *dev,
181 priv->gpu_pdev = pdev; 183 priv->gpu_pdev = pdev;
182} 184}
183 185
184static const struct { 186static int find_chipid(struct device *dev, u32 *chipid)
185 const char *str; 187{
186 uint32_t flag; 188 struct device_node *node = dev->of_node;
187} quirks[] = { 189 const char *compat;
188 { "qcom,gpu-quirk-two-pass-use-wfi", ADRENO_QUIRK_TWO_PASS_USE_WFI }, 190 int ret;
189 { "qcom,gpu-quirk-fault-detect-mask", ADRENO_QUIRK_FAULT_DETECT_MASK }, 191
190}; 192 /* first search the compat strings for qcom,adreno-XYZ.W: */
193 ret = of_property_read_string_index(node, "compatible", 0, &compat);
194 if (ret == 0) {
195 unsigned rev, patch;
196
197 if (sscanf(compat, "qcom,adreno-%u.%u", &rev, &patch) == 2) {
198 *chipid = 0;
199 *chipid |= (rev / 100) << 24; /* core */
200 rev %= 100;
201 *chipid |= (rev / 10) << 16; /* major */
202 rev %= 10;
203 *chipid |= rev << 8; /* minor */
204 *chipid |= patch;
205
206 return 0;
207 }
208 }
209
210 /* and if that fails, fall back to legacy "qcom,chipid" property: */
211 ret = of_property_read_u32(node, "qcom,chipid", chipid);
212 if (ret)
213 return ret;
214
215 dev_warn(dev, "Using legacy qcom,chipid binding!\n");
216 dev_warn(dev, "Use compatible qcom,adreno-%u%u%u.%u instead.\n",
217 (*chipid >> 24) & 0xff, (*chipid >> 16) & 0xff,
218 (*chipid >> 8) & 0xff, *chipid & 0xff);
219
220 return 0;
221}
191 222
192static int adreno_bind(struct device *dev, struct device *master, void *data) 223static int adreno_bind(struct device *dev, struct device *master, void *data)
193{ 224{
194 static struct adreno_platform_config config = {}; 225 static struct adreno_platform_config config = {};
195 struct device_node *child, *node = dev->of_node; 226 struct device_node *child, *node = dev->of_node;
196 u32 val; 227 u32 val;
197 int ret, i; 228 int ret;
198 229
199 ret = of_property_read_u32(node, "qcom,chipid", &val); 230 ret = find_chipid(dev, &val);
200 if (ret) { 231 if (ret) {
201 dev_err(dev, "could not find chipid: %d\n", ret); 232 dev_err(dev, "could not find chipid: %d\n", ret);
202 return ret; 233 return ret;
@@ -224,14 +255,12 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
224 } 255 }
225 256
226 if (!config.fast_rate) { 257 if (!config.fast_rate) {
227 dev_err(dev, "could not find clk rates\n"); 258 dev_warn(dev, "could not find clk rates\n");
228 return -ENXIO; 259 /* This is a safe low speed for all devices: */
260 config.fast_rate = 200000000;
261 config.slow_rate = 27000000;
229 } 262 }
230 263
231 for (i = 0; i < ARRAY_SIZE(quirks); i++)
232 if (of_property_read_bool(node, quirks[i].str))
233 config.quirks |= quirks[i].flag;
234
235 dev->platform_data = &config; 264 dev->platform_data = &config;
236 set_gpu_pdev(dev_get_drvdata(master), to_platform_device(dev)); 265 set_gpu_pdev(dev_get_drvdata(master), to_platform_device(dev));
237 return 0; 266 return 0;
@@ -260,6 +289,7 @@ static int adreno_remove(struct platform_device *pdev)
260} 289}
261 290
262static const struct of_device_id dt_match[] = { 291static const struct of_device_id dt_match[] = {
292 { .compatible = "qcom,adreno" },
263 { .compatible = "qcom,adreno-3xx" }, 293 { .compatible = "qcom,adreno-3xx" },
264 /* for backwards compat w/ downstream kgsl DT files: */ 294 /* for backwards compat w/ downstream kgsl DT files: */
265 { .compatible = "qcom,kgsl-3d0" }, 295 { .compatible = "qcom,kgsl-3d0" },