diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-09-02 08:33:42 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-09-02 08:33:42 -0400 |
commit | e93c28f39375558409329a02a767d5cadfcc4a31 (patch) | |
tree | 9f1b4b5ce765b887b6002cded59fc934e6c9c012 /drivers/gpu/drm/i915 | |
parent | 85a62bf9d8ef8d533635270ae985281c58e8c974 (diff) | |
parent | 6fa2d197936ba0b8936e813d0adecefac160062b (diff) |
Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queued
Backmerge -fixes since there's more DDI-E related cleanups on top of
the pile of -fixes for skl that just landed for 4.3.
Conflicts:
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i914/intel_dp.c
drivers/gpu/drm/i915/intel_lrc.c
Conflicts are all fairly harmless adjacent line stuff.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/Kconfig | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/Makefile | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_stolen.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 48 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_bios.c | 119 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_bios.h | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 75 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 60 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 75 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp_mst.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_fbdev.c | 61 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 21 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_hotplug.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 2 |
20 files changed, 313 insertions, 237 deletions
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index eb87e2538861..051eab33e4c7 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig | |||
@@ -36,21 +36,6 @@ config DRM_I915 | |||
36 | i810 driver instead, and the Atom z5xx series has an entirely | 36 | i810 driver instead, and the Atom z5xx series has an entirely |
37 | different implementation. | 37 | different implementation. |
38 | 38 | ||
39 | config DRM_I915_FBDEV | ||
40 | bool "Enable legacy fbdev support for the modesetting intel driver" | ||
41 | depends on DRM_I915 | ||
42 | select DRM_KMS_FB_HELPER | ||
43 | select FB_CFB_FILLRECT | ||
44 | select FB_CFB_COPYAREA | ||
45 | select FB_CFB_IMAGEBLIT | ||
46 | default y | ||
47 | help | ||
48 | Choose this option if you have a need for the legacy fbdev | ||
49 | support. Note that this support also provide the linux console | ||
50 | support on top of the intel modesetting driver. | ||
51 | |||
52 | If in doubt, say "Y". | ||
53 | |||
54 | config DRM_I915_PRELIMINARY_HW_SUPPORT | 39 | config DRM_I915_PRELIMINARY_HW_SUPPORT |
55 | bool "Enable preliminary support for prerelease Intel hardware by default" | 40 | bool "Enable preliminary support for prerelease Intel hardware by default" |
56 | depends on DRM_I915 | 41 | depends on DRM_I915 |
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index ddb69f337dc6..44d290ae1999 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile | |||
@@ -66,7 +66,7 @@ i915-y += intel_audio.o \ | |||
66 | intel_sideband.o \ | 66 | intel_sideband.o \ |
67 | intel_sprite.o | 67 | intel_sprite.o |
68 | i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o | 68 | i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o |
69 | i915-$(CONFIG_DRM_I915_FBDEV) += intel_fbdev.o | 69 | i915-$(CONFIG_DRM_FBDEV_EMULATION) += intel_fbdev.o |
70 | 70 | ||
71 | # modesetting output/encoder code | 71 | # modesetting output/encoder code |
72 | i915-y += dvo_ch7017.o \ | 72 | i915-y += dvo_ch7017.o \ |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 2f1b693d7162..4563f8b955ea 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1863,7 +1863,7 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data) | |||
1863 | struct intel_framebuffer *fb; | 1863 | struct intel_framebuffer *fb; |
1864 | struct drm_framebuffer *drm_fb; | 1864 | struct drm_framebuffer *drm_fb; |
1865 | 1865 | ||
1866 | #ifdef CONFIG_DRM_I915_FBDEV | 1866 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
1867 | struct drm_i915_private *dev_priv = dev->dev_private; | 1867 | struct drm_i915_private *dev_priv = dev->dev_private; |
1868 | 1868 | ||
1869 | ifbdev = dev_priv->fbdev; | 1869 | ifbdev = dev_priv->fbdev; |
@@ -2700,6 +2700,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain) | |||
2700 | return "PORT_DDI_D_2_LANES"; | 2700 | return "PORT_DDI_D_2_LANES"; |
2701 | case POWER_DOMAIN_PORT_DDI_D_4_LANES: | 2701 | case POWER_DOMAIN_PORT_DDI_D_4_LANES: |
2702 | return "PORT_DDI_D_4_LANES"; | 2702 | return "PORT_DDI_D_4_LANES"; |
2703 | case POWER_DOMAIN_PORT_DDI_E_2_LANES: | ||
2704 | return "PORT_DDI_E_2_LANES"; | ||
2703 | case POWER_DOMAIN_PORT_DSI: | 2705 | case POWER_DOMAIN_PORT_DSI: |
2704 | return "PORT_DSI"; | 2706 | return "PORT_DSI"; |
2705 | case POWER_DOMAIN_PORT_CRT: | 2707 | case POWER_DOMAIN_PORT_CRT: |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 4646fe1a0499..4737d15de5f0 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -665,15 +665,18 @@ static int i915_drm_suspend_late(struct drm_device *drm_dev, bool hibernation) | |||
665 | 665 | ||
666 | pci_disable_device(drm_dev->pdev); | 666 | pci_disable_device(drm_dev->pdev); |
667 | /* | 667 | /* |
668 | * During hibernation on some GEN4 platforms the BIOS may try to access | 668 | * During hibernation on some platforms the BIOS may try to access |
669 | * the device even though it's already in D3 and hang the machine. So | 669 | * the device even though it's already in D3 and hang the machine. So |
670 | * leave the device in D0 on those platforms and hope the BIOS will | 670 | * leave the device in D0 on those platforms and hope the BIOS will |
671 | * power down the device properly. Platforms where this was seen: | 671 | * power down the device properly. The issue was seen on multiple old |
672 | * Lenovo Thinkpad X301, X61s | 672 | * GENs with different BIOS vendors, so having an explicit blacklist |
673 | * is inpractical; apply the workaround on everything pre GEN6. The | ||
674 | * platforms where the issue was seen: | ||
675 | * Lenovo Thinkpad X301, X61s, X60, T60, X41 | ||
676 | * Fujitsu FSC S7110 | ||
677 | * Acer Aspire 1830T | ||
673 | */ | 678 | */ |
674 | if (!(hibernation && | 679 | if (!(hibernation && INTEL_INFO(dev_priv)->gen < 6)) |
675 | drm_dev->pdev->subsystem_vendor == PCI_VENDOR_ID_LENOVO && | ||
676 | INTEL_INFO(dev_priv)->gen == 4)) | ||
677 | pci_set_power_state(drm_dev->pdev, PCI_D3hot); | 680 | pci_set_power_state(drm_dev->pdev, PCI_D3hot); |
678 | 681 | ||
679 | return 0; | 682 | return 0; |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 1d99402e4a1e..4eabe19a684f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -188,6 +188,7 @@ enum intel_display_power_domain { | |||
188 | POWER_DOMAIN_PORT_DDI_C_4_LANES, | 188 | POWER_DOMAIN_PORT_DDI_C_4_LANES, |
189 | POWER_DOMAIN_PORT_DDI_D_2_LANES, | 189 | POWER_DOMAIN_PORT_DDI_D_2_LANES, |
190 | POWER_DOMAIN_PORT_DDI_D_4_LANES, | 190 | POWER_DOMAIN_PORT_DDI_D_4_LANES, |
191 | POWER_DOMAIN_PORT_DDI_E_2_LANES, | ||
191 | POWER_DOMAIN_PORT_DSI, | 192 | POWER_DOMAIN_PORT_DSI, |
192 | POWER_DOMAIN_PORT_CRT, | 193 | POWER_DOMAIN_PORT_CRT, |
193 | POWER_DOMAIN_PORT_OTHER, | 194 | POWER_DOMAIN_PORT_OTHER, |
@@ -220,6 +221,7 @@ enum hpd_pin { | |||
220 | HPD_PORT_B, | 221 | HPD_PORT_B, |
221 | HPD_PORT_C, | 222 | HPD_PORT_C, |
222 | HPD_PORT_D, | 223 | HPD_PORT_D, |
224 | HPD_PORT_E, | ||
223 | HPD_NUM_PINS | 225 | HPD_NUM_PINS |
224 | }; | 226 | }; |
225 | 227 | ||
@@ -1421,6 +1423,10 @@ enum modeset_restore { | |||
1421 | #define DP_AUX_C 0x20 | 1423 | #define DP_AUX_C 0x20 |
1422 | #define DP_AUX_D 0x30 | 1424 | #define DP_AUX_D 0x30 |
1423 | 1425 | ||
1426 | #define DDC_PIN_B 0x05 | ||
1427 | #define DDC_PIN_C 0x04 | ||
1428 | #define DDC_PIN_D 0x06 | ||
1429 | |||
1424 | struct ddi_vbt_port_info { | 1430 | struct ddi_vbt_port_info { |
1425 | /* | 1431 | /* |
1426 | * This is an index in the HDMI/DVI DDI buffer translation table. | 1432 | * This is an index in the HDMI/DVI DDI buffer translation table. |
@@ -1435,6 +1441,7 @@ struct ddi_vbt_port_info { | |||
1435 | uint8_t supports_dp:1; | 1441 | uint8_t supports_dp:1; |
1436 | 1442 | ||
1437 | uint8_t alternate_aux_channel; | 1443 | uint8_t alternate_aux_channel; |
1444 | uint8_t alternate_ddc_pin; | ||
1438 | 1445 | ||
1439 | uint8_t dp_boost_level; | 1446 | uint8_t dp_boost_level; |
1440 | uint8_t hdmi_boost_level; | 1447 | uint8_t hdmi_boost_level; |
@@ -1875,7 +1882,7 @@ struct drm_i915_private { | |||
1875 | 1882 | ||
1876 | struct drm_i915_gem_object *vlv_pctx; | 1883 | struct drm_i915_gem_object *vlv_pctx; |
1877 | 1884 | ||
1878 | #ifdef CONFIG_DRM_I915_FBDEV | 1885 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
1879 | /* list of fbdev register on this device */ | 1886 | /* list of fbdev register on this device */ |
1880 | struct intel_fbdev *fbdev; | 1887 | struct intel_fbdev *fbdev; |
1881 | struct work_struct fbdev_suspend_work; | 1888 | struct work_struct fbdev_suspend_work; |
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c index a36cb95ec798..f361c4a56995 100644 --- a/drivers/gpu/drm/i915/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c | |||
@@ -348,7 +348,7 @@ int i915_gem_init_stolen(struct drm_device *dev) | |||
348 | * memory, so just consider the start. */ | 348 | * memory, so just consider the start. */ |
349 | reserved_total = stolen_top - reserved_base; | 349 | reserved_total = stolen_top - reserved_base; |
350 | 350 | ||
351 | DRM_DEBUG_KMS("Memory reserved for graphics device: %luK, usable: %luK\n", | 351 | DRM_DEBUG_KMS("Memory reserved for graphics device: %zuK, usable: %luK\n", |
352 | dev_priv->gtt.stolen_size >> 10, | 352 | dev_priv->gtt.stolen_size >> 10, |
353 | (dev_priv->gtt.stolen_size - reserved_total) >> 10); | 353 | (dev_priv->gtt.stolen_size - reserved_total) >> 10); |
354 | 354 | ||
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index a05104562932..8485bea966cc 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -61,6 +61,13 @@ static const u32 hpd_cpt[HPD_NUM_PINS] = { | |||
61 | [HPD_PORT_D] = SDE_PORTD_HOTPLUG_CPT | 61 | [HPD_PORT_D] = SDE_PORTD_HOTPLUG_CPT |
62 | }; | 62 | }; |
63 | 63 | ||
64 | static const u32 hpd_spt[HPD_NUM_PINS] = { | ||
65 | [HPD_PORT_B] = SDE_PORTB_HOTPLUG_CPT, | ||
66 | [HPD_PORT_C] = SDE_PORTC_HOTPLUG_CPT, | ||
67 | [HPD_PORT_D] = SDE_PORTD_HOTPLUG_CPT, | ||
68 | [HPD_PORT_E] = SDE_PORTE_HOTPLUG_SPT | ||
69 | }; | ||
70 | |||
64 | static const u32 hpd_mask_i915[HPD_NUM_PINS] = { | 71 | static const u32 hpd_mask_i915[HPD_NUM_PINS] = { |
65 | [HPD_CRT] = CRT_HOTPLUG_INT_EN, | 72 | [HPD_CRT] = CRT_HOTPLUG_INT_EN, |
66 | [HPD_SDVO_B] = SDVOB_HOTPLUG_INT_EN, | 73 | [HPD_SDVO_B] = SDVOB_HOTPLUG_INT_EN, |
@@ -1253,6 +1260,8 @@ static bool pch_port_hotplug_long_detect(enum port port, u32 val) | |||
1253 | return val & PORTC_HOTPLUG_LONG_DETECT; | 1260 | return val & PORTC_HOTPLUG_LONG_DETECT; |
1254 | case PORT_D: | 1261 | case PORT_D: |
1255 | return val & PORTD_HOTPLUG_LONG_DETECT; | 1262 | return val & PORTD_HOTPLUG_LONG_DETECT; |
1263 | case PORT_E: | ||
1264 | return val & PORTE_HOTPLUG_LONG_DETECT; | ||
1256 | default: | 1265 | default: |
1257 | return false; | 1266 | return false; |
1258 | } | 1267 | } |
@@ -1753,7 +1762,12 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir) | |||
1753 | { | 1762 | { |
1754 | struct drm_i915_private *dev_priv = dev->dev_private; | 1763 | struct drm_i915_private *dev_priv = dev->dev_private; |
1755 | int pipe; | 1764 | int pipe; |
1756 | u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT; | 1765 | u32 hotplug_trigger; |
1766 | |||
1767 | if (HAS_PCH_SPT(dev)) | ||
1768 | hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT; | ||
1769 | else | ||
1770 | hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT; | ||
1757 | 1771 | ||
1758 | if (hotplug_trigger) { | 1772 | if (hotplug_trigger) { |
1759 | u32 dig_hotplug_reg, pin_mask, long_mask; | 1773 | u32 dig_hotplug_reg, pin_mask, long_mask; |
@@ -1761,9 +1775,23 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir) | |||
1761 | dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG); | 1775 | dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG); |
1762 | I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); | 1776 | I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); |
1763 | 1777 | ||
1764 | intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, | 1778 | if (HAS_PCH_SPT(dev)) { |
1765 | dig_hotplug_reg, hpd_cpt, | 1779 | intel_get_hpd_pins(&pin_mask, &long_mask, |
1766 | pch_port_hotplug_long_detect); | 1780 | hotplug_trigger, |
1781 | dig_hotplug_reg, hpd_spt, | ||
1782 | pch_port_hotplug_long_detect); | ||
1783 | |||
1784 | /* detect PORTE HP event */ | ||
1785 | dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2); | ||
1786 | if (pch_port_hotplug_long_detect(PORT_E, | ||
1787 | dig_hotplug_reg)) | ||
1788 | long_mask |= 1 << HPD_PORT_E; | ||
1789 | } else | ||
1790 | intel_get_hpd_pins(&pin_mask, &long_mask, | ||
1791 | hotplug_trigger, | ||
1792 | dig_hotplug_reg, hpd_cpt, | ||
1793 | pch_port_hotplug_long_detect); | ||
1794 | |||
1767 | intel_hpd_irq_handler(dev, pin_mask, long_mask); | 1795 | intel_hpd_irq_handler(dev, pin_mask, long_mask); |
1768 | } | 1796 | } |
1769 | 1797 | ||
@@ -2985,6 +3013,11 @@ static void ibx_hpd_irq_setup(struct drm_device *dev) | |||
2985 | for_each_intel_encoder(dev, intel_encoder) | 3013 | for_each_intel_encoder(dev, intel_encoder) |
2986 | if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state == HPD_ENABLED) | 3014 | if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state == HPD_ENABLED) |
2987 | enabled_irqs |= hpd_ibx[intel_encoder->hpd_pin]; | 3015 | enabled_irqs |= hpd_ibx[intel_encoder->hpd_pin]; |
3016 | } else if (HAS_PCH_SPT(dev)) { | ||
3017 | hotplug_irqs = SDE_HOTPLUG_MASK_SPT; | ||
3018 | for_each_intel_encoder(dev, intel_encoder) | ||
3019 | if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state == HPD_ENABLED) | ||
3020 | enabled_irqs |= hpd_spt[intel_encoder->hpd_pin]; | ||
2988 | } else { | 3021 | } else { |
2989 | hotplug_irqs = SDE_HOTPLUG_MASK_CPT; | 3022 | hotplug_irqs = SDE_HOTPLUG_MASK_CPT; |
2990 | for_each_intel_encoder(dev, intel_encoder) | 3023 | for_each_intel_encoder(dev, intel_encoder) |
@@ -3006,6 +3039,13 @@ static void ibx_hpd_irq_setup(struct drm_device *dev) | |||
3006 | hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms; | 3039 | hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms; |
3007 | hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms; | 3040 | hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms; |
3008 | I915_WRITE(PCH_PORT_HOTPLUG, hotplug); | 3041 | I915_WRITE(PCH_PORT_HOTPLUG, hotplug); |
3042 | |||
3043 | /* enable SPT PORTE hot plug */ | ||
3044 | if (HAS_PCH_SPT(dev)) { | ||
3045 | hotplug = I915_READ(PCH_PORT_HOTPLUG2); | ||
3046 | hotplug |= PORTE_HOTPLUG_ENABLE; | ||
3047 | I915_WRITE(PCH_PORT_HOTPLUG2, hotplug); | ||
3048 | } | ||
3009 | } | 3049 | } |
3010 | 3050 | ||
3011 | static void bxt_hpd_irq_setup(struct drm_device *dev) | 3051 | static void bxt_hpd_irq_setup(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c82db2aed55c..e7c9dc8e24fe 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -5981,6 +5981,7 @@ enum skl_disp_power_wells { | |||
5981 | #define SDE_AUXC_CPT (1 << 26) | 5981 | #define SDE_AUXC_CPT (1 << 26) |
5982 | #define SDE_AUXB_CPT (1 << 25) | 5982 | #define SDE_AUXB_CPT (1 << 25) |
5983 | #define SDE_AUX_MASK_CPT (7 << 25) | 5983 | #define SDE_AUX_MASK_CPT (7 << 25) |
5984 | #define SDE_PORTE_HOTPLUG_SPT (1 << 25) | ||
5984 | #define SDE_PORTD_HOTPLUG_CPT (1 << 23) | 5985 | #define SDE_PORTD_HOTPLUG_CPT (1 << 23) |
5985 | #define SDE_PORTC_HOTPLUG_CPT (1 << 22) | 5986 | #define SDE_PORTC_HOTPLUG_CPT (1 << 22) |
5986 | #define SDE_PORTB_HOTPLUG_CPT (1 << 21) | 5987 | #define SDE_PORTB_HOTPLUG_CPT (1 << 21) |
@@ -5991,6 +5992,10 @@ enum skl_disp_power_wells { | |||
5991 | SDE_PORTD_HOTPLUG_CPT | \ | 5992 | SDE_PORTD_HOTPLUG_CPT | \ |
5992 | SDE_PORTC_HOTPLUG_CPT | \ | 5993 | SDE_PORTC_HOTPLUG_CPT | \ |
5993 | SDE_PORTB_HOTPLUG_CPT) | 5994 | SDE_PORTB_HOTPLUG_CPT) |
5995 | #define SDE_HOTPLUG_MASK_SPT (SDE_PORTE_HOTPLUG_SPT | \ | ||
5996 | SDE_PORTD_HOTPLUG_CPT | \ | ||
5997 | SDE_PORTC_HOTPLUG_CPT | \ | ||
5998 | SDE_PORTB_HOTPLUG_CPT) | ||
5994 | #define SDE_GMBUS_CPT (1 << 17) | 5999 | #define SDE_GMBUS_CPT (1 << 17) |
5995 | #define SDE_ERROR_CPT (1 << 16) | 6000 | #define SDE_ERROR_CPT (1 << 16) |
5996 | #define SDE_AUDIO_CP_REQ_C_CPT (1 << 10) | 6001 | #define SDE_AUDIO_CP_REQ_C_CPT (1 << 10) |
@@ -6062,6 +6067,13 @@ enum skl_disp_power_wells { | |||
6062 | #define PORTB_HOTPLUG_SHORT_DETECT (1 << 0) | 6067 | #define PORTB_HOTPLUG_SHORT_DETECT (1 << 0) |
6063 | #define PORTB_HOTPLUG_LONG_DETECT (2 << 0) | 6068 | #define PORTB_HOTPLUG_LONG_DETECT (2 << 0) |
6064 | 6069 | ||
6070 | #define PCH_PORT_HOTPLUG2 0xc403C /* SHOTPLUG_CTL2 */ | ||
6071 | #define PORTE_HOTPLUG_ENABLE (1 << 4) | ||
6072 | #define PORTE_HOTPLUG_STATUS_MASK (0x3 << 0) | ||
6073 | #define PORTE_HOTPLUG_NO_DETECT (0 << 0) | ||
6074 | #define PORTE_HOTPLUG_SHORT_DETECT (1 << 0) | ||
6075 | #define PORTE_HOTPLUG_LONG_DETECT (2 << 0) | ||
6076 | |||
6065 | #define PCH_GPIOA 0xc5010 | 6077 | #define PCH_GPIOA 0xc5010 |
6066 | #define PCH_GPIOB 0xc5014 | 6078 | #define PCH_GPIOB 0xc5014 |
6067 | #define PCH_GPIOC 0xc5018 | 6079 | #define PCH_GPIOC 0xc5018 |
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 8e46149bafdd..b3e437b3bb54 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c | |||
@@ -401,7 +401,7 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |||
401 | { | 401 | { |
402 | struct sdvo_device_mapping *p_mapping; | 402 | struct sdvo_device_mapping *p_mapping; |
403 | const struct bdb_general_definitions *p_defs; | 403 | const struct bdb_general_definitions *p_defs; |
404 | const union child_device_config *p_child; | 404 | const struct old_child_dev_config *child; /* legacy */ |
405 | int i, child_device_num, count; | 405 | int i, child_device_num, count; |
406 | u16 block_size; | 406 | u16 block_size; |
407 | 407 | ||
@@ -410,14 +410,14 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |||
410 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); | 410 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
411 | return; | 411 | return; |
412 | } | 412 | } |
413 | /* judge whether the size of child device meets the requirements. | 413 | |
414 | * If the child device size obtained from general definition block | 414 | /* |
415 | * is different with sizeof(struct child_device_config), skip the | 415 | * Only parse SDVO mappings when the general definitions block child |
416 | * parsing of sdvo device info | 416 | * device size matches that of the *legacy* child device config |
417 | * struct. Thus, SDVO mapping will be skipped for newer VBT. | ||
417 | */ | 418 | */ |
418 | if (p_defs->child_dev_size != sizeof(*p_child)) { | 419 | if (p_defs->child_dev_size != sizeof(*child)) { |
419 | /* different child dev size . Ignore it */ | 420 | DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n"); |
420 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); | ||
421 | return; | 421 | return; |
422 | } | 422 | } |
423 | /* get the block size of general definitions */ | 423 | /* get the block size of general definitions */ |
@@ -427,37 +427,37 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |||
427 | p_defs->child_dev_size; | 427 | p_defs->child_dev_size; |
428 | count = 0; | 428 | count = 0; |
429 | for (i = 0; i < child_device_num; i++) { | 429 | for (i = 0; i < child_device_num; i++) { |
430 | p_child = child_device_ptr(p_defs, i); | 430 | child = &child_device_ptr(p_defs, i)->old; |
431 | if (!p_child->old.device_type) { | 431 | if (!child->device_type) { |
432 | /* skip the device block if device type is invalid */ | 432 | /* skip the device block if device type is invalid */ |
433 | continue; | 433 | continue; |
434 | } | 434 | } |
435 | if (p_child->old.slave_addr != SLAVE_ADDR1 && | 435 | if (child->slave_addr != SLAVE_ADDR1 && |
436 | p_child->old.slave_addr != SLAVE_ADDR2) { | 436 | child->slave_addr != SLAVE_ADDR2) { |
437 | /* | 437 | /* |
438 | * If the slave address is neither 0x70 nor 0x72, | 438 | * If the slave address is neither 0x70 nor 0x72, |
439 | * it is not a SDVO device. Skip it. | 439 | * it is not a SDVO device. Skip it. |
440 | */ | 440 | */ |
441 | continue; | 441 | continue; |
442 | } | 442 | } |
443 | if (p_child->old.dvo_port != DEVICE_PORT_DVOB && | 443 | if (child->dvo_port != DEVICE_PORT_DVOB && |
444 | p_child->old.dvo_port != DEVICE_PORT_DVOC) { | 444 | child->dvo_port != DEVICE_PORT_DVOC) { |
445 | /* skip the incorrect SDVO port */ | 445 | /* skip the incorrect SDVO port */ |
446 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); | 446 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
447 | continue; | 447 | continue; |
448 | } | 448 | } |
449 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" | 449 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
450 | " %s port\n", | 450 | " %s port\n", |
451 | p_child->old.slave_addr, | 451 | child->slave_addr, |
452 | (p_child->old.dvo_port == DEVICE_PORT_DVOB) ? | 452 | (child->dvo_port == DEVICE_PORT_DVOB) ? |
453 | "SDVOB" : "SDVOC"); | 453 | "SDVOB" : "SDVOC"); |
454 | p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]); | 454 | p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]); |
455 | if (!p_mapping->initialized) { | 455 | if (!p_mapping->initialized) { |
456 | p_mapping->dvo_port = p_child->old.dvo_port; | 456 | p_mapping->dvo_port = child->dvo_port; |
457 | p_mapping->slave_addr = p_child->old.slave_addr; | 457 | p_mapping->slave_addr = child->slave_addr; |
458 | p_mapping->dvo_wiring = p_child->old.dvo_wiring; | 458 | p_mapping->dvo_wiring = child->dvo_wiring; |
459 | p_mapping->ddc_pin = p_child->old.ddc_pin; | 459 | p_mapping->ddc_pin = child->ddc_pin; |
460 | p_mapping->i2c_pin = p_child->old.i2c_pin; | 460 | p_mapping->i2c_pin = child->i2c_pin; |
461 | p_mapping->initialized = 1; | 461 | p_mapping->initialized = 1; |
462 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", | 462 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
463 | p_mapping->dvo_port, | 463 | p_mapping->dvo_port, |
@@ -469,7 +469,7 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |||
469 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " | 469 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
470 | "two SDVO device.\n"); | 470 | "two SDVO device.\n"); |
471 | } | 471 | } |
472 | if (p_child->old.slave2_addr) { | 472 | if (child->slave2_addr) { |
473 | /* Maybe this is a SDVO device with multiple inputs */ | 473 | /* Maybe this is a SDVO device with multiple inputs */ |
474 | /* And the mapping info is not added */ | 474 | /* And the mapping info is not added */ |
475 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" | 475 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
@@ -905,23 +905,23 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, | |||
905 | uint8_t hdmi_level_shift; | 905 | uint8_t hdmi_level_shift; |
906 | int i, j; | 906 | int i, j; |
907 | bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; | 907 | bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; |
908 | uint8_t aux_channel; | 908 | uint8_t aux_channel, ddc_pin; |
909 | /* Each DDI port can have more than one value on the "DVO Port" field, | 909 | /* Each DDI port can have more than one value on the "DVO Port" field, |
910 | * so look for all the possible values for each port and abort if more | 910 | * so look for all the possible values for each port and abort if more |
911 | * than one is found. */ | 911 | * than one is found. */ |
912 | int dvo_ports[][2] = { | 912 | int dvo_ports[][3] = { |
913 | {DVO_PORT_HDMIA, DVO_PORT_DPA}, | 913 | {DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, |
914 | {DVO_PORT_HDMIB, DVO_PORT_DPB}, | 914 | {DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, |
915 | {DVO_PORT_HDMIC, DVO_PORT_DPC}, | 915 | {DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, |
916 | {DVO_PORT_HDMID, DVO_PORT_DPD}, | 916 | {DVO_PORT_HDMID, DVO_PORT_DPD, -1}, |
917 | {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ }, | 917 | {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, |
918 | }; | 918 | }; |
919 | 919 | ||
920 | /* Find the child device to use, abort if more than one found. */ | 920 | /* Find the child device to use, abort if more than one found. */ |
921 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | 921 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { |
922 | it = dev_priv->vbt.child_dev + i; | 922 | it = dev_priv->vbt.child_dev + i; |
923 | 923 | ||
924 | for (j = 0; j < 2; j++) { | 924 | for (j = 0; j < 3; j++) { |
925 | if (dvo_ports[port][j] == -1) | 925 | if (dvo_ports[port][j] == -1) |
926 | break; | 926 | break; |
927 | 927 | ||
@@ -939,6 +939,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, | |||
939 | return; | 939 | return; |
940 | 940 | ||
941 | aux_channel = child->raw[25]; | 941 | aux_channel = child->raw[25]; |
942 | ddc_pin = child->common.ddc_pin; | ||
942 | 943 | ||
943 | is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; | 944 | is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; |
944 | is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; | 945 | is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; |
@@ -970,11 +971,27 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, | |||
970 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); | 971 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); |
971 | 972 | ||
972 | if (is_dvi) { | 973 | if (is_dvi) { |
973 | if (child->common.ddc_pin == 0x05 && port != PORT_B) | 974 | if (port == PORT_E) { |
975 | info->alternate_ddc_pin = ddc_pin; | ||
976 | /* if DDIE share ddc pin with other port, then | ||
977 | * dvi/hdmi couldn't exist on the shared port. | ||
978 | * Otherwise they share the same ddc bin and system | ||
979 | * couldn't communicate with them seperately. */ | ||
980 | if (ddc_pin == DDC_PIN_B) { | ||
981 | dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0; | ||
982 | dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0; | ||
983 | } else if (ddc_pin == DDC_PIN_C) { | ||
984 | dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0; | ||
985 | dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0; | ||
986 | } else if (ddc_pin == DDC_PIN_D) { | ||
987 | dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0; | ||
988 | dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0; | ||
989 | } | ||
990 | } else if (ddc_pin == DDC_PIN_B && port != PORT_B) | ||
974 | DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); | 991 | DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); |
975 | if (child->common.ddc_pin == 0x04 && port != PORT_C) | 992 | else if (ddc_pin == DDC_PIN_C && port != PORT_C) |
976 | DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); | 993 | DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); |
977 | if (child->common.ddc_pin == 0x06 && port != PORT_D) | 994 | else if (ddc_pin == DDC_PIN_D && port != PORT_D) |
978 | DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); | 995 | DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); |
979 | } | 996 | } |
980 | 997 | ||
@@ -1060,27 +1077,30 @@ parse_device_mapping(struct drm_i915_private *dev_priv, | |||
1060 | return; | 1077 | return; |
1061 | } | 1078 | } |
1062 | if (bdb->version < 195) { | 1079 | if (bdb->version < 195) { |
1063 | expected_size = 33; | 1080 | expected_size = sizeof(struct old_child_dev_config); |
1064 | } else if (bdb->version == 195) { | 1081 | } else if (bdb->version == 195) { |
1065 | expected_size = 37; | 1082 | expected_size = 37; |
1066 | } else if (bdb->version <= 197) { | 1083 | } else if (bdb->version <= 197) { |
1067 | expected_size = 38; | 1084 | expected_size = 38; |
1068 | } else { | 1085 | } else { |
1069 | expected_size = 38; | 1086 | expected_size = 38; |
1070 | DRM_DEBUG_DRIVER("Expected child_device_config size for BDB version %u not known; assuming %u\n", | 1087 | BUILD_BUG_ON(sizeof(*p_child) < 38); |
1071 | expected_size, bdb->version); | 1088 | DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", |
1089 | bdb->version, expected_size); | ||
1072 | } | 1090 | } |
1073 | 1091 | ||
1074 | if (expected_size > sizeof(*p_child)) { | 1092 | /* The legacy sized child device config is the minimum we need. */ |
1075 | DRM_ERROR("child_device_config cannot fit in p_child\n"); | 1093 | if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) { |
1094 | DRM_ERROR("Child device config size %u is too small.\n", | ||
1095 | p_defs->child_dev_size); | ||
1076 | return; | 1096 | return; |
1077 | } | 1097 | } |
1078 | 1098 | ||
1079 | if (p_defs->child_dev_size != expected_size) { | 1099 | /* Flag an error for unexpected size, but continue anyway. */ |
1080 | DRM_ERROR("Size mismatch; child_device_config size=%u (expected %u); bdb->version: %u\n", | 1100 | if (p_defs->child_dev_size != expected_size) |
1101 | DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", | ||
1081 | p_defs->child_dev_size, expected_size, bdb->version); | 1102 | p_defs->child_dev_size, expected_size, bdb->version); |
1082 | return; | 1103 | |
1083 | } | ||
1084 | /* get the block size of general definitions */ | 1104 | /* get the block size of general definitions */ |
1085 | block_size = get_blocksize(p_defs); | 1105 | block_size = get_blocksize(p_defs); |
1086 | /* get the number of child device */ | 1106 | /* get the number of child device */ |
@@ -1125,7 +1145,14 @@ parse_device_mapping(struct drm_i915_private *dev_priv, | |||
1125 | 1145 | ||
1126 | child_dev_ptr = dev_priv->vbt.child_dev + count; | 1146 | child_dev_ptr = dev_priv->vbt.child_dev + count; |
1127 | count++; | 1147 | count++; |
1128 | memcpy(child_dev_ptr, p_child, p_defs->child_dev_size); | 1148 | |
1149 | /* | ||
1150 | * Copy as much as we know (sizeof) and is available | ||
1151 | * (child_dev_size) of the child device. Accessing the data must | ||
1152 | * depend on VBT version. | ||
1153 | */ | ||
1154 | memcpy(child_dev_ptr, p_child, | ||
1155 | min_t(size_t, p_defs->child_dev_size, sizeof(*p_child))); | ||
1129 | } | 1156 | } |
1130 | return; | 1157 | return; |
1131 | } | 1158 | } |
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index 6d909efbf43f..46cd5c7ebacd 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h | |||
@@ -203,9 +203,11 @@ struct bdb_general_features { | |||
203 | #define DEVICE_PORT_DVOB 0x01 | 203 | #define DEVICE_PORT_DVOB 0x01 |
204 | #define DEVICE_PORT_DVOC 0x02 | 204 | #define DEVICE_PORT_DVOC 0x02 |
205 | 205 | ||
206 | /* We used to keep this struct but without any version control. We should avoid | 206 | /* |
207 | * We used to keep this struct but without any version control. We should avoid | ||
207 | * using it in the future, but it should be safe to keep using it in the old | 208 | * using it in the future, but it should be safe to keep using it in the old |
208 | * code. */ | 209 | * code. Do not change; we rely on its size. |
210 | */ | ||
209 | struct old_child_dev_config { | 211 | struct old_child_dev_config { |
210 | u16 handle; | 212 | u16 handle; |
211 | u16 device_type; | 213 | u16 device_type; |
@@ -756,11 +758,6 @@ int intel_parse_bios(struct drm_device *dev); | |||
756 | #define DVO_C 2 | 758 | #define DVO_C 2 |
757 | #define DVO_D 3 | 759 | #define DVO_D 3 |
758 | 760 | ||
759 | /* define the PORT for DP output type */ | ||
760 | #define PORT_IDPB 7 | ||
761 | #define PORT_IDPC 8 | ||
762 | #define PORT_IDPD 9 | ||
763 | |||
764 | /* Possible values for the "DVO Port" field for versions >= 155: */ | 761 | /* Possible values for the "DVO Port" field for versions >= 155: */ |
765 | #define DVO_PORT_HDMIA 0 | 762 | #define DVO_PORT_HDMIA 0 |
766 | #define DVO_PORT_HDMIB 1 | 763 | #define DVO_PORT_HDMIB 1 |
@@ -773,6 +770,8 @@ int intel_parse_bios(struct drm_device *dev); | |||
773 | #define DVO_PORT_DPC 8 | 770 | #define DVO_PORT_DPC 8 |
774 | #define DVO_PORT_DPD 9 | 771 | #define DVO_PORT_DPD 9 |
775 | #define DVO_PORT_DPA 10 | 772 | #define DVO_PORT_DPA 10 |
773 | #define DVO_PORT_DPE 11 | ||
774 | #define DVO_PORT_HDMIE 12 | ||
776 | #define DVO_PORT_MIPIA 21 | 775 | #define DVO_PORT_MIPIA 21 |
777 | #define DVO_PORT_MIPIB 22 | 776 | #define DVO_PORT_MIPIB 22 |
778 | #define DVO_PORT_MIPIC 23 | 777 | #define DVO_PORT_MIPIC 23 |
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 5dff8b7e0f03..4823184258a0 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -128,7 +128,7 @@ static const struct ddi_buf_trans bdw_ddi_translations_hdmi[] = { | |||
128 | { 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */ | 128 | { 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */ |
129 | }; | 129 | }; |
130 | 130 | ||
131 | /* Skylake H, S, and Skylake Y with 0.95V VccIO */ | 131 | /* Skylake H and S */ |
132 | static const struct ddi_buf_trans skl_ddi_translations_dp[] = { | 132 | static const struct ddi_buf_trans skl_ddi_translations_dp[] = { |
133 | { 0x00002016, 0x000000A0, 0x0 }, | 133 | { 0x00002016, 0x000000A0, 0x0 }, |
134 | { 0x00005012, 0x0000009B, 0x0 }, | 134 | { 0x00005012, 0x0000009B, 0x0 }, |
@@ -143,23 +143,23 @@ static const struct ddi_buf_trans skl_ddi_translations_dp[] = { | |||
143 | 143 | ||
144 | /* Skylake U */ | 144 | /* Skylake U */ |
145 | static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = { | 145 | static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = { |
146 | { 0x00002016, 0x000000A2, 0x0 }, | 146 | { 0x0000201B, 0x000000A2, 0x0 }, |
147 | { 0x00005012, 0x00000088, 0x0 }, | 147 | { 0x00005012, 0x00000088, 0x0 }, |
148 | { 0x00007011, 0x00000087, 0x0 }, | 148 | { 0x00007011, 0x00000087, 0x0 }, |
149 | { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */ | 149 | { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost level 0x1 */ |
150 | { 0x00002016, 0x0000009D, 0x0 }, | 150 | { 0x0000201B, 0x0000009D, 0x0 }, |
151 | { 0x00005012, 0x000000C7, 0x0 }, | 151 | { 0x00005012, 0x000000C7, 0x0 }, |
152 | { 0x00007011, 0x000000C7, 0x0 }, | 152 | { 0x00007011, 0x000000C7, 0x0 }, |
153 | { 0x00002016, 0x00000088, 0x0 }, | 153 | { 0x00002016, 0x00000088, 0x0 }, |
154 | { 0x00005012, 0x000000C7, 0x0 }, | 154 | { 0x00005012, 0x000000C7, 0x0 }, |
155 | }; | 155 | }; |
156 | 156 | ||
157 | /* Skylake Y with 0.85V VccIO */ | 157 | /* Skylake Y */ |
158 | static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = { | 158 | static const struct ddi_buf_trans skl_y_ddi_translations_dp[] = { |
159 | { 0x00000018, 0x000000A2, 0x0 }, | 159 | { 0x00000018, 0x000000A2, 0x0 }, |
160 | { 0x00005012, 0x00000088, 0x0 }, | 160 | { 0x00005012, 0x00000088, 0x0 }, |
161 | { 0x00007011, 0x00000087, 0x0 }, | 161 | { 0x00007011, 0x00000087, 0x0 }, |
162 | { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */ | 162 | { 0x80009010, 0x000000C7, 0x3 }, /* Uses I_boost level 0x3 */ |
163 | { 0x00000018, 0x0000009D, 0x0 }, | 163 | { 0x00000018, 0x0000009D, 0x0 }, |
164 | { 0x00005012, 0x000000C7, 0x0 }, | 164 | { 0x00005012, 0x000000C7, 0x0 }, |
165 | { 0x00007011, 0x000000C7, 0x0 }, | 165 | { 0x00007011, 0x000000C7, 0x0 }, |
@@ -168,7 +168,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = { | |||
168 | }; | 168 | }; |
169 | 169 | ||
170 | /* | 170 | /* |
171 | * Skylake H and S, and Skylake Y with 0.95V VccIO | 171 | * Skylake H and S |
172 | * eDP 1.4 low vswing translation parameters | 172 | * eDP 1.4 low vswing translation parameters |
173 | */ | 173 | */ |
174 | static const struct ddi_buf_trans skl_ddi_translations_edp[] = { | 174 | static const struct ddi_buf_trans skl_ddi_translations_edp[] = { |
@@ -202,10 +202,10 @@ static const struct ddi_buf_trans skl_u_ddi_translations_edp[] = { | |||
202 | }; | 202 | }; |
203 | 203 | ||
204 | /* | 204 | /* |
205 | * Skylake Y with 0.95V VccIO | 205 | * Skylake Y |
206 | * eDP 1.4 low vswing translation parameters | 206 | * eDP 1.4 low vswing translation parameters |
207 | */ | 207 | */ |
208 | static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = { | 208 | static const struct ddi_buf_trans skl_y_ddi_translations_edp[] = { |
209 | { 0x00000018, 0x000000A8, 0x0 }, | 209 | { 0x00000018, 0x000000A8, 0x0 }, |
210 | { 0x00004013, 0x000000AB, 0x0 }, | 210 | { 0x00004013, 0x000000AB, 0x0 }, |
211 | { 0x00007011, 0x000000A4, 0x0 }, | 211 | { 0x00007011, 0x000000A4, 0x0 }, |
@@ -218,7 +218,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = { | |||
218 | { 0x00000018, 0x0000008A, 0x0 }, | 218 | { 0x00000018, 0x0000008A, 0x0 }, |
219 | }; | 219 | }; |
220 | 220 | ||
221 | /* Skylake H, S and U, and Skylake Y with 0.95V VccIO */ | 221 | /* Skylake U, H and S */ |
222 | static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = { | 222 | static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = { |
223 | { 0x00000018, 0x000000AC, 0x0 }, | 223 | { 0x00000018, 0x000000AC, 0x0 }, |
224 | { 0x00005012, 0x0000009D, 0x0 }, | 224 | { 0x00005012, 0x0000009D, 0x0 }, |
@@ -233,8 +233,8 @@ static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = { | |||
233 | { 0x00000018, 0x000000C7, 0x0 }, | 233 | { 0x00000018, 0x000000C7, 0x0 }, |
234 | }; | 234 | }; |
235 | 235 | ||
236 | /* Skylake Y with 0.85V VccIO */ | 236 | /* Skylake Y */ |
237 | static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = { | 237 | static const struct ddi_buf_trans skl_y_ddi_translations_hdmi[] = { |
238 | { 0x00000018, 0x000000A1, 0x0 }, | 238 | { 0x00000018, 0x000000A1, 0x0 }, |
239 | { 0x00005012, 0x000000DF, 0x0 }, | 239 | { 0x00005012, 0x000000DF, 0x0 }, |
240 | { 0x00007011, 0x00000084, 0x0 }, | 240 | { 0x00007011, 0x00000084, 0x0 }, |
@@ -244,7 +244,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = { | |||
244 | { 0x00006013, 0x000000C7, 0x0 }, | 244 | { 0x00006013, 0x000000C7, 0x0 }, |
245 | { 0x00000018, 0x0000008A, 0x0 }, | 245 | { 0x00000018, 0x0000008A, 0x0 }, |
246 | { 0x00003015, 0x000000C7, 0x0 }, /* Default */ | 246 | { 0x00003015, 0x000000C7, 0x0 }, /* Default */ |
247 | { 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost */ | 247 | { 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost level 0x7 */ |
248 | { 0x00000018, 0x000000C7, 0x0 }, | 248 | { 0x00000018, 0x000000C7, 0x0 }, |
249 | }; | 249 | }; |
250 | 250 | ||
@@ -335,19 +335,11 @@ intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port) | |||
335 | static const struct ddi_buf_trans *skl_get_buf_trans_dp(struct drm_device *dev, | 335 | static const struct ddi_buf_trans *skl_get_buf_trans_dp(struct drm_device *dev, |
336 | int *n_entries) | 336 | int *n_entries) |
337 | { | 337 | { |
338 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
339 | const struct ddi_buf_trans *ddi_translations; | 338 | const struct ddi_buf_trans *ddi_translations; |
340 | static int is_095v = -1; | ||
341 | |||
342 | if (is_095v == -1) { | ||
343 | u32 spr1 = I915_READ(UAIMI_SPR1); | ||
344 | |||
345 | is_095v = spr1 & SKL_VCCIO_MASK; | ||
346 | } | ||
347 | 339 | ||
348 | if (IS_SKL_ULX(dev) && !is_095v) { | 340 | if (IS_SKL_ULX(dev)) { |
349 | ddi_translations = skl_y_085v_ddi_translations_dp; | 341 | ddi_translations = skl_y_ddi_translations_dp; |
350 | *n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_dp); | 342 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp); |
351 | } else if (IS_SKL_ULT(dev)) { | 343 | } else if (IS_SKL_ULT(dev)) { |
352 | ddi_translations = skl_u_ddi_translations_dp; | 344 | ddi_translations = skl_u_ddi_translations_dp; |
353 | *n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp); | 345 | *n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp); |
@@ -364,23 +356,14 @@ static const struct ddi_buf_trans *skl_get_buf_trans_edp(struct drm_device *dev, | |||
364 | { | 356 | { |
365 | struct drm_i915_private *dev_priv = dev->dev_private; | 357 | struct drm_i915_private *dev_priv = dev->dev_private; |
366 | const struct ddi_buf_trans *ddi_translations; | 358 | const struct ddi_buf_trans *ddi_translations; |
367 | static int is_095v = -1; | ||
368 | |||
369 | if (is_095v == -1) { | ||
370 | u32 spr1 = I915_READ(UAIMI_SPR1); | ||
371 | 359 | ||
372 | is_095v = spr1 & SKL_VCCIO_MASK; | 360 | if (IS_SKL_ULX(dev)) { |
373 | } | ||
374 | |||
375 | if (IS_SKL_ULX(dev) && !is_095v) { | ||
376 | if (dev_priv->edp_low_vswing) { | 361 | if (dev_priv->edp_low_vswing) { |
377 | ddi_translations = skl_y_085v_ddi_translations_edp; | 362 | ddi_translations = skl_y_ddi_translations_edp; |
378 | *n_entries = | 363 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_edp); |
379 | ARRAY_SIZE(skl_y_085v_ddi_translations_edp); | ||
380 | } else { | 364 | } else { |
381 | ddi_translations = skl_y_085v_ddi_translations_dp; | 365 | ddi_translations = skl_y_ddi_translations_dp; |
382 | *n_entries = | 366 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp); |
383 | ARRAY_SIZE(skl_y_085v_ddi_translations_dp); | ||
384 | } | 367 | } |
385 | } else if (IS_SKL_ULT(dev)) { | 368 | } else if (IS_SKL_ULT(dev)) { |
386 | if (dev_priv->edp_low_vswing) { | 369 | if (dev_priv->edp_low_vswing) { |
@@ -407,19 +390,11 @@ static const struct ddi_buf_trans * | |||
407 | skl_get_buf_trans_hdmi(struct drm_device *dev, | 390 | skl_get_buf_trans_hdmi(struct drm_device *dev, |
408 | int *n_entries) | 391 | int *n_entries) |
409 | { | 392 | { |
410 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
411 | const struct ddi_buf_trans *ddi_translations; | 393 | const struct ddi_buf_trans *ddi_translations; |
412 | static int is_095v = -1; | ||
413 | |||
414 | if (is_095v == -1) { | ||
415 | u32 spr1 = I915_READ(UAIMI_SPR1); | ||
416 | |||
417 | is_095v = spr1 & SKL_VCCIO_MASK; | ||
418 | } | ||
419 | 394 | ||
420 | if (IS_SKL_ULX(dev) && !is_095v) { | 395 | if (IS_SKL_ULX(dev)) { |
421 | ddi_translations = skl_y_085v_ddi_translations_hdmi; | 396 | ddi_translations = skl_y_ddi_translations_hdmi; |
422 | *n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_hdmi); | 397 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi); |
423 | } else { | 398 | } else { |
424 | ddi_translations = skl_ddi_translations_hdmi; | 399 | ddi_translations = skl_ddi_translations_hdmi; |
425 | *n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi); | 400 | *n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d38ceb039de6..deba3330de71 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -5102,7 +5102,6 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) | |||
5102 | { | 5102 | { |
5103 | switch (port) { | 5103 | switch (port) { |
5104 | case PORT_A: | 5104 | case PORT_A: |
5105 | case PORT_E: | ||
5106 | return POWER_DOMAIN_PORT_DDI_A_4_LANES; | 5105 | return POWER_DOMAIN_PORT_DDI_A_4_LANES; |
5107 | case PORT_B: | 5106 | case PORT_B: |
5108 | return POWER_DOMAIN_PORT_DDI_B_4_LANES; | 5107 | return POWER_DOMAIN_PORT_DDI_B_4_LANES; |
@@ -5110,6 +5109,8 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) | |||
5110 | return POWER_DOMAIN_PORT_DDI_C_4_LANES; | 5109 | return POWER_DOMAIN_PORT_DDI_C_4_LANES; |
5111 | case PORT_D: | 5110 | case PORT_D: |
5112 | return POWER_DOMAIN_PORT_DDI_D_4_LANES; | 5111 | return POWER_DOMAIN_PORT_DDI_D_4_LANES; |
5112 | case PORT_E: | ||
5113 | return POWER_DOMAIN_PORT_DDI_E_2_LANES; | ||
5113 | default: | 5114 | default: |
5114 | WARN_ON_ONCE(1); | 5115 | WARN_ON_ONCE(1); |
5115 | return POWER_DOMAIN_PORT_OTHER; | 5116 | return POWER_DOMAIN_PORT_OTHER; |
@@ -5684,16 +5685,13 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv) | |||
5684 | /* enable PG1 and Misc I/O */ | 5685 | /* enable PG1 and Misc I/O */ |
5685 | intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS); | 5686 | intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS); |
5686 | 5687 | ||
5687 | /* DPLL0 already enabed !? */ | 5688 | /* DPLL0 not enabled (happens on early BIOS versions) */ |
5688 | if (I915_READ(LCPLL1_CTL) & LCPLL_PLL_ENABLE) { | 5689 | if (!(I915_READ(LCPLL1_CTL) & LCPLL_PLL_ENABLE)) { |
5689 | DRM_DEBUG_DRIVER("DPLL0 already running\n"); | 5690 | /* enable DPLL0 */ |
5690 | return; | 5691 | required_vco = skl_cdclk_get_vco(dev_priv->skl_boot_cdclk); |
5692 | skl_dpll0_enable(dev_priv, required_vco); | ||
5691 | } | 5693 | } |
5692 | 5694 | ||
5693 | /* enable DPLL0 */ | ||
5694 | required_vco = skl_cdclk_get_vco(dev_priv->skl_boot_cdclk); | ||
5695 | skl_dpll0_enable(dev_priv, required_vco); | ||
5696 | |||
5697 | /* set CDCLK to the frequency the BIOS chose */ | 5695 | /* set CDCLK to the frequency the BIOS chose */ |
5698 | skl_set_cdclk(dev_priv, dev_priv->skl_boot_cdclk); | 5696 | skl_set_cdclk(dev_priv, dev_priv->skl_boot_cdclk); |
5699 | 5697 | ||
@@ -10114,7 +10112,7 @@ static struct drm_framebuffer * | |||
10114 | mode_fits_in_fbdev(struct drm_device *dev, | 10112 | mode_fits_in_fbdev(struct drm_device *dev, |
10115 | struct drm_display_mode *mode) | 10113 | struct drm_display_mode *mode) |
10116 | { | 10114 | { |
10117 | #ifdef CONFIG_DRM_I915_FBDEV | 10115 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
10118 | struct drm_i915_private *dev_priv = dev->dev_private; | 10116 | struct drm_i915_private *dev_priv = dev->dev_private; |
10119 | struct drm_i915_gem_object *obj; | 10117 | struct drm_i915_gem_object *obj; |
10120 | struct drm_framebuffer *fb; | 10118 | struct drm_framebuffer *fb; |
@@ -13509,7 +13507,7 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev, | |||
13509 | struct intel_plane *primary; | 13507 | struct intel_plane *primary; |
13510 | struct intel_plane_state *state; | 13508 | struct intel_plane_state *state; |
13511 | const uint32_t *intel_primary_formats; | 13509 | const uint32_t *intel_primary_formats; |
13512 | int num_formats; | 13510 | unsigned int num_formats; |
13513 | 13511 | ||
13514 | primary = kzalloc(sizeof(*primary), GFP_KERNEL); | 13512 | primary = kzalloc(sizeof(*primary), GFP_KERNEL); |
13515 | if (primary == NULL) | 13513 | if (primary == NULL) |
@@ -13947,6 +13945,15 @@ static void intel_setup_outputs(struct drm_device *dev) | |||
13947 | intel_ddi_init(dev, PORT_C); | 13945 | intel_ddi_init(dev, PORT_C); |
13948 | if (found & SFUSE_STRAP_DDID_DETECTED) | 13946 | if (found & SFUSE_STRAP_DDID_DETECTED) |
13949 | intel_ddi_init(dev, PORT_D); | 13947 | intel_ddi_init(dev, PORT_D); |
13948 | /* | ||
13949 | * On SKL we don't have a way to detect DDI-E so we rely on VBT. | ||
13950 | */ | ||
13951 | if (IS_SKYLAKE(dev) && | ||
13952 | (dev_priv->vbt.ddi_port_info[PORT_E].supports_dp || | ||
13953 | dev_priv->vbt.ddi_port_info[PORT_E].supports_dvi || | ||
13954 | dev_priv->vbt.ddi_port_info[PORT_E].supports_hdmi)) | ||
13955 | intel_ddi_init(dev, PORT_E); | ||
13956 | |||
13950 | } else if (HAS_PCH_SPLIT(dev)) { | 13957 | } else if (HAS_PCH_SPLIT(dev)) { |
13951 | int found; | 13958 | int found; |
13952 | dpd_is_edp = intel_dp_is_edp(dev, PORT_D); | 13959 | dpd_is_edp = intel_dp_is_edp(dev, PORT_D); |
@@ -14302,7 +14309,7 @@ intel_user_framebuffer_create(struct drm_device *dev, | |||
14302 | return intel_framebuffer_create(dev, mode_cmd, obj); | 14309 | return intel_framebuffer_create(dev, mode_cmd, obj); |
14303 | } | 14310 | } |
14304 | 14311 | ||
14305 | #ifndef CONFIG_DRM_I915_FBDEV | 14312 | #ifndef CONFIG_DRM_FBDEV_EMULATION |
14306 | static inline void intel_fbdev_output_poll_changed(struct drm_device *dev) | 14313 | static inline void intel_fbdev_output_poll_changed(struct drm_device *dev) |
14307 | { | 14314 | { |
14308 | } | 14315 | } |
@@ -14717,6 +14724,24 @@ void intel_modeset_init(struct drm_device *dev) | |||
14717 | if (INTEL_INFO(dev)->num_pipes == 0) | 14724 | if (INTEL_INFO(dev)->num_pipes == 0) |
14718 | return; | 14725 | return; |
14719 | 14726 | ||
14727 | /* | ||
14728 | * There may be no VBT; and if the BIOS enabled SSC we can | ||
14729 | * just keep using it to avoid unnecessary flicker. Whereas if the | ||
14730 | * BIOS isn't using it, don't assume it will work even if the VBT | ||
14731 | * indicates as much. | ||
14732 | */ | ||
14733 | if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) { | ||
14734 | bool bios_lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & | ||
14735 | DREF_SSC1_ENABLE); | ||
14736 | |||
14737 | if (dev_priv->vbt.lvds_use_ssc != bios_lvds_use_ssc) { | ||
14738 | DRM_DEBUG_KMS("SSC %sabled by BIOS, overriding VBT which says %sabled\n", | ||
14739 | bios_lvds_use_ssc ? "en" : "dis", | ||
14740 | dev_priv->vbt.lvds_use_ssc ? "en" : "dis"); | ||
14741 | dev_priv->vbt.lvds_use_ssc = bios_lvds_use_ssc; | ||
14742 | } | ||
14743 | } | ||
14744 | |||
14720 | intel_init_display(dev); | 14745 | intel_init_display(dev); |
14721 | intel_init_audio(dev); | 14746 | intel_init_audio(dev); |
14722 | 14747 | ||
@@ -15278,7 +15303,6 @@ err: | |||
15278 | 15303 | ||
15279 | void intel_modeset_gem_init(struct drm_device *dev) | 15304 | void intel_modeset_gem_init(struct drm_device *dev) |
15280 | { | 15305 | { |
15281 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
15282 | struct drm_crtc *c; | 15306 | struct drm_crtc *c; |
15283 | struct drm_i915_gem_object *obj; | 15307 | struct drm_i915_gem_object *obj; |
15284 | int ret; | 15308 | int ret; |
@@ -15287,16 +15311,6 @@ void intel_modeset_gem_init(struct drm_device *dev) | |||
15287 | intel_init_gt_powersave(dev); | 15311 | intel_init_gt_powersave(dev); |
15288 | mutex_unlock(&dev->struct_mutex); | 15312 | mutex_unlock(&dev->struct_mutex); |
15289 | 15313 | ||
15290 | /* | ||
15291 | * There may be no VBT; and if the BIOS enabled SSC we can | ||
15292 | * just keep using it to avoid unnecessary flicker. Whereas if the | ||
15293 | * BIOS isn't using it, don't assume it will work even if the VBT | ||
15294 | * indicates as much. | ||
15295 | */ | ||
15296 | if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) | ||
15297 | dev_priv->vbt.lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & | ||
15298 | DREF_SSC1_ENABLE); | ||
15299 | |||
15300 | intel_modeset_init_hw(dev); | 15314 | intel_modeset_init_hw(dev); |
15301 | 15315 | ||
15302 | intel_setup_overlay(dev); | 15316 | intel_setup_overlay(dev); |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index f45872cc6d24..f8f4d99440c1 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -95,9 +95,6 @@ static const int bxt_rates[] = { 162000, 216000, 243000, 270000, | |||
95 | 324000, 432000, 540000 }; | 95 | 324000, 432000, 540000 }; |
96 | static const int skl_rates[] = { 162000, 216000, 270000, | 96 | static const int skl_rates[] = { 162000, 216000, 270000, |
97 | 324000, 432000, 540000 }; | 97 | 324000, 432000, 540000 }; |
98 | static const int chv_rates[] = { 162000, 202500, 210000, 216000, | ||
99 | 243000, 270000, 324000, 405000, | ||
100 | 420000, 432000, 540000 }; | ||
101 | static const int default_rates[] = { 162000, 270000, 540000 }; | 98 | static const int default_rates[] = { 162000, 270000, 540000 }; |
102 | 99 | ||
103 | /** | 100 | /** |
@@ -1159,7 +1156,7 @@ skl_edp_set_pll_config(struct intel_crtc_state *pipe_config) | |||
1159 | pipe_config->dpll_hw_state.ctrl1 = ctrl1; | 1156 | pipe_config->dpll_hw_state.ctrl1 = ctrl1; |
1160 | } | 1157 | } |
1161 | 1158 | ||
1162 | static void | 1159 | void |
1163 | hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config) | 1160 | hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config) |
1164 | { | 1161 | { |
1165 | memset(&pipe_config->dpll_hw_state, 0, | 1162 | memset(&pipe_config->dpll_hw_state, 0, |
@@ -1191,30 +1188,40 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) | |||
1191 | return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; | 1188 | return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; |
1192 | } | 1189 | } |
1193 | 1190 | ||
1191 | static bool intel_dp_source_supports_hbr2(struct drm_device *dev) | ||
1192 | { | ||
1193 | /* WaDisableHBR2:skl */ | ||
1194 | if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) | ||
1195 | return false; | ||
1196 | |||
1197 | if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) || | ||
1198 | (INTEL_INFO(dev)->gen >= 9)) | ||
1199 | return true; | ||
1200 | else | ||
1201 | return false; | ||
1202 | } | ||
1203 | |||
1194 | static int | 1204 | static int |
1195 | intel_dp_source_rates(struct drm_device *dev, const int **source_rates) | 1205 | intel_dp_source_rates(struct drm_device *dev, const int **source_rates) |
1196 | { | 1206 | { |
1207 | int size; | ||
1208 | |||
1197 | if (IS_BROXTON(dev)) { | 1209 | if (IS_BROXTON(dev)) { |
1198 | *source_rates = bxt_rates; | 1210 | *source_rates = bxt_rates; |
1199 | return ARRAY_SIZE(bxt_rates); | 1211 | size = ARRAY_SIZE(bxt_rates); |
1200 | } else if (IS_SKYLAKE(dev)) { | 1212 | } else if (IS_SKYLAKE(dev)) { |
1201 | *source_rates = skl_rates; | 1213 | *source_rates = skl_rates; |
1202 | return ARRAY_SIZE(skl_rates); | 1214 | size = ARRAY_SIZE(skl_rates); |
1203 | } else if (IS_CHERRYVIEW(dev)) { | 1215 | } else { |
1204 | *source_rates = chv_rates; | 1216 | *source_rates = default_rates; |
1205 | return ARRAY_SIZE(chv_rates); | 1217 | size = ARRAY_SIZE(default_rates); |
1206 | } | 1218 | } |
1207 | 1219 | ||
1208 | *source_rates = default_rates; | 1220 | /* This depends on the fact that 5.4 is last value in the array */ |
1221 | if (!intel_dp_source_supports_hbr2(dev)) | ||
1222 | size--; | ||
1209 | 1223 | ||
1210 | if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) | 1224 | return size; |
1211 | /* WaDisableHBR2:skl */ | ||
1212 | return (DP_LINK_BW_2_7 >> 3) + 1; | ||
1213 | else if (INTEL_INFO(dev)->gen >= 8 || | ||
1214 | (IS_HASWELL(dev) && !IS_HSW_ULX(dev))) | ||
1215 | return (DP_LINK_BW_5_4 >> 3) + 1; | ||
1216 | else | ||
1217 | return (DP_LINK_BW_2_7 >> 3) + 1; | ||
1218 | } | 1225 | } |
1219 | 1226 | ||
1220 | static void | 1227 | static void |
@@ -3993,9 +4000,14 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) | |||
3993 | } | 4000 | } |
3994 | } | 4001 | } |
3995 | 4002 | ||
3996 | /* Training Pattern 3 support, both source and sink */ | 4003 | /* Training Pattern 3 support, Intel platforms that support HBR2 alone |
4004 | * have support for TP3 hence that check is used along with dpcd check | ||
4005 | * to ensure TP3 can be enabled. | ||
4006 | * SKL < B0: due it's WaDisableHBR2 is the only exception where TP3 is | ||
4007 | * supported but still not enabled. | ||
4008 | */ | ||
3997 | if (drm_dp_tps3_supported(intel_dp->dpcd) && | 4009 | if (drm_dp_tps3_supported(intel_dp->dpcd) && |
3998 | (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) { | 4010 | intel_dp_source_supports_hbr2(dev)) { |
3999 | intel_dp->use_tps3 = true; | 4011 | intel_dp->use_tps3 = true; |
4000 | DRM_DEBUG_KMS("Displayport TPS3 supported\n"); | 4012 | DRM_DEBUG_KMS("Displayport TPS3 supported\n"); |
4001 | } else | 4013 | } else |
@@ -5166,9 +5178,12 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) | |||
5166 | 5178 | ||
5167 | intel_dp_probe_oui(intel_dp); | 5179 | intel_dp_probe_oui(intel_dp); |
5168 | 5180 | ||
5169 | if (!intel_dp_probe_mst(intel_dp)) | 5181 | if (!intel_dp_probe_mst(intel_dp)) { |
5182 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); | ||
5183 | intel_dp_check_link_status(intel_dp); | ||
5184 | drm_modeset_unlock(&dev->mode_config.connection_mutex); | ||
5170 | goto mst_fail; | 5185 | goto mst_fail; |
5171 | 5186 | } | |
5172 | } else { | 5187 | } else { |
5173 | if (intel_dp->is_mst) { | 5188 | if (intel_dp->is_mst) { |
5174 | if (intel_dp_check_mst_status(intel_dp) == -EINVAL) | 5189 | if (intel_dp_check_mst_status(intel_dp) == -EINVAL) |
@@ -5176,10 +5191,6 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) | |||
5176 | } | 5191 | } |
5177 | 5192 | ||
5178 | if (!intel_dp->is_mst) { | 5193 | if (!intel_dp->is_mst) { |
5179 | /* | ||
5180 | * we'll check the link status via the normal hot plug path later - | ||
5181 | * but for short hpds we should check it now | ||
5182 | */ | ||
5183 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); | 5194 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
5184 | intel_dp_check_link_status(intel_dp); | 5195 | intel_dp_check_link_status(intel_dp); |
5185 | drm_modeset_unlock(&dev->mode_config.connection_mutex); | 5196 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
@@ -5221,16 +5232,17 @@ intel_trans_dp_port_sel(struct drm_crtc *crtc) | |||
5221 | return -1; | 5232 | return -1; |
5222 | } | 5233 | } |
5223 | 5234 | ||
5224 | /* check the VBT to see whether the eDP is on DP-D port */ | 5235 | /* check the VBT to see whether the eDP is on another port */ |
5225 | bool intel_dp_is_edp(struct drm_device *dev, enum port port) | 5236 | bool intel_dp_is_edp(struct drm_device *dev, enum port port) |
5226 | { | 5237 | { |
5227 | struct drm_i915_private *dev_priv = dev->dev_private; | 5238 | struct drm_i915_private *dev_priv = dev->dev_private; |
5228 | union child_device_config *p_child; | 5239 | union child_device_config *p_child; |
5229 | int i; | 5240 | int i; |
5230 | static const short port_mapping[] = { | 5241 | static const short port_mapping[] = { |
5231 | [PORT_B] = PORT_IDPB, | 5242 | [PORT_B] = DVO_PORT_DPB, |
5232 | [PORT_C] = PORT_IDPC, | 5243 | [PORT_C] = DVO_PORT_DPC, |
5233 | [PORT_D] = PORT_IDPD, | 5244 | [PORT_D] = DVO_PORT_DPD, |
5245 | [PORT_E] = DVO_PORT_DPE, | ||
5234 | }; | 5246 | }; |
5235 | 5247 | ||
5236 | if (port == PORT_A) | 5248 | if (port == PORT_A) |
@@ -6067,6 +6079,9 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, | |||
6067 | case PORT_D: | 6079 | case PORT_D: |
6068 | intel_encoder->hpd_pin = HPD_PORT_D; | 6080 | intel_encoder->hpd_pin = HPD_PORT_D; |
6069 | break; | 6081 | break; |
6082 | case PORT_E: | ||
6083 | intel_encoder->hpd_pin = HPD_PORT_E; | ||
6084 | break; | ||
6070 | default: | 6085 | default: |
6071 | BUG(); | 6086 | BUG(); |
6072 | } | 6087 | } |
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index dd291d123219..677d70e4d363 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c | |||
@@ -33,6 +33,7 @@ | |||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | 33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, |
34 | struct intel_crtc_state *pipe_config) | 34 | struct intel_crtc_state *pipe_config) |
35 | { | 35 | { |
36 | struct drm_device *dev = encoder->base.dev; | ||
36 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | 37 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
37 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | 38 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
38 | struct intel_dp *intel_dp = &intel_dig_port->dp; | 39 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
@@ -88,6 +89,10 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |||
88 | &pipe_config->dp_m_n); | 89 | &pipe_config->dp_m_n); |
89 | 90 | ||
90 | pipe_config->dp_m_n.tu = slots; | 91 | pipe_config->dp_m_n.tu = slots; |
92 | |||
93 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) | ||
94 | hsw_dp_set_ddi_pll_sel(pipe_config); | ||
95 | |||
91 | return true; | 96 | return true; |
92 | 97 | ||
93 | } | 98 | } |
@@ -403,7 +408,7 @@ static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |||
403 | 408 | ||
404 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) | 409 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
405 | { | 410 | { |
406 | #ifdef CONFIG_DRM_I915_FBDEV | 411 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
407 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | 412 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
408 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); | 413 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); |
409 | #endif | 414 | #endif |
@@ -411,7 +416,7 @@ static void intel_connector_add_to_fbdev(struct intel_connector *connector) | |||
411 | 416 | ||
412 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | 417 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) |
413 | { | 418 | { |
414 | #ifdef CONFIG_DRM_I915_FBDEV | 419 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
415 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | 420 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
416 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); | 421 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); |
417 | #endif | 422 | #endif |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 090d67b04307..40e825d6a26f 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -1212,6 +1212,7 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp); | |||
1212 | void intel_edp_drrs_invalidate(struct drm_device *dev, | 1212 | void intel_edp_drrs_invalidate(struct drm_device *dev, |
1213 | unsigned frontbuffer_bits); | 1213 | unsigned frontbuffer_bits); |
1214 | void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits); | 1214 | void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits); |
1215 | void hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config); | ||
1215 | 1216 | ||
1216 | /* intel_dp_mst.c */ | 1217 | /* intel_dp_mst.c */ |
1217 | int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); | 1218 | int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); |
@@ -1225,7 +1226,7 @@ void intel_dvo_init(struct drm_device *dev); | |||
1225 | 1226 | ||
1226 | 1227 | ||
1227 | /* legacy fbdev emulation in intel_fbdev.c */ | 1228 | /* legacy fbdev emulation in intel_fbdev.c */ |
1228 | #ifdef CONFIG_DRM_I915_FBDEV | 1229 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
1229 | extern int intel_fbdev_init(struct drm_device *dev); | 1230 | extern int intel_fbdev_init(struct drm_device *dev); |
1230 | extern void intel_fbdev_initial_config(void *data, async_cookie_t cookie); | 1231 | extern void intel_fbdev_initial_config(void *data, async_cookie_t cookie); |
1231 | extern void intel_fbdev_fini(struct drm_device *dev); | 1232 | extern void intel_fbdev_fini(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index 6c9351b2e3af..96476d7d7ed2 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c | |||
@@ -55,13 +55,6 @@ static int intel_fbdev_set_par(struct fb_info *info) | |||
55 | ret = drm_fb_helper_set_par(info); | 55 | ret = drm_fb_helper_set_par(info); |
56 | 56 | ||
57 | if (ret == 0) { | 57 | if (ret == 0) { |
58 | /* | ||
59 | * FIXME: fbdev presumes that all callbacks also work from | ||
60 | * atomic contexts and relies on that for emergency oops | ||
61 | * printing. KMS totally doesn't do that and the locking here is | ||
62 | * by far not the only place this goes wrong. Ignore this for | ||
63 | * now until we solve this for real. | ||
64 | */ | ||
65 | mutex_lock(&fb_helper->dev->struct_mutex); | 58 | mutex_lock(&fb_helper->dev->struct_mutex); |
66 | intel_fb_obj_invalidate(ifbdev->fb->obj, ORIGIN_GTT); | 59 | intel_fb_obj_invalidate(ifbdev->fb->obj, ORIGIN_GTT); |
67 | mutex_unlock(&fb_helper->dev->struct_mutex); | 60 | mutex_unlock(&fb_helper->dev->struct_mutex); |
@@ -80,13 +73,6 @@ static int intel_fbdev_blank(int blank, struct fb_info *info) | |||
80 | ret = drm_fb_helper_blank(blank, info); | 73 | ret = drm_fb_helper_blank(blank, info); |
81 | 74 | ||
82 | if (ret == 0) { | 75 | if (ret == 0) { |
83 | /* | ||
84 | * FIXME: fbdev presumes that all callbacks also work from | ||
85 | * atomic contexts and relies on that for emergency oops | ||
86 | * printing. KMS totally doesn't do that and the locking here is | ||
87 | * by far not the only place this goes wrong. Ignore this for | ||
88 | * now until we solve this for real. | ||
89 | */ | ||
90 | mutex_lock(&fb_helper->dev->struct_mutex); | 76 | mutex_lock(&fb_helper->dev->struct_mutex); |
91 | intel_fb_obj_invalidate(ifbdev->fb->obj, ORIGIN_GTT); | 77 | intel_fb_obj_invalidate(ifbdev->fb->obj, ORIGIN_GTT); |
92 | mutex_unlock(&fb_helper->dev->struct_mutex); | 78 | mutex_unlock(&fb_helper->dev->struct_mutex); |
@@ -106,13 +92,6 @@ static int intel_fbdev_pan_display(struct fb_var_screeninfo *var, | |||
106 | ret = drm_fb_helper_pan_display(var, info); | 92 | ret = drm_fb_helper_pan_display(var, info); |
107 | 93 | ||
108 | if (ret == 0) { | 94 | if (ret == 0) { |
109 | /* | ||
110 | * FIXME: fbdev presumes that all callbacks also work from | ||
111 | * atomic contexts and relies on that for emergency oops | ||
112 | * printing. KMS totally doesn't do that and the locking here is | ||
113 | * by far not the only place this goes wrong. Ignore this for | ||
114 | * now until we solve this for real. | ||
115 | */ | ||
116 | mutex_lock(&fb_helper->dev->struct_mutex); | 95 | mutex_lock(&fb_helper->dev->struct_mutex); |
117 | intel_fb_obj_invalidate(ifbdev->fb->obj, ORIGIN_GTT); | 96 | intel_fb_obj_invalidate(ifbdev->fb->obj, ORIGIN_GTT); |
118 | mutex_unlock(&fb_helper->dev->struct_mutex); | 97 | mutex_unlock(&fb_helper->dev->struct_mutex); |
@@ -125,9 +104,9 @@ static struct fb_ops intelfb_ops = { | |||
125 | .owner = THIS_MODULE, | 104 | .owner = THIS_MODULE, |
126 | .fb_check_var = drm_fb_helper_check_var, | 105 | .fb_check_var = drm_fb_helper_check_var, |
127 | .fb_set_par = intel_fbdev_set_par, | 106 | .fb_set_par = intel_fbdev_set_par, |
128 | .fb_fillrect = cfb_fillrect, | 107 | .fb_fillrect = drm_fb_helper_cfb_fillrect, |
129 | .fb_copyarea = cfb_copyarea, | 108 | .fb_copyarea = drm_fb_helper_cfb_copyarea, |
130 | .fb_imageblit = cfb_imageblit, | 109 | .fb_imageblit = drm_fb_helper_cfb_imageblit, |
131 | .fb_pan_display = intel_fbdev_pan_display, | 110 | .fb_pan_display = intel_fbdev_pan_display, |
132 | .fb_blank = intel_fbdev_blank, | 111 | .fb_blank = intel_fbdev_blank, |
133 | .fb_setcmap = drm_fb_helper_setcmap, | 112 | .fb_setcmap = drm_fb_helper_setcmap, |
@@ -236,9 +215,9 @@ static int intelfb_create(struct drm_fb_helper *helper, | |||
236 | obj = intel_fb->obj; | 215 | obj = intel_fb->obj; |
237 | size = obj->base.size; | 216 | size = obj->base.size; |
238 | 217 | ||
239 | info = framebuffer_alloc(0, &dev->pdev->dev); | 218 | info = drm_fb_helper_alloc_fbi(helper); |
240 | if (!info) { | 219 | if (IS_ERR(info)) { |
241 | ret = -ENOMEM; | 220 | ret = PTR_ERR(info); |
242 | goto out_unpin; | 221 | goto out_unpin; |
243 | } | 222 | } |
244 | 223 | ||
@@ -247,24 +226,13 @@ static int intelfb_create(struct drm_fb_helper *helper, | |||
247 | fb = &ifbdev->fb->base; | 226 | fb = &ifbdev->fb->base; |
248 | 227 | ||
249 | ifbdev->helper.fb = fb; | 228 | ifbdev->helper.fb = fb; |
250 | ifbdev->helper.fbdev = info; | ||
251 | 229 | ||
252 | strcpy(info->fix.id, "inteldrmfb"); | 230 | strcpy(info->fix.id, "inteldrmfb"); |
253 | 231 | ||
254 | info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; | 232 | info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; |
255 | info->fbops = &intelfb_ops; | 233 | info->fbops = &intelfb_ops; |
256 | 234 | ||
257 | ret = fb_alloc_cmap(&info->cmap, 256, 0); | ||
258 | if (ret) { | ||
259 | ret = -ENOMEM; | ||
260 | goto out_unpin; | ||
261 | } | ||
262 | /* setup aperture base/size for vesafb takeover */ | 235 | /* setup aperture base/size for vesafb takeover */ |
263 | info->apertures = alloc_apertures(1); | ||
264 | if (!info->apertures) { | ||
265 | ret = -ENOMEM; | ||
266 | goto out_unpin; | ||
267 | } | ||
268 | info->apertures->ranges[0].base = dev->mode_config.fb_base; | 236 | info->apertures->ranges[0].base = dev->mode_config.fb_base; |
269 | info->apertures->ranges[0].size = dev_priv->gtt.mappable_end; | 237 | info->apertures->ranges[0].size = dev_priv->gtt.mappable_end; |
270 | 238 | ||
@@ -276,7 +244,7 @@ static int intelfb_create(struct drm_fb_helper *helper, | |||
276 | size); | 244 | size); |
277 | if (!info->screen_base) { | 245 | if (!info->screen_base) { |
278 | ret = -ENOSPC; | 246 | ret = -ENOSPC; |
279 | goto out_unpin; | 247 | goto out_destroy_fbi; |
280 | } | 248 | } |
281 | info->screen_size = size; | 249 | info->screen_size = size; |
282 | 250 | ||
@@ -303,6 +271,8 @@ static int intelfb_create(struct drm_fb_helper *helper, | |||
303 | vga_switcheroo_client_fb_set(dev->pdev, info); | 271 | vga_switcheroo_client_fb_set(dev->pdev, info); |
304 | return 0; | 272 | return 0; |
305 | 273 | ||
274 | out_destroy_fbi: | ||
275 | drm_fb_helper_release_fbi(helper); | ||
306 | out_unpin: | 276 | out_unpin: |
307 | i915_gem_object_ggtt_unpin(obj); | 277 | i915_gem_object_ggtt_unpin(obj); |
308 | drm_gem_object_unreference(&obj->base); | 278 | drm_gem_object_unreference(&obj->base); |
@@ -544,16 +514,9 @@ static const struct drm_fb_helper_funcs intel_fb_helper_funcs = { | |||
544 | static void intel_fbdev_destroy(struct drm_device *dev, | 514 | static void intel_fbdev_destroy(struct drm_device *dev, |
545 | struct intel_fbdev *ifbdev) | 515 | struct intel_fbdev *ifbdev) |
546 | { | 516 | { |
547 | if (ifbdev->helper.fbdev) { | ||
548 | struct fb_info *info = ifbdev->helper.fbdev; | ||
549 | 517 | ||
550 | unregister_framebuffer(info); | 518 | drm_fb_helper_unregister_fbi(&ifbdev->helper); |
551 | iounmap(info->screen_base); | 519 | drm_fb_helper_release_fbi(&ifbdev->helper); |
552 | if (info->cmap.len) | ||
553 | fb_dealloc_cmap(&info->cmap); | ||
554 | |||
555 | framebuffer_release(info); | ||
556 | } | ||
557 | 520 | ||
558 | drm_fb_helper_fini(&ifbdev->helper); | 521 | drm_fb_helper_fini(&ifbdev->helper); |
559 | 522 | ||
@@ -802,7 +765,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous | |||
802 | if (state == FBINFO_STATE_RUNNING && ifbdev->fb->obj->stolen) | 765 | if (state == FBINFO_STATE_RUNNING && ifbdev->fb->obj->stolen) |
803 | memset_io(info->screen_base, 0, info->screen_size); | 766 | memset_io(info->screen_base, 0, info->screen_size); |
804 | 767 | ||
805 | fb_set_suspend(info, state); | 768 | drm_fb_helper_set_suspend(&ifbdev->helper, state); |
806 | console_unlock(); | 769 | console_unlock(); |
807 | } | 770 | } |
808 | 771 | ||
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 4da737ccf69a..feb31d891482 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -2020,6 +2020,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, | |||
2020 | struct drm_device *dev = intel_encoder->base.dev; | 2020 | struct drm_device *dev = intel_encoder->base.dev; |
2021 | struct drm_i915_private *dev_priv = dev->dev_private; | 2021 | struct drm_i915_private *dev_priv = dev->dev_private; |
2022 | enum port port = intel_dig_port->port; | 2022 | enum port port = intel_dig_port->port; |
2023 | uint8_t alternate_ddc_pin; | ||
2023 | 2024 | ||
2024 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, | 2025 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, |
2025 | DRM_MODE_CONNECTOR_HDMIA); | 2026 | DRM_MODE_CONNECTOR_HDMIA); |
@@ -2060,6 +2061,26 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, | |||
2060 | intel_hdmi->ddc_bus = GMBUS_PIN_DPD; | 2061 | intel_hdmi->ddc_bus = GMBUS_PIN_DPD; |
2061 | intel_encoder->hpd_pin = HPD_PORT_D; | 2062 | intel_encoder->hpd_pin = HPD_PORT_D; |
2062 | break; | 2063 | break; |
2064 | case PORT_E: | ||
2065 | /* On SKL PORT E doesn't have seperate GMBUS pin | ||
2066 | * We rely on VBT to set a proper alternate GMBUS pin. */ | ||
2067 | alternate_ddc_pin = | ||
2068 | dev_priv->vbt.ddi_port_info[PORT_E].alternate_ddc_pin; | ||
2069 | switch (alternate_ddc_pin) { | ||
2070 | case DDC_PIN_B: | ||
2071 | intel_hdmi->ddc_bus = GMBUS_PIN_DPB; | ||
2072 | break; | ||
2073 | case DDC_PIN_C: | ||
2074 | intel_hdmi->ddc_bus = GMBUS_PIN_DPC; | ||
2075 | break; | ||
2076 | case DDC_PIN_D: | ||
2077 | intel_hdmi->ddc_bus = GMBUS_PIN_DPD; | ||
2078 | break; | ||
2079 | default: | ||
2080 | MISSING_CASE(alternate_ddc_pin); | ||
2081 | } | ||
2082 | intel_encoder->hpd_pin = HPD_PORT_E; | ||
2083 | break; | ||
2063 | case PORT_A: | 2084 | case PORT_A: |
2064 | intel_encoder->hpd_pin = HPD_PORT_A; | 2085 | intel_encoder->hpd_pin = HPD_PORT_A; |
2065 | /* Internal port only for eDP. */ | 2086 | /* Internal port only for eDP. */ |
diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c index 032a0bf75f3b..53c0173a39fe 100644 --- a/drivers/gpu/drm/i915/intel_hotplug.c +++ b/drivers/gpu/drm/i915/intel_hotplug.c | |||
@@ -91,6 +91,9 @@ bool intel_hpd_pin_to_port(enum hpd_pin pin, enum port *port) | |||
91 | case HPD_PORT_D: | 91 | case HPD_PORT_D: |
92 | *port = PORT_D; | 92 | *port = PORT_D; |
93 | return true; | 93 | return true; |
94 | case HPD_PORT_E: | ||
95 | *port = PORT_E; | ||
96 | return true; | ||
94 | default: | 97 | default: |
95 | return false; /* no hpd */ | 98 | return false; /* no hpd */ |
96 | } | 99 | } |
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index e9520afc2033..40cbba4ea4ba 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c | |||
@@ -1027,6 +1027,8 @@ static int intel_lr_context_pin(struct drm_i915_gem_request *rq) | |||
1027 | if (ret) | 1027 | if (ret) |
1028 | goto unpin_ctx_obj; | 1028 | goto unpin_ctx_obj; |
1029 | 1029 | ||
1030 | ctx_obj->dirty = true; | ||
1031 | |||
1030 | /* Invalidate GuC TLB. */ | 1032 | /* Invalidate GuC TLB. */ |
1031 | if (i915.enable_guc_submission) | 1033 | if (i915.enable_guc_submission) |
1032 | I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE); | 1034 | I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE); |
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index b1bd25e1e853..3f682a1a08ce 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c | |||
@@ -297,6 +297,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, | |||
297 | BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ | 297 | BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ |
298 | BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) | \ | 298 | BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) | \ |
299 | BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ | 299 | BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ |
300 | BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ | ||
300 | BIT(POWER_DOMAIN_AUX_B) | \ | 301 | BIT(POWER_DOMAIN_AUX_B) | \ |
301 | BIT(POWER_DOMAIN_AUX_C) | \ | 302 | BIT(POWER_DOMAIN_AUX_C) | \ |
302 | BIT(POWER_DOMAIN_AUX_D) | \ | 303 | BIT(POWER_DOMAIN_AUX_D) | \ |
@@ -316,6 +317,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, | |||
316 | #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS ( \ | 317 | #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS ( \ |
317 | BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) | \ | 318 | BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) | \ |
318 | BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) | \ | 319 | BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) | \ |
320 | BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ | ||
319 | BIT(POWER_DOMAIN_INIT)) | 321 | BIT(POWER_DOMAIN_INIT)) |
320 | #define SKL_DISPLAY_DDI_B_POWER_DOMAINS ( \ | 322 | #define SKL_DISPLAY_DDI_B_POWER_DOMAINS ( \ |
321 | BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ | 323 | BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ |