diff options
| author | Jakub Bartmiński <jakub.bartminski@intel.com> | 2018-07-27 10:11:46 -0400 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-07-27 11:07:37 -0400 |
| commit | 496bcce3c9bf50ccf74b3050669600631cbf8138 (patch) | |
| tree | f342f97fda41dffae610fd0f844dbcff0021ce6a /drivers/gpu/drm/i915 | |
| parent | dd18cedfa36fbbc19903aed12d6d94c06f5e6dea (diff) | |
drm/i915: Remove unnecessary ggtt_offset_bias from i915_gem_context
Since ggtt_offset_bias is now stored in ggtt.pin_bias, it is duplicated
inside i915_gem_context, and can instead be accessed directly from ggtt.
v3:
Added a helper function to retrieve the ggtt.pin_bias from the vma.
v4:
Moved the helper function to the previous patch in the series.
Dropped the bias from intel_ring_pin. This introduces a slight functional
change since we are always pinning the ring a bit higher if GuC is present
even though we don't really need to.
v8:
Fixed patch not applying on the most recent upstream.
Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727141148.30874-4-jakub.bartminski@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_context.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_context.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.h | 4 |
5 files changed, 9 insertions, 21 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 32f96b8cd9c4..f15a039772db 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c | |||
| @@ -329,8 +329,6 @@ __create_hw_context(struct drm_i915_private *dev_priv, | |||
| 329 | ctx->desc_template = | 329 | ctx->desc_template = |
| 330 | default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt); | 330 | default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt); |
| 331 | 331 | ||
| 332 | ctx->ggtt_offset_bias = dev_priv->ggtt.pin_bias; | ||
| 333 | |||
| 334 | return ctx; | 332 | return ctx; |
| 335 | 333 | ||
| 336 | err_pid: | 334 | err_pid: |
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h b/drivers/gpu/drm/i915/i915_gem_context.h index b116e4942c10..851dad6decd7 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.h +++ b/drivers/gpu/drm/i915/i915_gem_context.h | |||
| @@ -147,9 +147,6 @@ struct i915_gem_context { | |||
| 147 | 147 | ||
| 148 | struct i915_sched_attr sched; | 148 | struct i915_sched_attr sched; |
| 149 | 149 | ||
| 150 | /** ggtt_offset_bias: placement restriction for context objects */ | ||
| 151 | u32 ggtt_offset_bias; | ||
| 152 | |||
| 153 | /** engine: per-engine logical HW state */ | 150 | /** engine: per-engine logical HW state */ |
| 154 | struct intel_context { | 151 | struct intel_context { |
| 155 | struct i915_gem_context *gem_context; | 152 | struct i915_gem_context *gem_context; |
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 66c7252526f3..7879791b263b 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c | |||
| @@ -1303,8 +1303,7 @@ static int __context_pin(struct i915_gem_context *ctx, struct i915_vma *vma) | |||
| 1303 | } | 1303 | } |
| 1304 | 1304 | ||
| 1305 | flags = PIN_GLOBAL | PIN_HIGH; | 1305 | flags = PIN_GLOBAL | PIN_HIGH; |
| 1306 | if (ctx->ggtt_offset_bias) | 1306 | flags |= PIN_OFFSET_BIAS | i915_ggtt_pin_bias(vma); |
| 1307 | flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias; | ||
| 1308 | 1307 | ||
| 1309 | return i915_vma_pin(vma, 0, 0, flags); | 1308 | return i915_vma_pin(vma, 0, 0, flags); |
| 1310 | } | 1309 | } |
| @@ -1332,7 +1331,7 @@ __execlists_context_pin(struct intel_engine_cs *engine, | |||
| 1332 | goto unpin_vma; | 1331 | goto unpin_vma; |
| 1333 | } | 1332 | } |
| 1334 | 1333 | ||
| 1335 | ret = intel_ring_pin(ce->ring, ctx->i915, ctx->ggtt_offset_bias); | 1334 | ret = intel_ring_pin(ce->ring, ctx->i915); |
| 1336 | if (ret) | 1335 | if (ret) |
| 1337 | goto unpin_map; | 1336 | goto unpin_map; |
| 1338 | 1337 | ||
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 27b24000412f..b293e1dedb8e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
| @@ -1003,11 +1003,7 @@ i915_emit_bb_start(struct i915_request *rq, | |||
| 1003 | return 0; | 1003 | return 0; |
| 1004 | } | 1004 | } |
| 1005 | 1005 | ||
| 1006 | 1006 | int intel_ring_pin(struct intel_ring *ring, struct drm_i915_private *i915) | |
| 1007 | |||
| 1008 | int intel_ring_pin(struct intel_ring *ring, | ||
| 1009 | struct drm_i915_private *i915, | ||
| 1010 | unsigned int offset_bias) | ||
| 1011 | { | 1007 | { |
| 1012 | enum i915_map_type map = HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC; | 1008 | enum i915_map_type map = HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC; |
| 1013 | struct i915_vma *vma = ring->vma; | 1009 | struct i915_vma *vma = ring->vma; |
| @@ -1017,10 +1013,11 @@ int intel_ring_pin(struct intel_ring *ring, | |||
| 1017 | 1013 | ||
| 1018 | GEM_BUG_ON(ring->vaddr); | 1014 | GEM_BUG_ON(ring->vaddr); |
| 1019 | 1015 | ||
| 1020 | |||
| 1021 | flags = PIN_GLOBAL; | 1016 | flags = PIN_GLOBAL; |
| 1022 | if (offset_bias) | 1017 | |
| 1023 | flags |= PIN_OFFSET_BIAS | offset_bias; | 1018 | /* Ring wraparound at offset 0 sometimes hangs. No idea why. */ |
| 1019 | flags |= PIN_OFFSET_BIAS | i915_ggtt_pin_bias(vma); | ||
| 1020 | |||
| 1024 | if (vma->obj->stolen) | 1021 | if (vma->obj->stolen) |
| 1025 | flags |= PIN_MAPPABLE; | 1022 | flags |= PIN_MAPPABLE; |
| 1026 | else | 1023 | else |
| @@ -1408,8 +1405,7 @@ static int intel_init_ring_buffer(struct intel_engine_cs *engine) | |||
| 1408 | goto err; | 1405 | goto err; |
| 1409 | } | 1406 | } |
| 1410 | 1407 | ||
| 1411 | /* Ring wraparound at offset 0 sometimes hangs. No idea why. */ | 1408 | err = intel_ring_pin(ring, engine->i915); |
| 1412 | err = intel_ring_pin(ring, engine->i915, I915_GTT_PAGE_SIZE); | ||
| 1413 | if (err) | 1409 | if (err) |
| 1414 | goto err_ring; | 1410 | goto err_ring; |
| 1415 | 1411 | ||
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index f5ffa6d31e82..399ec58d1f9d 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h | |||
| @@ -797,9 +797,7 @@ struct intel_ring * | |||
| 797 | intel_engine_create_ring(struct intel_engine_cs *engine, | 797 | intel_engine_create_ring(struct intel_engine_cs *engine, |
| 798 | struct i915_timeline *timeline, | 798 | struct i915_timeline *timeline, |
| 799 | int size); | 799 | int size); |
| 800 | int intel_ring_pin(struct intel_ring *ring, | 800 | int intel_ring_pin(struct intel_ring *ring, struct drm_i915_private *i915); |
| 801 | struct drm_i915_private *i915, | ||
| 802 | unsigned int offset_bias); | ||
| 803 | void intel_ring_reset(struct intel_ring *ring, u32 tail); | 801 | void intel_ring_reset(struct intel_ring *ring, u32 tail); |
| 804 | unsigned int intel_ring_update_space(struct intel_ring *ring); | 802 | unsigned int intel_ring_update_space(struct intel_ring *ring); |
| 805 | void intel_ring_unpin(struct intel_ring *ring); | 803 | void intel_ring_unpin(struct intel_ring *ring); |
