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authorRodrigo Vivi <rodrigo.vivi@intel.com>2018-10-22 13:15:25 -0400
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-10-22 17:40:41 -0400
commitfb72deaefe5982f983907a01b8090a37dd1e06d5 (patch)
treea65cce0f4798931fca56f8393b4d744bdee106c9 /drivers/gpu/drm/i915/intel_runtime_pm.c
parent210126bd807d39a9ccb65872b1c5112a18b23777 (diff)
drm/i915: power_domains_init sort platforms newer-to-older
No functional change. Just sorting this "if" block from newer to older platform. v2: Fix few positions (Ville) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181022171526.15641-4-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_runtime_pm.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 31a49bdcf193..5f5416eb9644 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3084,12 +3084,6 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
3084 */ 3084 */
3085 if (IS_ICELAKE(dev_priv)) { 3085 if (IS_ICELAKE(dev_priv)) {
3086 err = set_power_wells(power_domains, icl_power_wells); 3086 err = set_power_wells(power_domains, icl_power_wells);
3087 } else if (IS_HASWELL(dev_priv)) {
3088 err = set_power_wells(power_domains, hsw_power_wells);
3089 } else if (IS_BROADWELL(dev_priv)) {
3090 err = set_power_wells(power_domains, bdw_power_wells);
3091 } else if (IS_GEN9_BC(dev_priv)) {
3092 err = set_power_wells(power_domains, skl_power_wells);
3093 } else if (IS_CANNONLAKE(dev_priv)) { 3087 } else if (IS_CANNONLAKE(dev_priv)) {
3094 err = set_power_wells(power_domains, cnl_power_wells); 3088 err = set_power_wells(power_domains, cnl_power_wells);
3095 3089
@@ -3101,13 +3095,18 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
3101 */ 3095 */
3102 if (!IS_CNL_WITH_PORT_F(dev_priv)) 3096 if (!IS_CNL_WITH_PORT_F(dev_priv))
3103 power_domains->power_well_count -= 2; 3097 power_domains->power_well_count -= 2;
3104
3105 } else if (IS_BROXTON(dev_priv)) {
3106 err = set_power_wells(power_domains, bxt_power_wells);
3107 } else if (IS_GEMINILAKE(dev_priv)) { 3098 } else if (IS_GEMINILAKE(dev_priv)) {
3108 err = set_power_wells(power_domains, glk_power_wells); 3099 err = set_power_wells(power_domains, glk_power_wells);
3100 } else if (IS_BROXTON(dev_priv)) {
3101 err = set_power_wells(power_domains, bxt_power_wells);
3102 } else if (IS_GEN9_BC(dev_priv)) {
3103 err = set_power_wells(power_domains, skl_power_wells);
3109 } else if (IS_CHERRYVIEW(dev_priv)) { 3104 } else if (IS_CHERRYVIEW(dev_priv)) {
3110 err = set_power_wells(power_domains, chv_power_wells); 3105 err = set_power_wells(power_domains, chv_power_wells);
3106 } else if (IS_BROADWELL(dev_priv)) {
3107 err = set_power_wells(power_domains, bdw_power_wells);
3108 } else if (IS_HASWELL(dev_priv)) {
3109 err = set_power_wells(power_domains, hsw_power_wells);
3111 } else if (IS_VALLEYVIEW(dev_priv)) { 3110 } else if (IS_VALLEYVIEW(dev_priv)) {
3112 err = set_power_wells(power_domains, vlv_power_wells); 3111 err = set_power_wells(power_domains, vlv_power_wells);
3113 } else if (IS_I830(dev_priv)) { 3112 } else if (IS_I830(dev_priv)) {